Device and method for generating floating point constant

A floating-point constant and floating-point technology, which is applied to machine execution devices and other directions, can solve problems such as insufficient optimization of the floating-point constant generation method, and achieve the effect of reducing code density and improving execution efficiency.

Inactive Publication Date: 2015-04-29
C SKY MICROSYST CO LTD
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Problems solved by technology

Whether it is execution efficiency or code space, the traditiona...

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  • Device and method for generating floating point constant
  • Device and method for generating floating point constant
  • Device and method for generating floating point constant

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Embodiment 1

[0039] refer to Figure 1 ~ Figure 4 , a device for floating-point constant generation, said device comprising:

[0040] The decoding unit 10 is used to decode the floating-point instruction to generate an operation indicator and a binary immediate number of m bits, where m is an integer;

[0041] Floating-point constant generation unit 20, for receiving the information of decoding unit, carries out logic operation to the binary immediate number of m bit, described m bit binary immediate number comprises two fields, the first bit field of 1 bit and (m -1) The second bit field of the bit is combined with the sign field, the exponent field, and the mantissa field to encapsulate and generate n-bit floating-point specification constants, where n is an integer;

[0042] The floating-point constant generation unit includes:

[0043] A sign field generation circuit 21, used to extract the first bit field in the m-bit immediate value, and generate a sign field of a floating-point co...

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Abstract

A device for generating a floating point constant comprises a decoding unit and a floating point constant generating unit. The decoding unit is used for decoding a floating point instruction to generate an instruction indication symbol and an m-bit binary immediate value. The floating point constant generating unit is used for receiving information of the decoding unit to perform logic operation on the m-bit binary immediate value, wherein the m-bit binary immediate value comprises two domains, namely a 1-bit first bit domain and a (m-1)-bit second bit domain, the first bit domain in the m-bit binary immediate value is extracted to generate a symbol field of the floating point constant, the second bit domain in the m-bit binary immediate value is extracted and serves as a fixed-point number with a fixed scaling position to be processed to generate a mantissa field and an index field of the floating point constant, the symbol field, the index field and the mantissa field are packaged into the n-bit floating point constant jointly, and the n is an integer. The invention further discloses a method for generating the floating point constant. By the device and the method, execution efficiency is improved effectively, and code density is reduced.

Description

technical field [0001] The invention relates to the field of microprocessors, in particular to the fields of generating floating-point constants and floating-point calculations. Background technique [0002] Microprocessors generally implement a floating-point execution unit, which is used to support floating-point operations on hardware and improve the floating-point processing capability of the processor. Similar to the plastic program, there are also a large number of constants in the floating-point program, and these constants often need to directly participate in floating-point operations. How to efficiently generate the constants of the floating-point specification is of great significance for further improving the floating-point processing efficiency of the processor. [0003] In the design of shaping instructions and related data paths, the processor designs the immediate field in the instruction, and the immediate field represents the integer and directly participa...

Claims

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Application Information

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IPC IPC(8): G06F9/30
Inventor 卢星星李江帅夏立方
Owner C SKY MICROSYST CO LTD
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