74 results about "Segmentation and Reassembly" patented technology

An Ethernet Local Area Network uses a star topology connecting user stations to a Communications Switching Module (CSM) with 10Base-T or 100 Base-TX UTP cable. Each user station typically has a digital telephone and a data communication device, such as a PC communicating with the CSM through a common UTE adapter. Delay-sensitive digital voice signals and non-delay sensitive user data are transported in master Ethernet packets of fixed length transmitted at a fixed rate. Segmentation and re-assembly of data is performed in the UTE adapters and in the CSM.

The present invention provides a multi-service queuing method and apparatus that provides exhaustive arbitration, load balancing, and support for rapid port failover. Routers and switches according to the present invention can instantaneously direct the flow of traffic to another port should there be a failure on a link, efficiently handle multicast traffic and provide multiple service classes. The fabric interface interfaces the switch fabric with the ingress and egress functions provided at a network node and provides virtual input and output queuing with backpressure feedback, redundancy for high availability applications, and packet segmentation and reassembly into variable length cells. The user configures fixed and variable-length cells. Virtual input and output queues are coupled to a switch fabric. Statistics regarding the virtual input and output queues are collected and packet queuing for the virtual input and output queues is controlled using the collected statistic to provide congestion control for the virtual input and output queues and the switch fabric.

An embodiment of this invention pertains to a network processor that processes incoming information element segments at very high data rates due, in part, to the fact that the processor is deterministic (i.e., the time to complete a process is known) and that it employs a pipelined “multiple instruction single date” (“MISD”) architecture. This MISD architecture is triggered by the arrival of the incoming information element segment. Each process is provided dedicated registers thus eliminating context switches. The pipeline, the instructions fetched, and the incoming information element segment are very long in length. The network processor includes a MISD processor that performs policy control functions such as network traffic policing, buffer allocation and management, protocol modification, timer rollover recovery, an aging mechanism to discard idle flows, and segmentation and reassembly of incoming information elements.

A multi-service segmentation and reassembly (MS-SAR) integrated circuit is disposed on a line card in a router or switch. The MS-SAR can operate in an ingress mode so that it receives packet and/or cell format data and forwards that data to either a packet-based or a cell-based switch fabric. The MS-SAR can also operate in an egress mode so that it receives data from either a packet-based or a cell-based switch fabric and outputs that data in packet and/or cell format. The MS-SAR has a data path through which many flows of different traffic types are processed simultaneously. Each flow is processed by functional blocks along the data path in accordance with one of several application types, the application type for a flow being predetermined by the host processor of the router or switch. Segmentation, reassembly and partitioning techniques are disclosed that reduce costs and facilitate high-speed operation.

Different levels of service are provided to different types of traffic within a single virtual circuit (VC) by converting the traffic from fixed-length cells to variable-length packets, classifying the packets based on information in the packet headers, associating the packets with a VC, and then implementing class-specific enqueuing and dequeuing of the classified packets on a per-VC basis. Classified packets are dequeued from VC-specific and class-specific queues into VC-specific segmentation and re-assembly (SAR) queues according to an algorithm that is a function of traffic class. The dequeuing algorithm determines the level of service that is provided to the different classes of traffic within each VC. Packets are dequeued from the VC-specific SAR queues and converted back to fixed-length cells according to an algorithm that arbitrates among multiple VC-specific SAR queues. The technique for managing traffic can be carried out within an Ethernet switch/router that includes input and output ATM interfaces.

A segmentation and re-assembly (SAR) decode engine receives protocol data units of data from a communication channel between two computers, sequences the protocol data units, and re-assembles the data in the protocol data units into the messages exchanged by the computers. The SAR decode engine is responsible for unpacking the payloads from the protocol data units as instructed by a protocol interpreter associated with the protocol data unit, and for creating and maintaining a flow object database containing flow objects representing the data flows at each protocol layer. The SAR decode engine creates a protocol flow object for each protocol layer and logically links the protocol flow object to circuit flow objects that define two one-way circuits within the channel. The circuit flow objects linked to a protocol flow object are logical representations of the protocol data units for the next higher protocol layer. For protocols that fragment data, each circuit flow object is a vector list containing one or more vectors that define the length, starting location and position of the data fragments in the immediately lower layer circuit flow objects.

A novel flow-through architecture for fragmentation and reassembly of tunnel packets in network devices is presented. The fragmentation and reassembly of tunneled packets are handled in the hardware pipeline to achieve line-rate processing of the traffic flow without the need for additional store and forward operations typically provided by a host processor or a co-processor. In addition, the hardware pipeline may perform fragmentation and reassembly of packets using encrypted tunnels by performing segment-by-segment crypto. A network device implementing fragment reassembly can include an ingress hardware pipeline that reassembles fragmented packets between a media access control (MAC) of the device and an output packet memory of the device, where the incoming fragmented packets can be encrypted and/or tunneled. A network device implementing packet fragmentation can include an egress hardware pipeline that fragments packets between an input packet memory of the device and the MAC, where the outgoing fragments can be encrypted and/or tunneled.

A slot format and acknowledgment method for use in a communication network that contains one or more wireless links. The slot format provides for the segmenting and reassembly of packets for transport over a wireless link. It also provides support for multiple types of service for the data being carried over the wireless link as well as allocating of access to the wireless link among a plurality of communication units. The acknowledgment method provides for detection of errors over the wireless link, the selective acknowledgment of error-free transmissions and the selective resending of transmissions received in error.

Delivery of short audio communications to remote end user devices uses discrete message-oriented service messages for delivery of the audio messages. Audio information is captured, encoded by means of audio compression technology, and stored at a message center. Alternatively, the audio information may be stored in an uncompressed format and compressed immediately before delivery. The compressed audio information is transmitted by means of Short Message Service or another discrete message-oriented service to the end user device, where it is decompressed and played to the recipient. Message delivery can be accomplished in parallel with some other ongoing activity at the end user device. The major fields in a Short Message Service message used to carry encoded audio information are a Type of Data field, including information on the type of translator needed to decompress the message field, a Short Message Identifier, a Length field, and the coded audio information. If the audio information is too large to be contained in a single Short Message, segmentation and reassembly techniques commonly known in the art are applied to break the information into segments, each of which is placed into a separate Short Message having the fields: Type of Data; Short Message Identifier; Total Segments; Number of Enclosed Segment; Segment Length; and Coded Audio Information Segment. At the end user device, the Short Message can be stored until the end user listens to the audio information. The intervening network can be a radio link, the Internet, or some other network. The invention may also be utilized by a mobile user to send short audio messages to a message center and/or a second end user device.

A system for scheduling multirate multicast packets through an interconnection network having a plurality of input ports, a plurality of output ports, and a plurality of input queues, comprising multirate multicast packets with rate weight, at each input port is operated in nonblocking manner in accordance with the invention by scheduling corresponding to the packet rate weight, at most as many packets equal to the number of input queues from each input port to each output port. The scheduling is performed so that each multicast packet is fan-out split through not more than two interconnection networks and not more than two switching times. The system is operated at 100% throughput, work conserving, fair, and yet deterministically thereby never congesting the output ports. The system performs arbitration in only one iteration, with mathematical minimum speedup in the interconnection network. The system operates with absolutely no packet reordering issues, no internal buffering of packets in the interconnection network, and hence in a truly cut-through and distributed manner. In another embodiment each output port also comprises a plurality of output queues and each packet is transferred corresponding to the packet rate weight, to an output queue in the destined output port in deterministic manner and without the requirement of segmentation and reassembly of packets even when the packets are of variable size. In one embodiment the scheduling is performed in strictly nonblocking manner with a speedup of at least three in the interconnection network. In another embodiment the scheduling is performed in rearrangeably nonblocking manner with a speedup of at least two in the interconnection network. The system also offers end to end guaranteed bandwidth and latency for multirate multicast packets from input ports to output ports. In all the embodiments, the interconnection network may be a crossbar network, shared memory network, clos network, hypercube network, or any internally nonblocking interconnection network or network of networks.

A method and apparatus for segmenting and forwarding data packets received in a communication switch is presented. The method begins by receiving a packet that includes a destination that determines forwarding parameters. As the packet is being received, segmentation cells are created from portions of the packet received where each segmentation cell is provided to a switching fabric as soon as creation of the segmentation cell is completed. When an end portion of the packet is received, verification of proper receipt of the packet is performed. When it is determined that the packet has been received successfully, a verification data set is generated based on segmentation cells that have been utilized to forward the packet. The verification data set is then included in a final segmentation cell that is provided to the switching fabric. Such a verification data set can then be used by an egress line card that receives the segmentation cells to verify proper receipt of the segmentation cells. If it is determined that the packet has not been successfully received, a purging data set is generated instead of the verification data set. Such a purging data set is then included in the final segmentation cell that is provided to the switching fabric, where the purging data set preferably causes any egress line card to purge the corrupted packet rather than forwarding it.

A system for scheduling unicast packets through an interconnection network having a plurality of input ports, a plurality of output ports, and a plurality of input queues, comprising unicast packets, at each input port is operated in nonblocking manner in accordance with the invention by scheduling at most as many packets equal to the number of input queues from each input port to each output port. The system is operated at 100% throughput, work conserving, fair, and yet deterministically thereby never congesting the output ports. The system performs arbitration in only one iteration, with mathematical minimum speedup in the interconnection network. The system operates with absolutely no packet reordering issues, no internal buffering of packets in the interconnection network, and hence in a truly cut-through and distributed manner. In another embodiment each output port also comprises a plurality of output queues and each packet is transferred to an output queue in the destined output port in nonblocking and deterministic manner and without the requirement of segmentation and reassembly of packets even when the packets are of variable size. In one embodiment the scheduling is performed in strictly nonblocking manner with a speedup of at least two in the interconnection network. In another embodiment the scheduling is performed in rearrangeably nonblocking manner with a speedup of at least one in the interconnection network. The system also offers end to end guaranteed bandwidth and latency for packets from input ports to output ports. In all the embodiments, the interconnection network may be a crossbar network, shared memory network, clos network, hypercube network, or any internally nonblocking interconnection network or network of networks.

The present invention discloses a method and apparatus for transmitting incoming packet data via a data bus to a memory unit and transmitting outgoing packet data from the memory unit to a communication link via the data bus. The method for transmitting packet data via a data bus to a memory unit comprises the steps of receiving a stream of packet data; storing the received packet data in a buffer unit; and in response to the stored packet data, transmitting a burst of packet data to the memory unit, wherein the size of the burst of packet data depends on the properties of the data bus. The method for transmitting outgoing packet data from a memory unit to a communication link via a data bus comprises the steps of transmitting a burst of packet data from the memory unit to a buffer unit, wherein the size of the burst of packet data depends on the properties of the data bus; storing the packet data in the buffer unit; segmenting the packet data in the buffer; and in response to the transmission step, sending the segmented packet data to the communication link.

Methods and apparatus are described for a data link control layer of a communication modem in which data movement functionality is implemented in hardware. In one embodiment, a data link layer comprises software, memory and hardware. The software comprises a processor configured to receive control signaling from a host device and provide control information to the hardware. The hardware comprises an outbound memory manager configured to receive data from the host device, determine locations in the memory for the data, store the data in the memory, determine which of the data is to be forwarded to a physical layer during a given transmit period, and forward the data to the physical layer. In preferred embodiments, the modem is a high performance modem designed for the terminals of a wireless local area network having multiple data flows, segmentation and reassembly, encryption, automatic repeat request, and quality of service requirements.

Systems and methods are described for bonding asynchronous transfer mode permanent virtual circuits using a multi-link segmentation and reassembly sublayer. A method includes: transforming a plurality of streams of asynchronous transfer mode cells into a stream of bonded asynchronous transfer mode cells, the plurality of streams of asynchronous transfer mode cells provided by a first plurality of permanent virtual circuits; demultiplexing the stream of bonded asynchronous transfer mode cells into a plurality of streams of inverse multiplexed bonded asynchronous transfer mode cells; and transmitting the plurality of streams of inverse multiplexed bonded asynchronous transfer mode cells to a remote location via a second plurality of permanent virtual circuits. The transmitted plurality of streams of inverse multiplexed bonded asynchronous transfer mode cells can be multiplexed and transformed into a plurality of multiplexed streams of asynchronous transfer mode cells after transmitting.

Fragmentation and reassembly of a multi-part message for communication over a cellular network. When transmitting a multi-part message, a calling application issues a function call to a short messaging layer via a standardized interface. The function call represents a request to transmit the message. A short messaging layer divides the message into fragments of limited size that meet the size requirements of the cellular network. Each of the short messages is then transmitted across the cellular network. When receiving a multi-part message, a short messaging layer at the receiving device receives various short message fragments corresponding to the multi-part message. The short messaging layer then reassembles the short message fragments into the multi-part message, and then passes the reassembled multi-part message to the receiving application. The short message layer also presents a consolidated delivery report if requested.

There is disclosed a method of transmitting data packets from a transmitter to a receiver -each having a stack of communication protocol layers which comprises a data Link Layer (LL), by using a Segmentation And Re-assembly (SAR) mechanism implemented within a SAR layer intermediate between the LL and an upper layer, as well as an error recovery mechanism implemented within the LL. The SAR mechanism performs, in a transmission direction, the function of segmenting Parent Packets (PPs) handled by the upper layer into consecutive segments of shorter length and the function of providing some segmentation information. The segmentation information comprises, for each segment, a two-level sequence numbering comprising a PP Sequence Number (PPSN) which identifies the PP which said segment belongs to, and a Segment Sequence Number (SSN) which identifies the rank of the segment within the PP. The error recovery mechanism implements a selective retransmission scheme using forward and/or feedback signalling messages which embed the two-level segment numbering. In the receive direction, the SAR mechanism delivers to the upper layer a PP of given PPSN of which all constitutive segments are correctly received and re-assembled, irrespective of whether all PPs of sequence number lower than that PPSN are already delivered.