279 results about "Frequency counter" patented technology

A disk drive is disclosed comprising a disk, a head actuated over the disk, a host interface for receiving disk access commands from a host, a command queue for queuing the disk access commands, and a stream detection engine for evaluating the disk access commands to detect a plurality of streams accessed by the host. The stream detection engine maintains a stream data structure for each detected stream, wherein the stream data structure comprises a frequency counter for tracking a number of disk access commands associated with the stream out of a predetermined number of consecutive disk access commands received from the host. A disk controller selects one of the streams for servicing in response to the frequency counters.

The invention relates to a non-stationery vibration signal instantaneous frequency estimation algorithm in a start and stop period of rotating machinery; firstly, an experiment table working model of a rotor of the rotating machinery is built, a non-stationery vibration signal sensor for measuring vibration signal, and a photo-electric sensor for measuring the rotating speed of a reference axis are arranged along the horizontal and vertical direction of the reference axis; after the obtained signal is analyzed by an order analysis software of an upper computer through a dynamic signal analyzer, STFT time-frequency spectrum containing multi-level component is obtained; the working frequency of the rotating machinery is used as an estimated starting frequency point, according to the requirements of sampling frequency and calculation accuracy, the frequency obtained by the STFT time-frequency analysis is equally divided into M groups, the start and stop period is equally divided into N time points for building grid meshes of N time points and M groups of frequency points; the route of minimum-deviation frequency point from the start point to the stop point is computed through Viterbi algorithm, after fitting is carried out, the instantaneous frequency estimation function value of the reference axis of the non-stationery vibration signal of the rotating machinery in the start and stop period is obtained.

The invention discloses a digital phase discriminator used for a GPS tame crystal oscillator. The digital phase discriminator used for the GPS tame crystal oscillator comprises a 2N frequency divider, a high level pulse width counter, a low level pulse width counter, a pulse per second clock, a phase difference counter clock, a frequency count value latch and a phase error value latch. The 2N frequency divider is used for performing frequency division on 1 Hz PPS signals output by a GPS module. The high level pulse width counter and the low level pulse width counter are used for counting high level pulse widths and low level pulse widths. The pulse per second clock is in input connection with frequency locking enabled signals provided by the outside, is connected with the GPS and performs frequency diversion on inner pulse per second signals output by an OCXO clock. The phase difference counter clock inputs the inner pulse per second signals and PPS signals output by the GPS module, calculates the time difference of rising edges of the inner pulse per second signals and rising edges of the PPS signals, and outputs count values of the phase difference. The frequency count value latch and the phase error value latch are used for achieving the frequency at which an OCXO tracks GPS signals and the PPS signals and meanwhile output frequency values and phase error values. According to the digital phase discriminator used for the GPS tame crystal oscillator, time sequence design is facilitated, and the problem of lead-lag fuzziness of initial phase errors is avoided; the scheme of serial counters is adopted in the frequency counter and the phase measurement counter, so the frequency of the counter clock will not be affected by counting digits.

The invention discloses a system for automatically testing the parameters of a quartz crystal oscillator, which comprises a master computer and a parameter test card connected with the main board of the master computer, wherein the parameter test card comprises a singlechip and a test circuit and a reference circuit which are connected with the singlechip respectively. The singlechip has a D/A module, an A/D module, a first counter, a second counter and a timer. The test circuit comprises a current amplification circuit, a voltage sampling resistor, a frequency dividing circuit, a first measurement gate control circuit and the crystal oscillator to be measured. The reference circuit comprises a reference frequency source, a frequency multiplication circuit, a second measurement gate control circuit and a frequency dividing and high-frequency signal latch circuit. In the invention, the test card integrates the functions of all apparatuses such as a frequency counter, a digital voltmeter and a digital oscillometer and can be directly inserted in the main board of the computer, and the fully automatic test of various parameters, such as working frequency, working current and start up time, of the quartz crystal oscillator can be realized by a control program.

The invention discloses a dual-loop frequency synthesizer and a tuning method of rough adjustment loop thereof, belonging to the field of frequency synthesizer in wireless transceiver. The frequency synthesizer consists of a rough adjustment loop and a fine adjustment loop, wherein the rough adjustment loop comprises a crossover frequency counter, a frequency reference counter, a shifter, a comparator and a finite state machine. The input end of the crossover frequency counter is connected with frequency dividing signal Fdiv of a voltage controlled oscillator of the fine adjustment loop, the shifter is connected with the crossover frequency counter or the frequency reference counter for leftwards shifting the counting value of the crossover frequency counter or the frequency reference counter, the counting values of the crossover frequency counter and the frequency reference counter are respectively output to the comparator, the compare result of which is input to the finite state machine. Compared with prior art, the invention reduces the time of rough tuning as well as provides higher tuning precision according to the needs.

A performance monitor device includes an input unit to input both of address information and event occurrence information, an address mask unit to determine an address area to which each piece of the inputted address information belongs, an execution frequency counter to count a number of times of execution of programs in the address areas, an execution frequency holding unit to hold a counting result of the number of times of execution, an event occurrence information counter to count the event occurrence information corresponding to the address areas having the counting result of the number of times of execution included within a predetermined number of highest ranks, a holding unit to hold a counting results of the event occurrence information, and a storing unit to store the counting result of the event occurrence information corresponding to the address area having the highest number of times of execution in predetermined periods.

The image quality correcting circuit according to the present invention is made up of a mean value computer 10 for computing the mean value of the luminance levels of every plural picture element of a video signal inputted to a video signal input terminal 12, an occurrence frequency counter 13 for counting the occurrence frequency data of plural luminance levels computed by the mean value computer 10, a linear interpolator 15 for forming a correcting characteristic line based on the output points of the counted value from the occurrence frequency counter 13, and an image quality corrector 16, and wherein the linear interpolator 15 provides the correcting characteristic line consisting of a linearly interpolated series of continuous segments, which are obtained by sequentially connecting the luminance levels of an x-axis and the occurrence frequencies on a y-axis, and the image quality corrector 16 corrects the video signals inputted from the video signal input terminal 12 according to the linearly interpolated correcting characteristic line.

A method and device for detecting microbe with piezoelectric quarts crystal transducer includes leading microbial metablin CO2 from culture cell to basic solution detection cell, measuring reaction variation with transducer and counting it out with frequency counter, obtaining linear relation between FDT and microbial concentration for carrying out microbial quantitative and qualitative detection by measuring response curve of microbe in different concentration.

Water leakage of a steam oven provided on an aircraft for heating ingredients is to be prevented.

Two solenoid valves 6 and 7 are inserted in series in a water supply circuit of a steam oven. A power switch 12 supplies a 15 V direct current to the solenoid valves 6 and 7. A controller 1 transmits a command to driving circuits 4 and 5 of the solenoid valves according to a signal of a temperature sensor 10 in the oven. An output of a clock generator 14 is counted by a frequency counter and a time in which the valves are opened is counted. When count of a valve opening time becomes longer than a predetermined value, the power switch 12 of the solenoid valves is disconnected to prevent water leakage.

The GPS receiving system is composed of the GPS signal generator, the base station synthetic simulator, the frequency counter, the power allotter the shielding box and the communicating direct current and the automatic testing apparatus. The apparatus includes: The AGC testing module, the Doppler frequency bias calibrating module, the testing module of sensitivity, and the calibrating module of the error.

A sampling clock generator for BCA data decoding providing a sampling clock, which is proportional to the actual rotation speed of a disk. The sampling clock generator includes a frequency counter, a divider and a frequency divider. The frequency counter counts the number of pulses of a reference clock for each period of a rotation speed indicating signal of a spindle motor and generates a counting value. The divider divides the counting value by a predefined value and generates a divided value. The frequency divider is employed to generate the sampling clock. The frequency divider receives the reference clock and divides the frequency of the reference clock by the divided value to generate the sampling clock. The frequency divider also adjusts the phase of the sampling clock according to the BCA reproducing signal.

The invention provides an all-digital intermediate frequency spectrum analyzer and a spectrum analyzing method. The all-digital intermediate frequency spectrum analyzer comprises an analog-digital converter, a quadrature digital down converter, an intermediate frequency bandwidth filter, an amplitude and phase discriminator, a frequency counter, a video frequency filter, a sampling frequency boosting module, a detector, a fast scan compensation module and a controlling and displaying module. An intermediate-and-low speed analog-digital converter low in cost can be taken as the analog-digital converter. After analog intermediate frequency signals are sampled by the analog-digital converter, integral digital intermediate frequency spectral analysis can be realized via a monolithic FPGA (field programmable gate array) in the follow-up step, and thereby the all-digital intermediate frequency spectrum analyzer is low in cost, convenient to debug and high in stability after being tested by practical production. In addition, the all-digital intermediate frequency spectrum analyzer and the spectrum analyzing method have the advantage that analysis of bandwidth from 1Hz to 1MHz can be realized.

The invention is used for solving the issue that is the currently-used technology can't control the block-missing rate so as to cause low throughout. It comprises: setting up a corresponding table between the initial adjustment value and the block-missing rate, and calculating the block-missing rate at unit time and at a certain times; if the block-missing rate is more than an upper threshold and less than a threshold, then according to the block-missing rate, the code rate is adjusted. By setting up a frequency counter and a timer, the invention ensures the accuracy and real-time statistic of block-missing rate. The invention is mainly used in high speed downlink packet access (HSDPA) system.

A system and method for enhanced frequency measurement. Embodiments provide an effective mechanism for reducing error associated with frequency measurements by amplifying the frequency of the signal fed to the frequency counter, thereby increasing the number of counts and reducing the error associated with each frequency measurement. Reductions in error enable the gate time for the frequency counter to be reduced, thereby increasing efficiency and cost-savings. After accessing the counts provided for the amplified frequency, the original frequency before amplification may be determined by reducing the amplified frequency (e.g., represented by the accessed counts) by the amount by which the original frequency was amplified. Embodiments provide an effective and efficient mechanism for automatically determining the amount of amplification for a given signal based upon its frequency and a maximum frequency of at least one of the frequency amplification component and the frequency counter.

A method, system and computer program product for managing bursts of traffic. A counter, referred to herein as a “frequency counter,” is incremented during those time intervals an overload condition is detected and is decremented during those time intervals an overload condition is not detected. An overload condition may refer to when the number of out-of-dialog messages exceeds a threshold value corresponding to the maximum number of out-of-dialog messages that should be accepted and forwarded to an associated session server. If the count of the frequency counter exceeds some pre-configured value, then traffic that exceeds the threshold for the overload condition is stopped from being sent to the associated session server. Otherwise, traffic that exceeds the threshold for the overload condition is permitted to be sent to the associated session server. By managing bursts of traffic in such a manner, the effective utilization of session servers is improved.

The invention discloses a large-scale multi-pulse modulation femto-second laser absolute distance measurement device and method and belongs to the field of femto-second laser distance measurement. According to the invention, the device includes a femto-second laser source, an atomic clock, a Michelson interferometry ranging device, a wave plate HWP4, a PBS (Polarized Beam Splitter), a balance optical cross-correlation assembly, a photoelectric detection device, a servo control device and a frequency counter. The device also includes a single-mode long optical fiber in a length m and a wave plate HWP5. The invention also discloses the large-scale multi-pulse modulation absolute distance measurement method implemented based on the femto-second laser absolute distance measurement device. According to the invention, the length of a reference arm in the Michelson interferometry ranging device is not needed to know and absolute distance measurement of a continuous range based on a flight time method is realized. The application range of femto-second laser absolute distance measurement can be expanded and the invention has a good application prospect in engineering fields such as femto-second laser distance measurement and the like.

A method for identifying names of uninformative functions in call-stack traces is described. The method comprises the steps of obtaining a set of call-stacks and information indicative of which call-stack traces in the set match a particular call-stack trace; for each matching call-stack trace pair, incrementing a false negative counter for each function name above a first matching function name in a respective call-stack trace pair; for each non-matching call-stack trace pair, incrementing a false positive counter for each function name above a first non-matching function name in a respective call-stack pair; incrementing a frequency counter for each function name appearing in each of the call-stack traces; calculating an aggregate value for each of the function names as a function of respective ones of the false positive counter, the false negative counter and the frequency counter; and identifying uninformative ones of the function names based on the respective aggregate values. The method may be used to diagnose software problems based on known software problems and is useful in helpdesk and autonomic computing applications. A system and a computer program product for performing the method are also described.

An energy balanced weld controller includes a mid frequency direct current power supply and a weld switch that turns the current to weld caps on or off. The weld caps are used to produce a weld on workpieces. The tip voltage and the weld current are multiplied to generate a voltage which is converted to a frequency. The output represents the amount of energy provided to the weld and is provided to a frequency counter that counts the amount of energy delivered to the weld. A magnitude comparator compares the energy delivered to the weld to a target energy. When the energy delivered to the weld equals the target energy, the magnitude comparator sends a high signal to the weld switch to terminate the weld.

The invention discloses an on-line service combination recommendation system and a recommendation method thereof. The system comprises a usage frequency counter, a service search tree construction device, and a service composition recommendation device. The use frequency counter is used for obtaining usage record of service compositions in a service combination usage log database and countering usage frequency of each service composition. The service search tree construction device is used for acquiring usage frequency of the service compositions from the usage frequency counter and obtaining QoS values of corresponding service compositions from a service registration center, through the usage frequency of the service compositions and the QoS values of corresponding service compositions, calculating P(S) value of the service compositions, and constructing a service search tree T of the service compositions. According to the obtained service search tree of the service compositions and combined but unfinished service compositions prefix fragment q, the service compositions recommendation device utilize A-star heuristic search, obtain a service compositions scheme, and recommend better service to substitute combined service for a user.

The invention relates to a femtosecond laser interference range finding system which is characterized in that light pulse emitted by a femtosecond laser device is split by a first optical fiber coupler; a part of the light pulse emitted by the first optical fiber coupler is transmitted to a frequency counter through a first photoelectric detector; another part of the light pulse emitted by the first optical fiber coupler enters a second optical fiber coupler, a beam of the light pulse emitted by the second optical fiber coupler is emitted to a first light splitting mirror through a long optical fiber, the light pulse emergent out of the first light splitting mirror is transmitted to a first reflecting mirror, and the light pulse emitted by the first reflecting mirror is transmitted to a second light splitting mirror through the first light splitting mirror and a plane mirror; the light pulse emitted by the first light splitting mirror is transmitted to a second reflecting mirror, light emitted by the second reflecting mirror is transmitted to the second light splitting mirror through the first light splitting mirror and the plane mirror in turn; and another beam of the light pulse emitted by the second optical fiber coupler is transmitted to the second light splitting mirror, two beams of the light pulse emitted by the second light splitting mirror are received by the corresponding photoelectric detectors through a band-pass filter, and the output ends of the two photoelectric detectors are connected with a signal processing system through a phase-locked amplifier.

A radio frequency temperature sensor and a method of calibration temperature therefor are disclosed. An active radio frequency temperature sensor including a ring oscillator, a memory, a frequency counter, a radio frequency transmission interface and a micro-controller is used to calibrate and verify the efficacy of the radio frequency temperature sensor. Thereafter, a passive radio frequency temperature sensor including a regulator, a clock extractor, a ring oscillator, a memory, a frequency counter, a modulator and a state-machine is developed according to the verified results.