Double-loop circuit frequency synthesizer and method for tuning gross adjustment loop circuit

Abstract

The invention discloses a dual-loop frequency synthesizer and a tuning method of rough adjustment loop thereof, belonging to the field of frequency synthesizer in wireless transceiver. The frequency synthesizer consists of a rough adjustment loop and a fine adjustment loop, wherein the rough adjustment loop comprises a crossover frequency counter, a frequency reference counter, a shifter, a comparator and a finite state machine. The input end of the crossover frequency counter is connected with frequency dividing signal Fdiv of a voltage controlled oscillator of the fine adjustment loop, the shifter is connected with the crossover frequency counter or the frequency reference counter for leftwards shifting the counting value of the crossover frequency counter or the frequency reference counter, the counting values of the crossover frequency counter and the frequency reference counter are respectively output to the comparator, the compare result of which is input to the finite state machine. Compared with prior art, the invention reduces the time of rough tuning as well as provides higher tuning precision according to the needs.

Description

technical field [0001] The invention relates to a frequency synthesizer in a wireless transceiver, in particular to a double-loop frequency synthesizer and a tuning method for a coarse tuning loop. Background technique [0002] Frequency synthesizer (referred to as frequency synthesizer) is used to obtain a series of devices with high stability and high precision frequency. It is the key module in the wireless transceiver. It provides the local oscillator signal for the channel selection of the transceiver and inputs it to the mixer. The local oscillator end, in order to realize frequency conversion up and down. Common frequency synthesizers include: phase-locked (PLL) frequency synthesizers and direct digital frequency synthesizers. Because the phase-locked frequency synthesizer has the advantages of low cost and high performance, it is especially suitable for generating clock signals and high-frequency carrier signals with precise frequencies. Therefore, it is widely used...

AI Technical Summary

Problems solved by technology

[0010] This structure can easily set the frequency comparison tolerance, but in the case of very low reference frequency, the time required for the coarse tuning loop is too long, thereby increasing the overall lock time of the frequency synthesizer

Moreover, this structure does not solve the synchronization problem of the reference frequency R and the frequency division frequency V at the initial stage of counting, which will bring synchronization errors in counting and affect the final coarse adjustment accuracy

[0011] To sum up, the coarse adjustment loop adopted by the existing dual-loop frequency synthesizer cannot satisfy frequency accuracy, coarse adjustment time, synchronization error and power consumption at the same time various requirements

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