Method for tuning gross adjustment loop circuit of double-loop circuit frequency synthesizer

A technology of frequency synthesizer and coarse tuning loop, applied in the field of frequency synthesizer

Inactive Publication Date: 2011-11-09
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0011] To sum up, the coarse adjustment loop adopted by the existing dual-loop frequency synthesizer cannot satisfy frequency accuracy, coarse adjustment time, synchronization error and power consumption at the same time various requirements

Method used

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  • Method for tuning gross adjustment loop circuit of double-loop circuit frequency synthesizer
  • Method for tuning gross adjustment loop circuit of double-loop circuit frequency synthesizer
  • Method for tuning gross adjustment loop circuit of double-loop circuit frequency synthesizer

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Embodiment Construction

[0047] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments:

[0048] The structure of the dual-loop frequency synthesizer of the present invention is as follows Figure 5 As shown, the fine-tuning loop still adopts the traditional structure, which is composed of a frequency divider, a phase detector, a charge pump, a loop filter, and a voltage-controlled oscillator (VCO) connected in sequence. The input terminal is connected with the output terminal of the VCO, which together with the coarse tuning loop forms a dual-loop frequency synthesizer. For the internal structure of the coarse adjustment loop of the present invention, see Image 6 with Figure 7 . The coarse adjustment loop is composed of five parts: the frequency dividing frequency counter (CNV), the reference frequency counter (CNR), the shifter, the comparator and the finite state machine (FSM). The specific connection relationship is: CNV input termi...

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PUM

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Abstract

The invention discloses a dual-loop frequency synthesizer and a tuning method of rough adjustment loop thereof, belonging to the field of frequency synthesizer in wireless transceiver. The frequency synthesizer consists of a rough adjustment loop and a fine adjustment loop, wherein the rough adjustment loop comprises a crossover frequency counter, a frequency reference counter, a shifter, a comparator and a finite state machine. The input end of the crossover frequency counter is connected with frequency dividing signal Fdiv of a voltage controlled oscillator of the fine adjustment loop, the shifter is connected with the crossover frequency counter or the frequency reference counter for leftwards shifting the counting value of the crossover frequency counter or the frequency reference counter, the counting values of the crossover frequency counter and the frequency reference counter are respectively output to the comparator, the compare result of which is input to the finite state machine. Compared with prior art, the invention reduces the time of rough tuning as well as provides higher tuning precision according to the needs.

Description

technical field [0001] The invention relates to a frequency synthesizer in a wireless transceiver, in particular to a tuning method for a coarse tuning loop of a double-loop frequency synthesizer. Background technique [0002] Frequency synthesizer (referred to as frequency synthesizer) is used to obtain a series of devices with high stability and high precision frequency. It is the key module in the wireless transceiver. It provides the local oscillator signal for the channel selection of the transceiver and inputs it to the mixer. The local oscillator end, in order to realize frequency conversion up and down. Common frequency synthesizers include: phase-locked (PLL) frequency synthesizers and direct digital frequency synthesizers. Because the phase-locked frequency synthesizer has the advantages of low cost and high performance, it is especially suitable for generating clock signals and high-frequency carrier signals with precise frequencies. Therefore, it is widely used...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03L7/18H03L7/197
Inventor 杨淮洲刘军华叶乐廖怀林黄如王新安
Owner PEKING UNIV
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