39results about "Frequency to pulse train conversion" patented technology

The invention relates to the technical field of electric power detection, and provides a low-voltage and low-frequency load shedding function test method and a test device, in the on-site real-model test process, the test method and the test device are hung on a grid along with an FTU, the voltage and frequency change of the power grid and the action of the FTU are recorded in real time, a broken line graph is generated through upper computer software, and the action process of on-site low-voltage and low-frequency detection is displayed. Whether the device correctly executes the low-voltage and low-frequency load shedding action or not is visually observed, and the method has high practical significance (fault prevention), asset configuration optimization (service life prolonging) and final service for efficient, reliable and economical operation of a power grid.

The embodiment of the invention provides a signal period measurement method, a microcontroller, a storage medium and a program product, and relates to the technical field of signal frequency detection, the method comprises the following steps: in response to a timer capture event or a timer overflow event, executing an interrupt service program of a central processing unit; executing the interrupt service program of the central processing unit, which comprises the following steps of: when the interrupt service program is determined to be called in response to the timer overflow event, performing cumulative counting on the occurrence frequency of the timer overflow event to obtain a cumulative overflow frequency; and under the condition of determining that the interrupt service program is called in response to the timer capture event, calculating an actual period value of the tested signal according to the current accumulated overflow times and the capture period value, and resetting the accumulated overflow times. According to the embodiment of the invention, the period is calculated through the cumulative counting of the timer overflow events and the counting of the timer capture events, and the problem that the timer is limited by digits and cannot give consideration to low-frequency band width period coverage and measurement precision is solved.

A method for controlling an analog-digital converter comprising first and second oscillators, and first and second elements, the method comprising a first step during which the first and second oscillators generate frequencies depending on an electrical characteristic of the first element and of the second element, respectively, and a second step during which the first and second oscillators generate frequencies depending on the electrical characteristic of the second element and of the first element, respectively.

The invention discloses a PWM signal frequency detection method and device and a household appliance, and belongs to the technical field of household appliances. The PWM signal frequency detection method comprises the following steps: counting based on a counting period, and obtaining an initial period value based on counting values when a target edge of a PWM signal is continuously captured twice; the target edge comprises at least one of a rising edge and a falling edge; under the condition that the initial period value is in the first range, multiplying a counting frequency value corresponding to the counting period by a target multiple, dividing by the initial period value, and rounding down to obtain an initial rotating speed value; the target multiple is the multiple of the rotating speed of the target equipment relative to the working frequency of the target equipment; and obtaining the value of the actual frequency of the PWM signal based on the quotient obtained by dividing the initial rotating speed value by the target multiple. According to the PWM signal frequency detection method and device, and the household electrical appliance provided by the invention, a more accurate frequency value can be obtained, and the precision of frequency detection of the PWM signal can be improved.

The utility model provides a voltage frequency monitoring alarm system. The system comprises a control module, and a monitoring input module, a buzzing alarm module, a light indication module and a power supply module which are connected with the control module, wherein the power supply module supplies power to the monitoring input module, the buzzing alarm module and the light indication module at the same time. According to the invention, the current transformer unit senses the frequency change of the voltage to be monitored, the photoelectric coupler unit is utilized to form the DC pulse voltage for the control module to carry out frequency monitoring, and the buzzing alarm module and the light indication module are further combined to realize the acousto-optic display of the frequency monitoring result. By using a simple system structure, rapid and effective output voltage frequency monitoring can be realized, the condition that the voltage frequency is unstable can be reflected in time, and the downstream equipment fault problem caused by voltage frequency fluctuation can be prevented.

The application provides a frequency standard measurement method, device, computer equipment and storage medium, the method comprises: frequency source output measurement signal is carried out frequency division processing, obtains low frequency pulse signal; using high-precision time interval counter to low frequency pulse signal is carried out delay measurement and time interval counting, and is output in the form of time stamp; by setting a sliding window, using sliding average algorithm to time stamp is carried out sliding average filtering processing, all time stamps are carried out sliding difference to obtain time difference, time difference is grouped according to order and is taken average in group to obtain average time difference; by increasing the length of the sliding window, the number of samples is increased to reduce the statistical error; using average time difference, calculate frequency measurement value, relative frequency deviation and allan variance. The method of the application increases the sliding window, and the frequency measurement result obtained by the algorithm of grouping and averaging the time difference has higher measurement precision and stability.

The invention belongs to the technical field of primary and secondary fusion pole-mounted switch signal measurement assembly protection, and particularly relates to a primary and secondary fusion pole-mounted switch signal measurement device and method. Comprising an EMC filtering protection module connected with a pole-mounted switch, a secondary signal analog quantity AD sampling module, a frequency measurement module, a power supply module, a state quantity detection module and a signal processing coding module. The EMC filtering protection module is respectively connected with the secondary signal analog quantity AD sampling module, the frequency measurement module, the power supply module and the state quantity detection module, and the secondary signal analog quantity AD sampling module, the frequency measurement module and the state quantity detection module are all connected with the signal processing coding module. According to the technical scheme provided by the invention, the device has the capability of independently carrying out related electromagnetic compatibility (EMC) tests, is relatively high in anti-interference performance, is not easy to damage, and is more suitable for a complex power grid operation environment, so that the reliability of the device is improved, the maintenance cost is reduced, and meanwhile, the signal acquisition precision is also improved.

The embodiment of the invention discloses a clock signal frequency detection circuit. The circuit comprises a first edge pulse generator, a first latch, a switch module, a time length comparison module and a second edge pulse generator. The first edge pulse generator is used for generating a first clock edge pulse signal according to the edge of a to-be-tested clock signal; the first latch is used for receiving a first clock edge pulse signal and generating a first control signal according to the first clock edge pulse signal; the switch module is switched on or switched off according to the first control signal; the time length comparison module is used for comparing the period of the first clock edge pulse signal with reference time and outputting a comparison result; the second edge pulse generator is used for generating a second clock edge pulse signal according to the edge of the comparison result. According to the technical scheme provided by the embodiment of the invention, the time length comparison module is opened at the edge of the to-be-detected clock signal and closed after comparison, so that low-power-consumption clock signal frequency detection is realized.

The application provides a method for extracting the bulk acoustic resonant frequency of a resonator, which is based on the rate of change of the electric conductance obtained by deriving the electric conductance with respect to the frequency, to obtain the bulk acoustic resonant frequency of the resonator, which is equivalent to solving the noise problem and the problem that the bulk acoustic corresponding admittance value is relatively fuzzy in the corresponding relationship between the admittance and the frequency by using a mathematical calculation method, thereby improving the accuracy of the extracted bulk acoustic resonant frequency. Moreover, because it is based on the corresponding relationship between the measured admittance and the frequency, the reliability of the extracted bulk acoustic resonant frequency can be improved. In addition, it also has at least higher scalability and calculation speed.

Embodiments of the present disclosure relate to quality factor estimation of an inductive element. The present disclosure relates to an apparatus comprising: an inductive element and a first capacitive element connected in series between a first node and a second node; a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled to the third node directly or via a second MOS transistor; a second capacitive element connected between a fourth node and an interconnection node, the interconnection node being located between the first capacitive element and the inductive element; a current generator configured to provide an AC current to the fourth node; and a switch connected between the fourth node and the third node.

A clock monitoring circuit includes a clock enable signal generator configured to generate an ultra-high frequency clock enable signal based on a clock enable control signal and a reference clock signal, and an ultra-high frequency detector configured to generate an ultra-high frequency determination signal indicating whether a selection clock signal is an ultra-high frequency signal, based on the selection clock signal, the ultra-high frequency clock enable signal, and the reference clock signal.

The invention provides a hydraulic turbine set broadband residual voltage signal automatic gain adjustment detection circuit which comprises a PT voltage acquisition circuit, a signal amplification circuit and a zero crossing point detection circuit which are electrically connected in sequence, and the circuits cooperate to process and detect PT residual voltage signals. The signal amplification circuit comprises a signal first-stage amplification circuit and a signal multi-stage amplification circuit which are connected in sequence, and inter-stage feedback is achieved between the signal first-stage amplification circuit and the signal multi-stage amplification circuit through a negative feedback adjusting circuit. An automatic gain adjustment detection circuit is integrated in a frequency measurement module, so that a PT signal can be directly accessed to the frequency measurement module, and a special shaping circuit board is not needed to pre-process the signal; the circuit has the functions of residual voltage signal isolation, amplification, filtering, automatic gain adjustment, zero crossing point detection and the like. The problems that an existing shaping plate cannot adapt to rapid signal change and cannot detect a signal zero crossing point are solved.

The invention discloses a batch automatic detection method and system for internal clocks of a chip. The method comprises the following steps: providing a clock frequency measurement module taking a reference crystal oscillator as a reference clock source in a chip, introducing all internal clocks of the chip into the clock frequency measurement module, carrying out frequency test through a software calling module, identifying all the internal clocks by software in a dynamic enumeration mode and carrying out measurement one by one, start and stop of the module can be controlled through the register, and the software plug-in calls a driver in an application layer and generates a test report. The system comprises a reference clock module, a clock frequency measurement module, a measurement control module, a driving module and a software plug-in module. The method and the system do not need to change hardware equipment and a circuit board, do not need to depend on an external measuring tool, are high in detection efficiency, comprehensive in coverage and accurate in result, do not affect normal operation of other functional modules of the chip, and are suitable for chip design verification, communication, computers, consumer electronics and other scenes using system-level chips.

The application provides a kind of wideband electronic reconnaissance signal fine frequency measurement implementation method based on FPGA.The traditional electronic reconnaissance signal frequency measurement method is FFT frequency measurement method, in the face of increasingly complex electronic reconnaissance environment, signal bandwidth gradually increases etc.Situation, using traditional fine frequency measurement method error is larger, real-time cannot be guaranteed.According to the deficiency, the application is based on the demand of wideband electronic reconnaissance signal fine frequency measurement, using the characteristics of FPGA flow processing, a kind of multi-channel parallel fine frequency measurement implementation method based on FPGA is designed, the effectiveness of the method is illustrated by typical wideband electronic reconnaissance signal example, effectively make up for the deficiency of traditional processing method.The application can be used in electronic reconnaissance, electronic countermeasure and radar signal processing field, provide a kind of accurate measurement wideband electronic reconnaissance signal frequency method, with higher frequency measurement accuracy, stronger parallel ability, better real-time characteristics.

A power grid frequency measurement apparatus and method, making the final obtained power grid frequency have both good real-time performance and high accuracy. The power grid frequency measurement apparatus (100) comprises: a synchronous motor (110), configured to be connected to a power grid and rotate under the drive of grid power; and a rotational speed measurement apparatus (120), configured to be connected to the synchronous motor (110) and output a target parameter on the basis of the rotational speed of the synchronous motor (110), wherein the target parameter indicates the power grid frequency.

The invention discloses a wide-range conversion device for multi-voltage output, and relates to the technical field of power systems. Comprising a distributed data acquisition array which comprises seven independent acquisition units, the seven independent acquisition units are used for acquiring input measured high-voltage direct-current voltage, low-voltage alternating-current voltage and power grid frequency and output measured seven paths of load voltage-and load current-respectively, the acquisition units are synchronized through optical fibers, the synchronization error is smaller than or equal to 2 microseconds, and the voltage acquisition bandwidth is larger than or equal to 1 MHz. 85V-1000V alternating-current and direct-current input compatibility is realized through the wide-range adaptive module, the dynamic adjustment response time of the transformation ratio of the transformer is less than or equal to 100us, the problem of efficiency attenuation of a traditional device in a voltage fluctuation scene is solved, the output ripple is less than or equal to 10mv peak-to-peak value through the seven-channel independent isolation design, and the output ripple is less than or equal to 10mv peak-to-peak value. And the time sequence synchronization module is matched to realize accurate control of the phase difference less than or equal to 0.5 degree, and cross interference between channels is thoroughly eliminated.

The invention discloses a method for automatically identifying pi pulse time of a mercury ion microwave clock, which comprises the following steps of: setting a time sequence: performing on-off operation by external equipment according to a specified time sequence; fluorescence signals are collected, and the single-chip microcomputer is used for collecting the fluorescence signals; performing transition probability scanning, setting microwave source dot frequency, microwave action starting time, microwave action stopping time and microwave action time stepping, and performing transition probability scanning in a Rabi mode by using an external reference source as a reference signal to obtain a transition probability scanning curve; and based on the transition probability spectral line, carrying out nonlinear fitting on the data, drawing a new transition probability function curve, solving a new transition probability function derivative, further confirming a pi pulse range, and identifying the pi pulse. The method provided by the invention has the advantages of full-automatic operation, high intelligent identification precision and good system flexibility, the experiment efficiency is improved, and the experiment error is reduced.

The disclosed embodiments relate to sensing the state and state changes of signals and sensors for such sensing, including but not limited to autonomous sensors. Such sensors may include analog signal threshold detection circuitry, state detection circuitry, and measurement circuitry. The analog signal threshold detection circuitry may be configured to alternately assert and de-assert a threshold detection indication in response to an input signal and its state. The state detection circuitry may be configured to generate a signal state indication regarding the state of the input signal. The measurement circuitry may be configured to generate a measurement result, such as a count, a conversion rate, or a frequency, in response to assertion of the threshold detection indication and the signal state indication. In some embodiments, the disclosed sensor may have a programmable threshold value for sensing signal states and changes therein.

The invention discloses a dynamic calibration equal-precision frequency measurement method based on STM32. The method comprises the following steps: initializing a first timer and a second timer; inputting a reference standard signal to a first channel of the first timer, calculating gate time when the reference standard signal is input, and calculating a theoretical count value of a counter of the second timer when the reference standard signal is input; reading the register value of the counter of the second timer after the gate time is ended, and calculating the ratio of the theoretical count value of the second timer to the register value of the counter of the second timer as a correction parameter; inputting a measured signal to the first channel of the first timer, reading the register value of the counter of the second timer, and calculating the frequency of the measured signal in combination with the correction parameter. Counting errors caused by hardware delay errors in the current environment can be dynamically compensated by correcting parameters, the measurement precision of different frequency points is improved, additional capture interruption does not need to be arranged, operation is easy, and the measurement precision is high.

The invention belongs to the field of electric energy meter metering, and discloses a power grid frequency change reactive error compensation method, system and device and a medium, and the method comprises the steps: obtaining frequency values sampled by a metering chip, splitting the frequency values based on a central point, and obtaining the central point frequency of each frequency value; inputting the central point frequency of each frequency value extracted from the sample table and a pre-configured output frequency into an initial fundamental reactive phase correction register together for processing to obtain a register value of the central point frequency; and inputting the frequency values, the central point frequencies of the frequency values and the register values of the central point frequencies into a fundamental wave reactive phase correction register for calculation to obtain a meter calibration parameter checksum, and storing the meter calibration parameter checksum to realize dynamic reactive error compensation. According to the method, the phase correction register is dynamically corrected through a statistical method in combination with a software algorithm, the reactive error of the reactive primary table can be kept within an ideal range within a power grid frequency range, and the energy metering accuracy is improved.

To provide a frequency delta-sigma modulation signal output circuit capable of generating a frequency delta-sigma modulation signal with reduced noise components.SOLUTION: A frequency delta-sigma modulation signal output circuit includes: a phase modulation circuit that generates a phase modulation signal by generating n delay signals by delaying a signal under measurement, where n is any integer greater than or equal to 2, and randomly selecting one of the n delay signals in synchronization with the signal under measurement; and a frequency ratio digital conversion circuit that generates a frequency delta-sigma modulated signal using a reference signal and the phase modulation signal.SELECTED DRAWING: Figure 1

The present disclosure relates to the technical field of frequency detection, and proposes a frequency detection method and system. The method comprises: converting an acquired to-be-detected signal into a pulse form of a detected signal; acquiring a plurality of high-frequency clock signals with a set phase difference; performing frequency division processing on the high-frequency clock signals to convert them into a reference clock signal; using a serial-parallel conversion method to detect the time instants of two rising edges or falling edges of adjacent periods of the detected signal and output corresponding multi-bit parallel detection values; merging the multi-bit parallel detection values output after detection using the serial-parallel conversion method of the plurality of high-frequency clock signals according to phase relationships to obtain combined parallel detection values, and calculating the frequency value of the detected signal. The present disclosure uses a serial-parallel conversion method to fuse phase-shift detection, and realizes more accurate identification of the position of a rising edge in the case that the to-be-detected signal and the reference signal are not aligned, thereby improving the detection accuracy of the frequency.

This invention provides a temperature-monitored field stabilization method and system, relating to the field of permanent magnet magnetic resonance (PMMR). The method acquires temperature data from a magnet and simultaneously measures the proton resonance signal frequency using a magnetic resonance probe to obtain temperature-frequency data. The data is preprocessed and feature extracted, and a specially tuned feature extraction neural network and a time-series analysis neural network structure are introduced to construct a nonlinear mapping model between the spatiotemporal distribution of the temperature field and frequency drift, enabling frequency prediction. A Z0 compensation coil then generates a compensation magnetic field to fine-tune the magnetic field. This invention significantly reduces frequency drift caused by ambient temperature fluctuations without requiring a complex hardware platform, compressing the drift from hundreds of Hz to the order of several Hz. This effectively improves the testing accuracy, long-term stability, and repeatability of permanent magnet PMMR systems, and is applicable to scenarios such as permanent magnet PMMR analysis instruments, permanent magnet magnetic field control systems, and long-term online monitoring equipment.

The embodiment of the invention provides a power grid frequency measurement device and method. The finally obtained power grid frequency is good in real-time performance and high in accuracy. The device for measuring the frequency of the power grid comprises a synchronous motor which is configured to be connected to the power grid and is driven by the power of the power grid to rotate; and the rotating speed measuring device is configured to be connected with the synchronous motor and output target parameters according to the rotating speed of the synchronous motor, and the target parameters indicate the power grid frequency.

The present disclosure provides a method for analyzing a signal, the method comprising receiving an incoming square-wave-like signal that comprises a predetermined frequency and a variable duty cycle, continuously forming the first derivative of the incoming square-wave-like signal, and determining at least one of the frequency, and the duty cycle of the received signal based on the first derivative. Further, the present disclosure provides a measurement application device.

In an implementation, a method may include receiving an input clock at an input pin of a device, the device having a Joint Test Action Group (JTAG) test access port (TAP). The method may also include counting a first number of cycles of a reference clock using a first counter. The method may furthermore include simultaneously counting a second number of cycles of the input clock received at the input pin using a second counter. The method may in addition include calculating a frequency of the input clock based on the counted first number of cycles of the reference clock, the counted second number of cycles of the input clock, and a frequency of the reference clock.

An integrated circuit can include frequency monitoring circuitry. The frequency monitoring circuitry may include a voltage based frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a first set of frequencies and a coarse frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a second set of frequencies different than the first set of frequencies. The voltage based frequency monitoring circuit can be configured to generate an output voltage having a first value when the input clock frequency is greater than a reference frequency and having a second value when the input clock frequency is less than the reference frequency. The coarse frequency monitoring circuit can include a reference counter and an input clock counter that generates a count value used to compute the input clock frequency.

The invention relates to a fast and slow clock frequency detection method and system suitable for an MCU, belongs to the technical field of integrated circuits, and solves the problems that an existing circuit is complex in design and inaccurate in problem positioning. Comprising the following steps: receiving an AHB bus signal, and obtaining a frequency detection parameter; performing frequency division on the scale clock to obtain a frequency division clock signal; shifting the frequency division clock signal at the rising edge of the clock to be tested to obtain a shift signal, identifying the edge of the scale clock according to the shift signal, and alternately switching the two counter marks; the corresponding frequency counter is reloaded according to the counter mark, the reloaded frequency counter obtains and loads a corresponding counting threshold value according to the frequency detection parameter, counting is carried out to obtain an actual counting value, when the counter mark is switched, whether clock frequency errors are generated or not is recognized according to the actual counting value, if yes, the number of times of errors is accumulated, and if not, the clock frequency errors are detected. And when the number of continuous errors reaches an alarm threshold value in the frequency detection parameters, outputting error information. Accurate detection of the clock frequency is realized.

The application relates to the field of electronic measurement technology, in particular to a high-precision frequency measurement method based on a surface acoustic wave filter, which comprises a D flip-flop circuit, a surface acoustic wave circuit and an FPGA circuit which are electrically connected in sequence. The FPGA circuit generates a gate signal to control the D flip-flop circuit to accurately extract the start and stop pulses of the integer multiple periods of a to-be-measured signal, and a narrow-band signal stretched in time domain is obtained through the surface acoustic wave filter. After high-speed sampling and interpolation of the narrow-band signal through an ADC circuit, autocorrelation operation is performed on the narrow-band signal, and a time interval measurement value, i.e. the integer multiple period value of the to-be-measured signal, is obtained. Finally, the period value of the to-be-measured signal is obtained by combining the counting value of the complete pulse of the to-be-measured signal in the gate time of the FPGA circuit, and the frequency measurement value is obtained through conversion. The application realizes a high-precision and high-stability frequency measurement method based on the time interval measurement method of the surface acoustic wave filter and the multi-period synchronization technology controlled by the FPGA circuit.

The application aims to provide a FPGA-based adaptive frequency measurement device and test method with higher adaptability, multiple measurement ranges, improved measurement accuracy and controlled measurement time. The application comprises a high-speed voltage comparator, a FPGA frequency measurement module and an operation unit connected in sequence, the high-speed voltage comparator is connected to a measured signal, the high-speed voltage comparator converts the measured signal into a digital pulse, the FPGA frequency measurement module performs measurement counting to obtain a counting result of the measured signal and a reference clock counting result, and the operation unit calculates the frequency of the measured signal. The application is applied to the technical field of digital frequency measurement.