63results about "Frequency to pulse train conversion" patented technology

This signal processing circuit is provided with: a filter that performs filtering on an input signal; and a filter coefficient changing unit that automatically changes a coefficient of the filter in accordance with the frequency of the input signal.

The invention relates to the technical field of electric power detection, and provides a low-voltage and low-frequency load shedding function test method and a test device, in the on-site real-model test process, the test method and the test device are hung on a grid along with an FTU, the voltage and frequency change of the power grid and the action of the FTU are recorded in real time, a broken line graph is generated through upper computer software, and the action process of on-site low-voltage and low-frequency detection is displayed. Whether the device correctly executes the low-voltage and low-frequency load shedding action or not is visually observed, and the method has high practical significance (fault prevention), asset configuration optimization (service life prolonging) and final service for efficient, reliable and economical operation of a power grid.

An integrated circuit may include frequency monitoring circuitry. The frequency monitoring circuitry may include a voltage-based frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a first set of frequencies and a coarse frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a second set of frequencies different from the first set of frequencies. The voltage-based frequency monitoring circuit may be configured to generate an output voltage having a first value when the input clock frequency is greater than a reference frequency and a second value when the input clock frequency is less than the reference frequency.The coarse frequency monitoring circuitry may include a reference counter and an input clock counter that generates a count value used to calculate the input clock frequency.

The embodiment of the invention provides a signal period measurement method, a microcontroller, a storage medium and a program product, and relates to the technical field of signal frequency detection, the method comprises the following steps: in response to a timer capture event or a timer overflow event, executing an interrupt service program of a central processing unit; executing the interrupt service program of the central processing unit, which comprises the following steps of: when the interrupt service program is determined to be called in response to the timer overflow event, performing cumulative counting on the occurrence frequency of the timer overflow event to obtain a cumulative overflow frequency; and under the condition of determining that the interrupt service program is called in response to the timer capture event, calculating an actual period value of the tested signal according to the current accumulated overflow times and the capture period value, and resetting the accumulated overflow times. According to the embodiment of the invention, the period is calculated through the cumulative counting of the timer overflow events and the counting of the timer capture events, and the problem that the timer is limited by digits and cannot give consideration to low-frequency band width period coverage and measurement precision is solved.

A method for controlling an analog-digital converter comprising first and second oscillators, and first and second elements, the method comprising a first step during which the first and second oscillators generate frequencies depending on an electrical characteristic of the first element and of the second element, respectively, and a second step during which the first and second oscillators generate frequencies depending on the electrical characteristic of the second element and of the first element, respectively.

The invention discloses a PWM signal frequency detection method and device and a household appliance, and belongs to the technical field of household appliances. The PWM signal frequency detection method comprises the following steps: counting based on a counting period, and obtaining an initial period value based on counting values when a target edge of a PWM signal is continuously captured twice; the target edge comprises at least one of a rising edge and a falling edge; under the condition that the initial period value is in the first range, multiplying a counting frequency value corresponding to the counting period by a target multiple, dividing by the initial period value, and rounding down to obtain an initial rotating speed value; the target multiple is the multiple of the rotating speed of the target equipment relative to the working frequency of the target equipment; and obtaining the value of the actual frequency of the PWM signal based on the quotient obtained by dividing the initial rotating speed value by the target multiple. According to the PWM signal frequency detection method and device, and the household electrical appliance provided by the invention, a more accurate frequency value can be obtained, and the precision of frequency detection of the PWM signal can be improved.

The utility model provides a voltage frequency monitoring alarm system. The system comprises a control module, and a monitoring input module, a buzzing alarm module, a light indication module and a power supply module which are connected with the control module, wherein the power supply module supplies power to the monitoring input module, the buzzing alarm module and the light indication module at the same time. According to the invention, the current transformer unit senses the frequency change of the voltage to be monitored, the photoelectric coupler unit is utilized to form the DC pulse voltage for the control module to carry out frequency monitoring, and the buzzing alarm module and the light indication module are further combined to realize the acousto-optic display of the frequency monitoring result. By using a simple system structure, rapid and effective output voltage frequency monitoring can be realized, the condition that the voltage frequency is unstable can be reflected in time, and the downstream equipment fault problem caused by voltage frequency fluctuation can be prevented.

An apparatus includes a clock signal input, a sampling circuit, and an estimation circuit. The clock signal input receives N time measurements. A time measurement denotes a respective portion of a given cycle of a clock signal. The sampling circuit is to generate a first sampled window from the clock signal input. The first sampled window includes an accumulation of the N time measurements. The sampling circuit is to generate a second sampled window from the clock signal input including an accumulation of a plurality of products. The estimation circuit is to estimate the frequency or period of the clock signal based upon the first sampled window and the second sampled window.

The application provides a frequency standard measurement method, device, computer equipment and storage medium, the method comprises: frequency source output measurement signal is carried out frequency division processing, obtains low frequency pulse signal; using high-precision time interval counter to low frequency pulse signal is carried out delay measurement and time interval counting, and is output in the form of time stamp; by setting a sliding window, using sliding average algorithm to time stamp is carried out sliding average filtering processing, all time stamps are carried out sliding difference to obtain time difference, time difference is grouped according to order and is taken average in group to obtain average time difference; by increasing the length of the sliding window, the number of samples is increased to reduce the statistical error; using average time difference, calculate frequency measurement value, relative frequency deviation and allan variance. The method of the application increases the sliding window, and the frequency measurement result obtained by the algorithm of grouping and averaging the time difference has higher measurement precision and stability.

An apparatus includes a clock signal input, a sampling circuit, and an estimation circuit. The clock signal input receives N time measurements. A time measurement denotes a respective portion of a given cycle of a clock signal. The sampling circuit is to generate a first sampled window from the clock signal input. The first sampled window includes an accumulation of the N time measurements. The sampling circuit is to generate a second sampled window from the clock signal input including an accumulation of a plurality of products. The estimation circuit is to estimate the frequency or period of the clock signal based upon the first sampled window and the second sampled window.

An embodiment of the present application provides an oscillation period detection circuit, method, and semiconductor memory. The oscillation period detection circuit includes: an oscillator module, including a target oscillator, configured to receive an enable signal and control the target oscillator to output an oscillation clock signal according to the enable signal; a control module, configured to receive the enable signal and the oscillation clock signal, perform effective time reorganization processing according to the oscillation clock signal and the enable signal, and determine a target time; a counting module, configured to receive the enable signal and the oscillation clock signal, perform period counting processing according to the enable signal and the oscillation clock signal, and determine a target period number; the oscillation period of the target oscillator is calculated based on the target time and the target period number. In this way, for the enable signal and the oscillation clock signal, the oscillation period is calculated through effective time reorganization processing and period counting respectively, thereby improving the detection accuracy and detection efficiency of the oscillation period.

The invention belongs to the technical field of primary and secondary fusion pole-mounted switch signal measurement assembly protection, and particularly relates to a primary and secondary fusion pole-mounted switch signal measurement device and method. Comprising an EMC filtering protection module connected with a pole-mounted switch, a secondary signal analog quantity AD sampling module, a frequency measurement module, a power supply module, a state quantity detection module and a signal processing coding module. The EMC filtering protection module is respectively connected with the secondary signal analog quantity AD sampling module, the frequency measurement module, the power supply module and the state quantity detection module, and the secondary signal analog quantity AD sampling module, the frequency measurement module and the state quantity detection module are all connected with the signal processing coding module. According to the technical scheme provided by the invention, the device has the capability of independently carrying out related electromagnetic compatibility (EMC) tests, is relatively high in anti-interference performance, is not easy to damage, and is more suitable for a complex power grid operation environment, so that the reliability of the device is improved, the maintenance cost is reduced, and meanwhile, the signal acquisition precision is also improved.

A near field communication (NFC) device includes a resonator having an antenna and a matching circuit, a transmitter, and a frequency detector. The transmitter generates a sense voltage signal at the resonator. Regarding a plurality of measurement periods, each of which includes an on period and an off period, the transmitter is enabled during the on period to output a radio frequency (RF) signal to the resonator and disabled during the off period. The frequency detector detects a resonant frequency of the resonator based on the sense voltage signal. The resonant frequency is accurately detected by measuring the resonant frequency during a plurality of measurement periods. Additionally, the resonant frequency is effectively detected by using the transmitter established in the NFC device to generate the sense voltage signal.

A method for measuring frequency domain characteristics of a PDN having an output terminal connected to a power supply end of a functional circuit. The method includes: a to-be-measured output interface of the functional circuit is acquired; the to-be-measured output interface is controlled to output a first level signal having a first preset rule; remaining at least one output interface of the functional circuit, other than the to-be-measured output interface, is controlled to output a second level signal having a second preset rule according to a first frequency; changing voltage values corresponding to the first frequency and output by the to-be-measured output interface are acquired; and a characteristic impedance of the PDN at the first frequency is determined based on the changing voltage values corresponding to the first frequency.

The embodiment of the invention discloses a clock signal frequency detection circuit. The circuit comprises a first edge pulse generator, a first latch, a switch module, a time length comparison module and a second edge pulse generator. The first edge pulse generator is used for generating a first clock edge pulse signal according to the edge of a to-be-tested clock signal; the first latch is used for receiving a first clock edge pulse signal and generating a first control signal according to the first clock edge pulse signal; the switch module is switched on or switched off according to the first control signal; the time length comparison module is used for comparing the period of the first clock edge pulse signal with reference time and outputting a comparison result; the second edge pulse generator is used for generating a second clock edge pulse signal according to the edge of the comparison result. According to the technical scheme provided by the embodiment of the invention, the time length comparison module is opened at the edge of the to-be-detected clock signal and closed after comparison, so that low-power-consumption clock signal frequency detection is realized.

The present disclosure provides an oscillation period detection circuit, a method, and a semiconductor memory. The oscillation period detection circuit includes: an oscillator module including a target oscillator, configured to receive an enable signal and control the target oscillator to output an oscillation clock signal based on the enable signal; a control module configured to receive the enable signal and the oscillation clock signal, perform a valid time reset process based on the oscillation clock signal and the enable signal, and determine a target time; and a counting module configured to receive the enable signal and the oscillation clock signal, perform a period counting process based on the enable signal and the oscillation clock signal, and determine a target period number. The oscillation period of the target oscillator is calculated based on the target time and the target period number.

The application provides a method for extracting the bulk acoustic resonant frequency of a resonator, which is based on the rate of change of the electric conductance obtained by deriving the electric conductance with respect to the frequency, to obtain the bulk acoustic resonant frequency of the resonator, which is equivalent to solving the noise problem and the problem that the bulk acoustic corresponding admittance value is relatively fuzzy in the corresponding relationship between the admittance and the frequency by using a mathematical calculation method, thereby improving the accuracy of the extracted bulk acoustic resonant frequency. Moreover, because it is based on the corresponding relationship between the measured admittance and the frequency, the reliability of the extracted bulk acoustic resonant frequency can be improved. In addition, it also has at least higher scalability and calculation speed.

Embodiments of the present disclosure relate to quality factor estimation of an inductive element. The present disclosure relates to an apparatus comprising: an inductive element and a first capacitive element connected in series between a first node and a second node; a first MOS transistor connected between the first node and a third node configured to receive a reference potential, the second node being coupled to the third node directly or via a second MOS transistor; a second capacitive element connected between a fourth node and an interconnection node, the interconnection node being located between the first capacitive element and the inductive element; a current generator configured to provide an AC current to the fourth node; and a switch connected between the fourth node and the third node.

To heighten the accuracy of measuring a clock signal without using a high-frequency sampling clock signal.SOLUTION: A clock signal measurement device 50 is a device that operates in synchronism with a sampling clock signal 502, and comprises: a sampling unit 51 for generating a first clock signal 510 sampled from a clock signal 501 to be measured; a clock signal generation unit 52 for generating a second clock signal 520 having a frequency of a set value 550; a discrimination unit 53 for calculating a difference between the wavenumber of the first clock signal 510 and the wavenumber of the second clock signal 520 from a prescribed time of day; an integration unit 54 for calculating an integrated value of the differences for each prescribed measurement period; and an adjustment unit 55 for adjusting the set value 550 so that the absolute value of the integrated value becomes smaller, and outputting the adjusted set value 550 as a new set value 550 to the clock signal generation unit 52 and to the outside.SELECTED DRAWING: Figure 9

An electronic device includes a baseline current generator configured to generate a baseline current based on a reference current generated by a reference current generator, variable impedance circuitry configured to receive the baseline current, and subtraction circuitry configured to receive a measured voltage based on a result of the reference current being applied to a target impedance, and an estimated voltage generated based on a result of the baseline current being applied to the variable impedance circuitry and subtract the estimated voltage from the measured voltage.

The embodiments of the present disclosure provide an oscillation period detection circuit and method, and semiconductor memory. The oscillation period detection circuit includes an oscillator module, a control module, and a counting module. The oscillator module includes a target oscillator, and is configured to receive an enable signal and control the target oscillator to output an oscillation clock signal according to the enable signal; the control module is configured to receive the enable signal and the oscillation clock signal, and perform valid time reforming processing according to the oscillation clock signal and the enable signal to determine a target time; the counting module is configured to receive the enable signal and the oscillation clock signal, and perform period counting processing according to the enable signal and the oscillation clock signal to determine a target period number. The oscillation period of the target oscillator is calculated according to the target time and the target period number.

The present invention relates to the field of frequency measurement, and particularly to a digital frequency meter, which includes a preprocessing unit, a first control unit, a second control unit, and a voice broadcast unit. Among them, the input signal is output to the first control unit after passing through the preprocessing unit. The first control unit is connected to the preprocessing unit and measures the output information of the preprocessing unit. The first control unit is also connected to the second control unit and transmits the measurement information to the second control unit. The input end of the second control unit is connected to a keyboard, and the measurement information is output according to the input information of the keyboard. The voice broadcast unit is connected to the second control unit and broadcasts the output information of the second control unit in voice. The digital frequency meter provided by the present invention has the functions of measuring frequency, duty cycle, and time interval, and can perform voice broadcast. The digital frequency meter provided by the present invention has higher accuracy.

The invention provides a frequency scale measurement method and device, computer equipment and a storage medium, and the method comprises the steps: carrying out the frequency division processing of a measurement signal outputted by a frequency source, and obtaining a low-frequency pulse signal; carrying out delay measurement and time interval counting on the low-frequency pulse signal by using a high-precision time interval counter, and outputting the low-frequency pulse signal in a timestamp form; the method comprises the following steps of: setting a sliding window, carrying out sliding average filtering processing on timestamps by utilizing a sliding average algorithm, carrying out sliding action difference on all the timestamps to obtain time differences, grouping the time differences in sequence, and averaging in groups to obtain average time differences; the number of measured samples is increased by increasing the length of the sliding window, so that statistical errors are reduced; a frequency measurement value, a relative frequency deviation and an Arron variance are calculated using the average time difference. According to the method provided by the invention, the sliding window is increased, and the frequency measurement result is obtained by using the algorithm of grouping and averaging the time difference, so that the method has higher measurement precision and stability.

A clock monitoring circuit includes a clock enable signal generator configured to generate an ultra-high frequency clock enable signal based on a clock enable control signal and a reference clock signal, and an ultra-high frequency detector configured to generate an ultra-high frequency determination signal indicating whether a selection clock signal is an ultra-high frequency signal, based on the selection clock signal, the ultra-high frequency clock enable signal, and the reference clock signal.

The present disclosure provides a frequency signal acquisition system, a method, a device, and a medium using the frequency signal acquisition system. The system includes: a signal acquisition module configured to receive a frequency signal and a predetermined time signal at an input end of the signal acquisition module, respectively, and generate a trigger signal when the received frequency signal meets a predetermined condition within a predetermined time; and a control unit configured to be communicatively connected to the signal acquisition module to provide the predetermined time signal to the signal acquisition module and receive a trigger signal from the signal acquisition module, thereby determining the frequency of the received frequency signal through the trigger signal, wherein the predetermined condition includes a rising edge interrupt and a falling edge interrupt of the received frequency signal.

The invention provides a hydraulic turbine set broadband residual voltage signal automatic gain adjustment detection circuit which comprises a PT voltage acquisition circuit, a signal amplification circuit and a zero crossing point detection circuit which are electrically connected in sequence, and the circuits cooperate to process and detect PT residual voltage signals. The signal amplification circuit comprises a signal first-stage amplification circuit and a signal multi-stage amplification circuit which are connected in sequence, and inter-stage feedback is achieved between the signal first-stage amplification circuit and the signal multi-stage amplification circuit through a negative feedback adjusting circuit. An automatic gain adjustment detection circuit is integrated in a frequency measurement module, so that a PT signal can be directly accessed to the frequency measurement module, and a special shaping circuit board is not needed to pre-process the signal; the circuit has the functions of residual voltage signal isolation, amplification, filtering, automatic gain adjustment, zero crossing point detection and the like. The problems that an existing shaping plate cannot adapt to rapid signal change and cannot detect a signal zero crossing point are solved.

The invention discloses a batch automatic detection method and system for internal clocks of a chip. The method comprises the following steps: providing a clock frequency measurement module taking a reference crystal oscillator as a reference clock source in a chip, introducing all internal clocks of the chip into the clock frequency measurement module, carrying out frequency test through a software calling module, identifying all the internal clocks by software in a dynamic enumeration mode and carrying out measurement one by one, start and stop of the module can be controlled through the register, and the software plug-in calls a driver in an application layer and generates a test report. The system comprises a reference clock module, a clock frequency measurement module, a measurement control module, a driving module and a software plug-in module. The method and the system do not need to change hardware equipment and a circuit board, do not need to depend on an external measuring tool, are high in detection efficiency, comprehensive in coverage and accurate in result, do not affect normal operation of other functional modules of the chip, and are suitable for chip design verification, communication, computers, consumer electronics and other scenes using system-level chips.

Systems and methods relate a device for monitoring or tracking clock frequency. The device can include a first circuit configured to receive a reference clock signal and provide a first signal in response to a first number of cycles of the reference clock signal, and a second circuit configured to receive a sample clock signal and provide a second signal in response to the first signal. The second signal is indicative of a second number of cycles of the sample clock signal occurring during the first number of cycles of the reference clock signal. The device can also include a third circuit configured to determine a ratio of a first frequency of the reference clock signal to a second frequency of the sample signal using the second signal.

The application provides a kind of wideband electronic reconnaissance signal fine frequency measurement implementation method based on FPGA.The traditional electronic reconnaissance signal frequency measurement method is FFT frequency measurement method, in the face of increasingly complex electronic reconnaissance environment, signal bandwidth gradually increases etc.Situation, using traditional fine frequency measurement method error is larger, real-time cannot be guaranteed.According to the deficiency, the application is based on the demand of wideband electronic reconnaissance signal fine frequency measurement, using the characteristics of FPGA flow processing, a kind of multi-channel parallel fine frequency measurement implementation method based on FPGA is designed, the effectiveness of the method is illustrated by typical wideband electronic reconnaissance signal example, effectively make up for the deficiency of traditional processing method.The application can be used in electronic reconnaissance, electronic countermeasure and radar signal processing field, provide a kind of accurate measurement wideband electronic reconnaissance signal frequency method, with higher frequency measurement accuracy, stronger parallel ability, better real-time characteristics.

A power grid frequency measurement apparatus and method, making the final obtained power grid frequency have both good real-time performance and high accuracy. The power grid frequency measurement apparatus (100) comprises: a synchronous motor (110), configured to be connected to a power grid and rotate under the drive of grid power; and a rotational speed measurement apparatus (120), configured to be connected to the synchronous motor (110) and output a target parameter on the basis of the rotational speed of the synchronous motor (110), wherein the target parameter indicates the power grid frequency.