2933 results about "Oscillistor" patented technology

A temperature control device includes a temperature detector, a difference operation unit, a controller, a saturation processing circuit unit, a rewritable storage unit, and a conversion unit. The difference operation unit operates a digital value corresponding to a difference value between a detected temperature value and a target temperature. The controller calculates a manipulated variable using the digital value operated by the difference operation unit. The saturation processing circuit unit includes a digital circuit to limit an output value of the controller to a pre-set upper limit value. The rewritable storage unit stores the upper limit value read from a storage area of the rewritable storage unit and input into the saturation processing circuit unit. The conversion unit converts the output value of the saturation processing circuit unit into an analog signal to output the converted value as a control command value to the heater.

The invention relates to the technical field of communication, and discloses a network communication chip signal interference suppression processing method. The method comprises the following steps: acquiring a local oscillator phase jitter sequence in real time through an on-chip phase noise monitoring unit; estimating Doppler frequency shift and channel coherence time based on the sequence; dynamically adjusting the closed-loop bandwidth of the phase-locked loop; and generating a phase compensation signal, and performing time-varying channel minimum mean square error equalization in combination with a received baseband signal to eliminate inter-symbol interference. The system integrates a phase noise monitoring function module, a channel parameter estimation function module, a phase-locked loop bandwidth regulation function module, a phase compensation generation function module and an interference joint elimination function module. By means of dynamic bandwidth reconstruction and high-precision phase compensation, the bit error rate under high-speed movement is remarkably reduced, the 5G millimeter wave communication standard requirement is met, and the method has the advantages of being achieved on a whole chip, low in delay and high in robustness.

A four wire-to-two wire lamp control method includes: inputting R, G and B lamp control signals are to corresponding oscillators which are controlled to generate R, G and B oscillation signals; the three oscillation signals being amplified and then coupled into a composite signal which is superposed onto integrated electric power to obtain composite electric power that is transmitted by a two-wire system transmission module. In this way, transformation from a four-wire lamp system to a two-wire lamp system is realized. The composite signal and power are synchronously transmitted in the two-wire system, such that the system can approximately synchronously transmit the composite signal at a low delay, and the integrated electric power can still be transmitted continuously in case of a low duty cycle of the lamp control signals, thus satisfying the requirement for driving power of a lamp.

The invention discloses a multi-entropy source dynamic fusion true random number hardware generation system, which comprises a multi-entropy source acquisition module used for acquiring original entropy signals generated by at least two heterogeneous physical entropy sources in parallel, the heterogeneous physical entropy sources comprising an entropy source based on semiconductor junction thermal noise and an entropy source based on ring oscillator phase jitter; the entropy preprocessing module is used for carrying out adaptive gain adjustment and frequency band filtering on each original entropy signal and converting the original entropy signals into digital bit streams; the entropy source quality evaluation module is used for receiving each digital bit stream in real time and calculating a real-time quality evaluation score of each entropy source based on statistical characteristics of the digital bit streams, i is an entropy source identifier, and t is a time sequence; according to the method, the high randomness, high safety and high reliability of true random number generation can be fundamentally improved.

The invention relates to the technical field of satellite signal processing, and discloses a multi-constellation satellite signal intelligent identification and adaptive acquisition method and system. The method comprises the following steps: performing short-time Fourier transform on a received signal to extract a frequency trajectory matrix, calculating a Doppler frequency shift rate and an acceleration, inputting a multi-task neural network in combination with modulation domain characteristics, and outputting constellation category and interference type identification results, when a low-orbit satellite is identified, a carrier frequency deviation track and uncertainty are predicted through a long-short term memory network, the frequency of a numerical control oscillator is adjusted in advance according to a prediction result, a search window and integral time are dynamically set, and corresponding anti-interference strategies are executed for different interference types. And periodically monitoring the signal quality index, and triggering strategy upgrading when the performance improvement rate is lower than a threshold value. According to the invention, the signal capture success rate and tracking stability in a multi-constellation mixed environment are improved.

The invention relates to the technical field of laser processing process control, and discloses an intelligent control method and system for a laser oscillator, and the method comprises the steps: collecting an optical signal, determining the current spectrum ratio measurement, and adjusting the laser oscillator according to the current spectrum ratio measurement; according to the method and the system, the technical problem that a static control target is easy to lose efficacy when facing working condition drift is solved, the control precision is improved by monitoring the adjusting quantity of the controller, and the control precision is improved. A fast and slow loop self-adaptive control logic is constructed, so that the system obtains the capability of self-calibrating a control target value, thereby being capable of self-adapting to working condition drift caused by material batches or equipment aging, and ensuring long-period process consistency.

The invention relates to the technical field of digital signal processing, and particularly discloses a mixed precision low-resource digital control oscillator implementation method and system based on an FPGA (Field Programmable Gate Array), and the method comprises the steps: dividing a 32-bit phase accumulator into a high-bit 24-bit dominant frequency control section and a low-bit 8-bit dynamic compensation section, and carrying out the phase accumulation in parallel through double carry chains, the high-order section receives high 24 bits of a frequency tuning word FTW to control a dominant frequency, and the low-order section receives low 8 bits of the FTW and overlaps an overflow remainder to dynamically compensate for a phase error. According to the implementation method of the mixed precision low-resource digital control oscillator based on the FPGA disclosed by the embodiment of the invention, through collaborative innovation of mixed precision phase accumulation, hierarchical mixed storage, high-order interpolation reconstruction and dynamic phase compensation, the core problems of a traditional NCO in resource occupation, phase continuity, waveform precision and time sequence performance are systematically solved.

The invention provides a multi-feedback-channel fluid oscillator, and belongs to the technical field of fluid jetting devices. Comprising an oscillation cavity, an inlet, a nozzle and at least three feedback channels, the inlet is formed in one end of the oscillation cavity, the nozzle is formed in the other end of the oscillation cavity, the nozzle and the inlet are oppositely arranged along the central axis of the oscillation cavity, and the feedback channels are circumferentially distributed around the central axis of the oscillation cavity. And each feedback channel is provided with a feedback channel inlet and a feedback channel outlet. Through the configuration design of the multiple feedback channels, the fluid can form feedback control flow through the feedback channels, and the fluid entering the oscillation cavity through the inlet flows along the wall of the oscillation cavity in multiple directions and is switched through the coupling effect of the fluid coanda effect and multi-channel backflow feedback. And finally, multi-direction sweeping self-oscillation jet flow is formed at the nozzle, so that the space coverage range and the atomization efficiency of the jet flow are greatly improved.

The utility model discloses an ultrasonic phased array detection device for a circumferential weld, which comprises a frame used for placing a workpiece; the detector is used for detecting a welding seam; the oscillator oscillates the welding seam when approaching the welding seam; the spray head blows external high-pressure gas to a welding seam; and the moving assembly drives the detector, the oscillator and the spray head to move in the hemispherical space. The beneficial effects of the utility model are that through cooperative operation of the moving assembly and the arc-shaped assembly, multi-angle detection of a workpiece is facilitated, and the detection precision is effectively improved; and through the combined action of the oscillator and the spray head, welding slag can be conveniently cleaned, and the detection precision is indirectly improved.

The invention provides a design method and system of a high-speed RC clock system. The system comprises a high-speed RC oscillator, a reference clock module, a clock calibration module, a trigger module and a state machine module. The method comprises the following steps of: controlling a calibration process through a state machine module, counting a high-frequency clock signal by taking a theoretical count value as a reference after a clock calibration module is triggered, judging whether the frequency has deviation or not and the direction of the deviation according to a counting result, performing stepping adjustment on a calibration value, and performing frequency adjustment on a high-speed RC oscillator. And circularly executing the calibration step until the counting result falls into an allowable error range. A phase-locked loop circuit does not need to be additionally arranged, high and low temperature calibration in the production stage does not need to be introduced, the chip design complexity, the manufacturing cost and the production test cost can be effectively reduced, meanwhile, high precision and stability of clock signals are ensured, and output of a low-cost, high-frequency and high-precision RC clock is achieved.

The invention discloses a GPS oscillator taming system and method based on PID parameter adaptive adjustment, and the system comprises a forgetting factor dynamic updating module which is used for dynamically updating a forgetting factor with the variance of the frequency error of VC-TCXO as a negative index; the system identification module is used for estimating ARX model parameters of the VC-TCXO by adopting a recursive least square algorithm with the updated forgetting factor; the model parameter mapping module is used for mapping the estimated ARX model parameters to obtain PID control parameters; the incremental PID controller is used for calculating a frequency control word increment based on the frequency error; the digital-to-analog converter is used for calculating according to the frequency control word increment to obtain a frequency control word and converting the frequency control word into analog voltage; and the VC-TCXO is used for obtaining the frequency of the GPS reference signal based on the analog voltage corresponding to the frequency control word so as to complete frequency taming. The method is high in calculation efficiency and robustness, and can adapt to the dynamic change and external disturbance of the controlled object in real time.

The invention provides a virtual inertia adaptive control method, device and system, and relates to the technical field of inverter system control. The method comprises the following steps: calculating a reference current value according to a power reference value and an actual output voltage; calculating a current deviation value according to the reference current value and the actual output current value; outputting the current deviation value to an adaptive resonance controller to obtain a compensation control voltage signal; inputting the compensation control signal to an AHO virtual oscillator to obtain a reference value of the output voltage of the inverter; and controlling the output of the three-phase inverter circuit according to the reference value of the inverter output voltage. Wherein the adaptive resonance controller carries out adaptive control through the proportional parameter and the proportional resonance inertial parameter. The virtual inertia output can be dynamically adjusted according to the real-time requirement of the system, the overshoot phenomenon caused by power oscillation is effectively suppressed while the frequency stability is met, and the capacity of the system for resisting sudden load change and frequency disturbance is enhanced.

The invention discloses a selector unit for dynamic switching of a standard unit, a ring oscillator and a test structure. Wherein the selector unit is connected in parallel with standard units with different threshold voltages, driving capabilities and logic functions, and is matched with the first switch control circuit, so that flexible switching of the differentiated standard units is realized, and the static architecture limitation of a traditional test circuit is broken through; according to the ring oscillator, a selector unit is embedded into a closed oscillation loop of a standard unit chain, a time sequence path of multiple unit combinations is formed through dynamic configuration, and the delay superposition effect between mixing units in an actual circuit is effectively simulated; the test structure is based on the configurable characteristic of the ring oscillator, combines a pin sharing mechanism of the first control signal multiplexing module, realizes parallel test of multiple unit combinations in a single chip, and eliminates multi-chip separate test requirements, so that a high-efficiency and high-coverage standard unit delay detection system is realized under the constraint of hardware resources, and the test efficiency is improved. And a verification basis is provided for deviation analysis of the process simulation model.

A piezoelectric Micro-Electro-Mechanical Systems (MEMS) resonator employs a thin-film piezoelectric layer as an anchor, which eliminates a dominant loss source, anchor loss, which stems from the irreversible mechanical energy radiation through the anchors. By implementing fundamental or higher-order thickness Lame modes (TLMs) in the thickness direction, the piezoelectric resonator exhibits a substantial reduction of thermoelastic damping (TED) and increase of anchor quality factor. The piezoelectric resonator also provides temperature stability by utilizing a substrate with a turnover temperature, minimizing deviation on resonance frequency. This approach enables the use of thin-film piezoelectric materials as anchors, which can be precisely controlled to minimize losses. The piezoelectric resonator's compact design and CMOS-compatibility make it suitable for batch production at a minimal cost per unit. Furthermore, the highly frequency-stable temperature point of the piezoelectric resonator can be used for implementing oven-controlled oscillators for ultra-stable clock generation in various applications.

An electronic device may include wireless circuitry having an oscillator. The oscillator can include a first transistor having a source-drain terminal coupled to a tail node, a second transistor having a source-drain terminal coupled to the tail node, a first coil having a first terminal coupled to the tail node and having a second terminal coupled to a power supply line, and a second coil inductively coupled to the first coil. The first and second coils can be part of a balun. The balun can be coupled to a tunable capacitance. The tunable capacitance can include multiple differential switchable capacitor circuits. The balun and the tunable capacitance can form a balun phase noise filter configured to reduce a phase noise associated with the oscillator.

The invention belongs to the technical field of full-duplex communication, and particularly discloses a high-isolation full-duplex transceiver system and a control method.The system comprises a transmitting module, a receiving module and a full-duplex baseband module, the transmitting module comprises a power amplifier module and a first oscillator, the power amplifier module is connected with the full-duplex baseband module, and the first oscillator is connected with the receiving module; an intermediate frequency signal transmitted by the full duplex baseband module enters the power amplifier module, is mixed with a signal with a frequency f4 generated by the first oscillator, and is up-converted to a frequency f3; the receiving module comprises a second oscillator and a low-noise amplifier module, the second oscillator is connected with the low-noise amplifier module, a receiving antenna of the receiving module receives the signal and inputs the signal into the low-noise amplifier module for frequency mixing with the signal of the second oscillator, the signal is down-converted to frequency f2, and the signal enters the full-duplex baseband module for data processing. By adopting the technical scheme, based on each module, the influence of self-interference leaked by a transmitting link on a receiving link is completely avoided, and the design complexity of any system is not increased.

A clock generator includes a phase controller configured to generate phase control information in response to comparing a phase of an input clock signal against a phase of a division clock signal, and an oscillator configured to generate a plurality of oscillation signals at an equivalent output frequency but different phases, in response to the phase control information and duty control information. A duty cycle converter is provided, which is configured to generate a plurality of output clock signals at the output frequency by adjusting duty cycles of the plurality of oscillation signals, such that the plurality of output clock signals have duty cycles smaller than the duty cycles of the plurality of oscillation signals. A clock divider is provided, which is configured to generate the division clock signal by dividing the output frequency of one of the plurality of output clock signals, such that the division clock signal has a division frequency smaller than the output frequency. A duty cycle calibrator is provided, which is configured to generate the duty control information for adjusting a duty cycle difference of the plurality of output clock signals, in response to detecting duty cycle differences between the plurality of output clock signals.

In one example, a high voltage generation block comprises a temperature sensor to sense an operating temperature and output a temperature output, a trim circuit to receive a trim enable circuit and the temperature output and to generate oscillator trim bits, a charge pump oscillator to generate an oscillating signal in response to the oscillator trim bits and a feedback signal, a charge pump to receive the oscillating signal and to generate a pumped voltage, and a charge pump regulator to receive the pumped voltage and to generate the feedback signal and a high voltage output.

The invention relates to a passive wireless temperature sensor circuit, which comprises a transceiving antenna, an RF-DC rectifier circuit, a temperature sensing circuit and a backscatter circuit, the RF-DC rectifier circuit receives external radio frequency energy based on the transmit-receive antenna and then outputs direct current for power supply. The temperature sensing circuit comprises a complementary absolute temperature voltage generator and a ring oscillator; the complementary absolute temperature voltage generator comprises an MOS tube and generates CTAT voltage based on temperature characteristics of the MOS tube. The ring oscillator converts the CTAT voltage into an oscillation frequency signal of the ring oscillator and then outputs a square wave frequency signal with a negative temperature coefficient; the backscattering circuit backscatters the square wave frequency signal through the transceiving antenna; the CTAT key generation circuit built by the MOS tube generates CTAT voltage, a temperature frequency conversion chain is built through the CTAT voltage and the ring oscillator, temperature information is converted into frequency information of the oscillator, the power consumption of the temperature sensing circuit can be effectively reduced, and meanwhile the voltage coefficient of the CTAT voltage is increased by combining the temperature characteristic of the MOS tube.

The utility model provides a phase-locked loop circuit and an image sensor, and the phase-locked loop circuit comprises a phase frequency detector, a charge pump circuit, a switching circuit, an inductance capacitance voltage-controlled oscillator, an automatic frequency control circuit, and a detection control circuit. The automatic frequency control circuit controls the switching circuit to output a voltage reference signal and output a digital code signal, so that the capacitance in the inductance-capacitance voltage-controlled oscillator is changed, the frequency of an output signal of the phase-locked loop circuit is further changed, after calibration is finished, the phase frequency detector and the charge pump circuit output a changed first voltage signal, and the charge pump circuit outputs a second voltage signal. The capacitance of the inductance capacitance voltage-controlled oscillator and the frequency of an output signal of the phase-locked loop circuit are changed, and the detection control circuit outputs a closing signal to close the automatic frequency control circuit, so that additional circuit power consumption is reduced; digital code signals input by the inductance-capacitance voltage-controlled oscillator are not changed, and disturbance influence is eliminated.

According to an embodiment, a phased-locked loop (PLL) circuit, within a gyroscope system, generates demodulation signals. It includes a phase frequency detector receiving gyroscope output, which compares a reference signal with a feedback signal to produce an error signal. A charge pump then converts this error into a first analog control signal. A programmable clamp circuit refines this into a second analog control signal. A voltage-controlled oscillator uses the second signal to produce an output signal at a controlled frequency determined by the clamp circuit. A frequency divider sends a comparison frequency signal back to the detector, completing the loop.

The invention discloses a fractional frequency division frequency synthesizer with output signal phase synchronization and frequency modulation continuous wave functions, and the basic structure is a charge pump phase-locked loop. Comprising a phase frequency detector, a first charge pump, a second charge pump, a low-pass filter, a voltage-controlled oscillator, a first buffer, a second buffer, a two-frequency divider chain, an IQ undersampling circuit, a local oscillator generator, a programmable multimode frequency divider, a Delta-Sigma modulator (DSM), a first selector, a second selector, a third selector, a tracking phase accumulator, a numerical control oscillator, an accumulation phase difference register and an atan2 logic circuit. The device comprises a main phase control circuit, a phase adjusting circuit, an enabling control circuit, a waveform generator and a serial peripheral interface. The decimal frequency-division frequency synthesizer can be applied to a general-inductance integrated system, ensures that output signals provided by a plurality of decimal frequency-division frequency synthesizers are consistent in phase in a multi-channel radio frequency transceiving system adopting a multi-chip splicing mode, and can also be applied to the general-inductance integrated system as a sensing signal source; and the speed and the distance of an object can be quickly sensed by the high linearity and the quick chirp capability of an output signal. The decimal frequency division frequency synthesizer is applied to a linear frequency modulation continuous wave radar system, initial phase synchronization can be carried out firstly, then frequency continuous modulation is carried out, and measurement errors can be eliminated. In view of functional similarity of partial modules of the synchronous loop and the FMCW loop, such as a phase frequency detector, a charge pump, a voltage-controlled oscillator and the like, the modules can be shared, so that the power consumption and area cost of the system are remarkably reduced.

A MEMS gyroscope for sensing rotational motion about an in-plane extending axis includes a body, a primary in-plane oscillator, a secondary in-plane oscillator and an out-of-plane oscillator. The primary in-plane oscillator includes an actuator element and is suspended from a primary anchor region on the body by a first spring system. The secondary in-plane oscillator is connected to the primary in-plane oscillator by a drive coupling spring system and is suspended from one or more secondary anchor points on the substrate by a second spring system. The out-of-plane oscillator is connected to the secondary in-plane oscillator by a third spring system. The drive coupling spring has higher rigidity in the first in-plane direction than in the out-of-plane direction, and the first spring system has higher rigidity in the first in-plane direction than the second spring system.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a low-noise voltage-controlled oscillator circuit which comprises a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration and a source electrode following low-noise bias circuit with digital calibration, the cross-coupled amplifier array is composed of a plurality of units, and the source electrode of the cross-coupled amplifier array suppresses low-frequency noise through a resistance-capacitance feedback network and receives a digital amplitude calibration signal so as to dynamically adjust the number of working units and stabilize the output amplitude; the amplitude self-calibration loop consists of digital logic and a peak detector; the switched capacitor unit array is provided with stable direct-current bias; and a wide linear variable capacitor array driven by the stepped bias voltage. Through deep fusion of digital and analog technologies, the phase noise is remarkably reduced, the linear tuning range is widened, the amplitude stability is ensured, the power consumption is reduced, and the method is particularly suitable for a high-performance radio frequency communication chip of the Internet of Things.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a dynamic bias C-type voltage-controlled oscillator based on a CMOS (complementary metal oxide semiconductor) process, the voltage-controlled oscillator adopts a C-type structure, a cross-coupled network adds two resistors and a capacitor on the basis of a cross-coupled transistor, a circuit works in the C type by adjusting bias voltage at a resistor end, and the voltage-controlled oscillator works in the C type. The C-type voltage-controlled oscillator, a tail current source, a variable capacitance network, a switched capacitor array and a fixed LC resonance network form a core structure of the C-type voltage-controlled oscillator capable of numerical control tuning and voltage-controlled tuning, so as to determine the working frequency of the circuit and realize numerical control and voltage-controlled tuning functions; and the operational amplifiers with two bandwidth modes are introduced, so that the problem of difficult oscillation starting is solved, and the oscillation starting speed and the phase noise performance in a stable state are considered at the same time.

A thermodynamic relay gadget includes a set of one or more relay oscillators, an additional relay oscillator, a bias oscillator, and an on-chip controller. Respective ones of the relay oscillators have a time dependent mass or a time dependent frequency that is controllable, by the on-chip controller. The relay gadget is configured to relay thermodynamic information in analog form between an input oscillator of a first energy-based model and an output oscillator of a second energy-based model.

A random number generator comprises a ring generator and one or more inverter-based ring oscillators. The one or more inverter-based ring oscillators is configured to inject bits into the ring generator at a plurality of location. If there is more than one inverter-based ring oscillators, the inverter-based ring oscillators may have different numbers of inverting elements and may inject bits into the ring generator at different locations. At least one of the one or more inverterbased ring oscillators may be configured to inject bits into the ring generator at different locations from outputs of some or all its inverting elements. The random number generator may further comprise blocking circuitry configured to convert, based on a blocking signal, the ring generator into a circular shift register by blocking both the injection from the plurality of inverter-based ring oscillators and internal feedbacks in the ring generator.

A system, for measuring a dielectric property of a medium, includes: a resonator; an oscillator electrically coupled to the resonator and configured to generate an electrical signal representing an oscillation of the oscillator when the resonator is disposed in a vicinity of the medium; and measuring circuitry that receives the electrical signal. The measuring circuitry determines, from the electrical signal, at least one of a resonance frequency of the resonator and a quality factor of the resonator. The measuring circuitry determines, from the at least one of the resonance frequency and the quality factor, the dielectric property of the medium.

An ADPLL circuit includes a phase comparator for comparing a phase of a reference clock (REFCLK) input signal with a phase of a digitally controlled oscillator clock (DCO_CLK) signal output from a DCO. The phase comparator includes a first ADC connected to receive a REF_P signal corresponding to the phase of the REFCLK signal via a first switch and output an ADC0 signal and a second ADC connected to receive the signal REF_P via a second switch and output an ADC1 signal. The ADPLL circuit further includes a digital filter for receiving the ADC0 and ADC1 signals and determining therefrom a difference between the phases of the DCO_CLK signal and the REFCLK signal. The digital filter provides a DCO control signal to the DCO to control a frequency of operation of the DCO based on the phase difference.

Provided is a TD converter including: a plurality of oscillators which at least include a first oscillator and a second oscillator receiving control signals input thereto, respectively, and operating in operating modes with oscillation frequencies different from each other, respectively, wherein each control signal indicates a time difference between a reference clock and a target clock; and a computation circuit which calculates a digital output value depending on the time difference, by using a plurality of pieces of phase information retained according to the reference clock in the plurality of oscillators, respectively.