93 results about "Baseband receiver" patented technology

A multi-mode receiver includes a channel decomposition module (e.g., a Rake receiver) for separating a received signal into multipath components, an interference selector for selecting interfering paths and subchannels, a synthesizer for synthesizing interference signals from selected subchannel symbol estimates, and an interference canceller for cancelling selected interference in the received signal. At least one of the channel decomposition module, the synthesizer, and the interference canceller are configurable for processing multi-mode signals.

A power amplifier system and method for locating carrier frequencies across a frequency band, identifying the modulation format of each carrier, and locating and suppressing undesired intermodulation distortion (IMD) products generated by the power amplifier. The system includes an amplifier for amplifying RF carrier signals in a main signal path, a variable phase shifter and variable attenuator on a feed forward path, and a tunable receiver that digitizes a portion of the frequency band to baseband. The tunable receiver includes a tunable voltage controlled oscillator which provides an oscillating frequency to a mixer and is phase-locked to a highly stable reference oscillator. The mixer downconverts a desired RF based on the oscillating frequency to IF. A filter passes only a selected portion of the IF signals, and the filter has a passband sufficient to discern both narrowband and wideband carriers and their associated IMD products. Based on the locations of the carrier frequencies, a processing unit determines the IMD locations of the carrier frequencies, determines the IMD locations, and adjusts the variable phase shifter and variable attenuator on the feed forward path until the IMD products in the main signal path are suppressed below a desired threshold.

A transceiver system according to the present invention transmits data utilizing the baseband and one or more frequency separated transmission bands. A baseband transmitter is combined with one or more transmitters that transmit data into one of the frequency separated transmission bands. A baseband receiver is combined with one or more receivers that receive data from the frequency separated transmission bands. Any combination of modulation systems can be utilized (e.g. PAM for the baseband and QAM for the frequency separated bands). A transceiver circuit or chip according to the present invention includes a transmitter and a receiver and communicates with a corresponding transceiver chip. In some embodiments, one baseband PAM transmitter is combined with one frequency separated QAM transmitter.

A baseband receiver and corresponding methods are arranged and configured to mitigate effects of direct current (DC) distortion and process an Orthogonal Frequency Division Multiplexing (OFDM) signal as provided from a direct conversion radio or receiver. The baseband receiver includes an OFDM demodulator configured to demodulate the OFDM signal, a post processor coupled to the OFDM demodulator and configured to provide symbols corresponding to the OFDM signal, and a compensator coupled to at least one of the OFDM demodulator and the post processor and configured to reduce error rates out of the baseband receiver that result from DC distortion in the direct conversion radio.

A Baseband receiver including a CIR estimate block, gain, phase and timing loops, a CMF, a single-carrier processor and a multi-carrier processor. The CIR estimate block generates an impulse response signal based on a receive signal that is a single-carrier signal or a single-carrier segment of a mixed carrier signal. The single-carrier segment has a spectrum that approximates a multi-carrier spectrum. The gain, phase and timing loops adjust gain, phase, frequency and timing to provide an adjusted receive signal. The CMF filters the adjusted receive signal according to the impulse response signal. The single-carrier processor processes the adjusted and filtered receive signal to resolve a single-carrier segment of a mixed carrier signal. The single-carrier processor detects a mixed carrier mode indication in a single-carrier segment and asserts a start indication. The multi-carrier processor processes a multi-carrier segment of a mixed carrier signal in response to assertion of the start indication.

Baseband receiver circuitry is dynamically biased in a communication system receiver by generating gain control information, and controlling an adjustable bias of at least a portion of the baseband circuitry based at least in part on the gain control information. The baseband receiver circuitry comprises at least one amplifier having an adjustable bias associated therewith, with the adjustable bias of the amplifier being controllable utilizing a bias control signal. For example, the amplifier may be an operational amplifier having a gain stage and an output buffer stage, with the bias control signal being applied to the output buffer stage to control an adjustable bias current thereof. More specifically, the bias control signal may be used to control an amount of current provided by at least one of a plurality of current sources associated with the output buffer stage of the amplifier, for example, by controlling a switch which enables or disables one or more of the current sources. Advantageously, the dynamic bias control can substantially reduce power consumption in the receiver. The techniques of the invention can also be applied to other types of devices which utilize gain control.

A receiver produces optimal weights for cancelling multipath interference. An SINR measurement module generates SINR measurements corresponding to soft symbol estimates produced by a baseband receiver from a received multipath signal. Each soft symbol estimate is replaced with either a hard estimate or a weighted soft estimate based on how each corresponding SINR measurement compares to a predetermined threshold. The received multipath signal and estimated interference signals generated from the hard symbol estimates and / or the weighted soft symbol estimates are combined to produce interference cancelled signals that may be combined via maximum ratio combining to produce an interference-cancelled MRC signal.

A multi-mode receiver includes a channel decomposition module (e.g., a Rake receiver) for separating a received signal into multipath components, an interference selector for selecting interfering paths and subchannels, a synthesizer for synthesizing interference signals from selected subchannel symbol estimates, and an interference canceller for cancelling selected interference in the received signal. At least one of the channel decomposition module, the synthesizer, and the interference canceller are configurable for processing multi-mode signals.

A method is provided for processing received data symbols in an orthogonal frequency division multiplexing (OFDM) transmission scheme, and an OFDM baseband receiver which performs this method, in order to support frequency selective noise estimation, especially in interference limited environments, and to offer improved estimation performance and reduced computational complexity. This is achieved by determining time and frequency selective levels of combined noise and interference, computing noise normalization values for a respective time-frequency region of the time-frequency plane that applies in the transmission scheme employed, from said time and frequency selective noise plus interference levels, applying said noise normalization values to the received data symbols to obtain normalized data symbols, applying said noise normalization values to the channel estimates, to obtain normalized channel estimates, determining communication parameter estimates from said normalized channel estimates, and determining demodulated and decoded data from said normalized data symbols using said normalized channel estimates.

A method for implementing an equalizer of an orthogonal frequency division multiplexing (OFDM) baseband receiver is provided. The OFDM baseband receiver includes a channel estimation and tracking module for estimating a channel impulse response of an input signal of the equalizer. A conjugate of the channel impulse response is first calculated. The input signal and the conjugate of the channel impulse response are then multiplied to generate a product signal. The product signal is then taken as the output signal of the equalizer without dividing the product signal by a channel state information, wherein the channel state information represents a square of an absolute value of the channel impulse response.

A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

A wireless transceiver includes a Radio Frequency (RF) transceiver, a baseband transmitter section, and a baseband receiver section. The baseband receiver section receives a baseband signal from the RF transceiver, extracts data therefrom, and provides the data to a host system. The baseband receiver section includes a programmable gain amplifier, an Analog-to-Digital Converter (ADC), a symbol timing compensation section, an RF carrier compensation section, a decision feedback equalizer section, and a preamble processor. The symbol timing compensation section modifies the samples of the baseband signal to compensate for symbol timing variations between a symbol clock of the wireless device and a symbol clock of a transmitting wireless device. The RF carrier compensation section modifies the samples of the baseband signal to compensate for RF carrier variations between an RF carrier of the wireless device and an RF carrier of the transmitting wireless device. The preamble processor determines a PGA gain factor, initial settings for the RF carrier compensation section, and equalizer coefficients.

A CORDIC angle calculator for a baseband IC receiver incorporates a CORDIC algorithm calculating processor with an input scaling means receiving input data, scaling the input data and providing it to the CORDIC processor. An output scaling means receives output data from the CORDIC processor and rescales the output data to provide a calculated angle. In an exemplary embodiment, the input scaling means includes means for shifting the input data for bit reduction and providing a shift signal corresponding to the input data shift and wherein the output scaling means is responsive to the shift signal.

A CDMA baseband receiver includes a first correlating unit, a long code phase candidate outputting section and a long code determining section. The first correlating unit calculates first correlation values from a spread modulation signal and a short code which is common to base stations. The long code phase candidate outputting section outputs selected long code phase candidates corresponding to ones selected from the first correlation values, based on the spread modulation signal, and determined long codes. The selected long code phase candidates are other than long code phase candidates for known ones of the base stations. The long code determining section generates the determined long codes for unknown ones of the base stations from the spread modulation signal, the short code, and long codes generated based on the selected long code phase candidates. Each long code is peculiar to one base station.

An apparatus for coarse compensation of a direct current (DC) offset in a direct to baseband receiver architecture utilizes a serial analog to digital converter (ADC), such as a Delta-Sigma converter, to convert the received signal to digital form. The output of the ADC is sampled for a predetermined number of samples and a counter coupled to the ADC is incremented each time the sample generated by the ADC is a logic one. The counter is not incremented if the sample from the ADC is a logic zero. After the predetermined number of samples is obtained, the counter value is indicative of the DC offset in the received signal. The counter value may be converted by a code converter to a correction value for easy operation of a digital to analog converter (DAC). If the number of samples from the ADC is a power of two, the code converted may be readily implemented by simply inverting the most significant bit (MSB) from the counter to thereby generate a twos complement version of the counter value. The correction value is coupled to the DAC to generate a compensation signal, which is provided to the received signal path in the form of a feedback signal to compensate for the DC offset.

A method for detecting validity of downlink control information in telecommunication user equipment and a decoder and baseband receiver to perform the method are provided. The object of avoiding falsely detecting payload data and misinterpreting them is achieved by reverse encoding a bit output sequence of a Viterbi decoder; determining hard bits from a soft-bit input sequence of the decoder; determining a bit count of real received bits; comparing the reverse encoded bit stream to the determined hard bit stream and counting the number of mismatches to obtain an error count; comparing a bit error rate which is defined as a quotient of the error count and the bit count against a predefined threshold value; and rejecting the payload as invalid if said bit error rate is above said threshold value, even if a cyclic redundancy check of the payload gives a correct result.

The invention relates to the field of electronic communication, and discloses an automatic gain control method of a digital communication receiver, which performs gain adjustment by jointly utilizingsaturation, amplitude and signal power of an ADC output signal of the receiver. Firstly, the access gain of a radio frequency or analog front end is set to be the maximum value, and when ADC output signal power is larger than a preset threshold, the access gain of the radio frequency or analog front end is correspondingly reduced according to ADC output signal saturation; secondly, the digital gain and the access gain of the radio frequency or analog front end are adjusted according to the amplitude and the power of the ADC output signal, so that the power of the ADC output signal is within anexpected range; and finally, the amplitude and the power of the ADC output signal are tracked until a gain locking indication signal of the digital baseband receiver is received, and at the moment, the access gain of the radio frequency or analog front end remains unchanged. Simulation shows that the automatic gain control method is high in convergence speed and can be suitable for complex wiredor wireless communication scenes.

A method for fine timing synchronization is provided. The method comprises: detecting an end point of the short preamble; delivering the samples after the end point to a matched filter to generate a plurality of correlation peaks; searching the correlation peaks generated from the samples of the first LTS for a first maximal peak point which is the correlation peak with a first maximal intensity, and obtaining the first time index of the first maximal peak point; searching the correlation peaks generated from the samples of the first LTS for a pre-peak point which is the correlation peak forming a peak intensity appearing before and nearest to the first maximal peak point, and obtaining the second time index of the pre-peak point; estimating a third time index of the start point of the second LTS according to the first and second time indexes.

In a receiver, two low-pass equivalent signal detection criterions when the timing, phase and amplitude of the received signal are known and unknown, respectively, are provided for the detection of the presence of a Barker sequence in a received signal by Neyman-Pearson hypothesis testing rule. In addition, signal quality and link quality to measure the current quality of environments for signal reception are provided by the employment of a differential decoder and a Viterbi decoder in the baseband receiver.

A balanced mixer circuit (300, 400, 500, 600, 700 and 800) in a baseband receiver (202) includes an oscillator circuit (212), a mixer (214 and 215), a digital-to-analog converter (258 and 259) and a digital signal processor (250). The mixer includes CMOS devices (301, 302, 303 and 304). In response to differential outputs from the mixer, the digital signal processor controls the digital-to-analog converter to output bias voltages for the gate of at least one of the CMOS devices of the mixer to compensate for imbalance in the differential output of the mixer that may be caused by mismatch among two or more CMOS devices of the mixer or caused by other reasons, in order to increase second order intercept point of the mixer.

A cordless telephone system connectable to the public switched telephone network having a base station and one or more handsets communicating with the base station by an RF link using a time division duplex direct sequence spread spectrum quadrature modulation technique, having a gain imbalance compensation system for balancing the gain between the I and Q channels. Gain imbalance estimation is performed as part of a calibration cycle when the handset is in the cradle of the base station. The controller of the unit causes another unit to send a data signal with a frequency error. The baseband receiver performs the operation |I|-|Q|, which is an indication of gain error. The results are stored in an accumulator over a set period of time. The controller reads the accumulator and uses an iterative process, increasing or decreasing the gain link compensation until no gain imbalance error is obtained.

The embodiment of the invention discloses a baseband transmitter, a baseband receiver, a modulation and demodulation system and a terminal. The baseband transmitter groups input digital signals to betransmitted through a Hadamard modulation module according to a preset spread spectrum signal length; each signal group is mapped into a corresponding baseband modulation signal according to a presetHadamard matrix, and each baseband modulation signal is transmitted to a scrambling module; a scrambling signal is generated through a scrambling signal generation module, and the scrambling signal istransmitted to a scrambling module; and the baseband modulation signal is scrambled by using the scrambling signal through a scrambling module to obtain a baseband scrambling signal. According to thescheme of the embodiment of the invention, the modulation and scrambling of the to-be-transmitted digital signal are realized, a basis is provided for a subsequent baseband receiver to quickly obtaina transmission signal, the signal transmission speed is ensured, the signal transmission quality can also be ensured, and the hardware cost is not increased.

An LTE baseband receiver and a method for operating the receiver are provided. The receiver comprises a frequency selective interference estimator, an interference level averager and an interference assessor operative to control which output of the frequency selective interference estimator or the interference level averager is to be supplied to a soft-metric calculator. Frequency selectivity of the interference is assessed, and the best mode of interference estimation is selected to increase LTE receiver performance in loaded networks without impacting receiver performance in unloaded networks.

A baseband receiver and corresponding methods are arranged and configured to mitigate effects of direct current (DC) distortion and process an Orthogonal Frequency Division Multiplexing (OFDM) signal as provided from a direct conversion radio or receiver. The baseband receiver includes an OFDM demodulator configured to demodulate the OFDM signal, a post processor coupled to the OFDM demodulator and configured to provide symbols corresponding to the OFDM signal, and a compensator coupled to at least one of the OFDM demodulator and the post processor and configured to reduce error rates out of the baseband receiver that result from DC distortion in the direct conversion radio.

An adaptive digital baseband receiver is described in which operating parameters of the receiver, such as bit- widths and operating frequencies, are determined that achieve a target bit- error-ratio (BER) as a function of received signal-to-noise ratio (SNR) and interference levels in a wireless channel and enable the receiver to consume a minimum amount of power. Over consumption of power may be avoided due to a functional relationship between optimal resolution and input signal conditions. In exemplary embodiments, the adaptive digital receiver is provided that adjusts bit- widths and operating frequency at power efficient levels while meeting a target BER. Simulations can be used to determine a relation between bit-width, operating frequency, and input signal conditions, for example.

A method of compensating interference of received symbols in a MIMO OFDM receiver employs MMSE equalization and LLR scaling, and a MIMO OFDM receiver includes a linear MMSE equalizer. The method provides a low-complexity, numerically robust method for compensating interference of received symbols and provides a low-cost, robust digital baseband receiver for MIMO-OFDM, achieved by merging linear MMSE equalization and scaling of the corresponding equalized symbols into a single algorithm that, for the 2M MIMO case, completely avoids computationally extensive matrix inversion and allows for significant simplification of symbol detection as compared to separate equalization and scaling.

A multi-processor system on chip (SoC) platform and a DVB-T baseband receiver using the same are disclosed. The multi-processor SoC platform includes a first processor, at least one second processor, at least one slave device communicating with the first processor and the second processor and a communication interface (CI) unit connecting the slave device to the first processor and the second processor according to a cross-bar switching method to allow the slave device to be communicated with the first processor and the second processor. Therefore, the multi-processor SoC platform having flexibility with being adapted for high speed calculation by using a cross-bar switch is provided.

A filtering apparatus and method of a multimode multiband transceiver is provided for filtering a signal carrying an analog baseband signal. A filtering apparatus of a multimode multiband radio transceiver of the present invention includes a filtering unit which filters Radio Frequency (RF) signals on one of at least one frequency bands, a switching unit which switches the signals among at least one filter block included in the filtering unit according to a selected communication mode, and a controller which selects the communication mode and controls the switching unit. The analog signal filtering apparatus and method of the present invention is advantageous in terms of providing a variable gain amplifier, filter circuit, and algorithm capable of fulfilling the gains and bandwidths required by the baseband receiver for all mobile communication standards complied by 2G, 3G, and 4G systems.

The invention relates to methods for synchronising a device to a signal containing a train of pulses representing a programmable number of repetitions of a predetermined code. Pulse position and code phase are searched for. In a first aspect, a programmable number of samples is taken per pulse frame in function of the available number of repetitions of said predetermined code. In a second aspect, the method comprises a signal detection stage from which, after performing a confirmation stage, information can be kept for a subsequent stage. In a third aspect, only a limited number of rotated versions of the predetermined code are checked, using a presumed code phase which is kept from a preceding stage.