6 results about "Channel potential" patented technology

The invention discloses an embedded flash memory structure based on a vertical auxiliary gate and a dynamic programming method of the embedded flash memory structure, and belongs to the technical field of memorizers, the embedded flash memory structure based on the vertical auxiliary gate comprises a substrate, the top surface of the substrate is covered with a channel oxide layer, floating gates are further distributed on the channel oxide layer, and the floating gates are arranged on the top surface of the substrate. A control gate is further arranged on the floating gate, an auxiliary gate, a high-K dielectric layer and an interlayer oxide layer are sequentially stacked on the channel oxide layer and the floating gate from bottom to top, and during programming and erasing, channel potential is modulated by applying voltage to the auxiliary gate, and an effective electric field of the floating gate is changed. The auxiliary gate is additionally arranged below the floating gate, the channel potential is dynamically modulated through the auxiliary gate, the effective electric field of the floating gate is changed, the programming efficiency can be improved, the erasing working voltage is reduced, noise is restrained, and the data retention capacity is remarkably improved.

The application provides a wide-temperature-range MOSFET threshold voltage stabilization method and system, a temperature self-adaptive floating gate unit is embedded in a gate medium, the unit is in thermal coupling with a main channel but is electrically isolated, the charge change law of the unit has matched thermodynamic characteristics with an interface state relaxation process; meanwhile, a specific combined double-frequency-band gate bias signal is applied, a local electromagnetic field excited by a high-frequency component accelerates the interface charge redistribution, a low-frequency component realizes dynamic anchoring of the channel potential; and a distributed thermal-electricity collaborative calibration node is additionally used for real-time compensation; the threshold voltage path dependence caused by the interface state charge relaxation is effectively eliminated, the stabilization time after temperature change is significantly shortened, and the MOSFET realizes stable control of the threshold voltage in a wide-temperature-range range, thereby providing a reliable device basis for a low-temperature electronic system.

This invention discloses a temperature-dependent analytical method for the threshold voltage of a symmetrical dual-material dual-gate strained silicon MOSFET, relating to the field of semiconductor technology. The method includes: substituting the approximate expression of the potential energy of strained silicon in the vertical direction into the first boundary condition and the structural symmetry condition to obtain a two-dimensional channel potential energy expression; substituting the two-dimensional channel potential energy expression into the Poisson equation and setting the coordinates perpendicular to the channel direction to 0 to obtain a temperature-dependent surface potential equation; solving the surface potential energy equation using the second, third, fourth, and fifth boundary conditions to obtain an analytical expression for the surface potential; obtaining the minimum surface potential by taking the first derivative of the analytical expression; and obtaining a temperature model for the threshold voltage based on the minimum surface potential and the definition of the threshold voltage; and solving the temperature model to obtain the threshold voltage of the symmetrical dual-material dual-gate strained silicon MOSFET. This method improves the analytical accuracy of the threshold voltage of the symmetrical dual-material dual-gate strained silicon MOSFET.

This invention discloses a gallium oxide device with a gradient gate dielectric structure and its fabrication method, relating to semiconductor technology, and proposes a solution to address the performance limitations of short-channel devices. A gradient dielectric layer and a gradient gate layer are deposited on a gallium oxide epitaxial layer. The gradient dielectric layer is used to control the electric field distribution under the gate and the gate-channel coupling capability. The dielectric constant of the gradient dielectric layer changes in a piecewise gradient, increasing from the side near the source layer towards the drain layer. The gradient gate layer is used to control the potential distribution on the channel surface. The work function of the gradient gate layer changes in a piecewise gradient, decreasing from the side near the source layer towards the drain layer. Its advantages lie in achieving coordinated control of the channel potential distribution and the electric field distribution under the gate. It can weaken the modulation effect of the drain voltage on the channel barrier, reduce the channel length modulation effect and output conductance, and improve the current saturation characteristics of the device; it reduces the peak electric field at the gate-drain edge and weakens the electric field concentration phenomenon, making it particularly suitable for devices with short-channel dimensions.

The invention provides a method for determining the effective channel length of a device, and the method comprises the steps: obtaining the inversion layer charge concentration () corresponding to a plurality of gate lengths through integration based on the capacitor voltage corresponding relation corresponding to the plurality of gate lengths (). And performing linear fitting (vs) on the ratio () of the inversion layer charge concentration to the gate channel capacitance and the inversion layer charge concentration (), and determining the gate oxide capacitance () of the unit area corresponding to the plurality of gate lengths based on the fitting slope. Due to the direct influence of capacitance on channel potential distribution, the influence of non-ideal factors of carrier transport is relatively small, and accurate extraction is realized. On the basis, the effective channel length of the target device can be determined, so that an advanced extraction technology and a physical model for extracting the effective channel length are combined, the accurate effective channel length is determined and calculated according to the accurate effective channel length, and reliable and accurate effective channel length characterization is realized.

The invention provides a wide temperature range MOSFET threshold voltage stabilization method and system, and the method comprises the steps: embedding a temperature adaptive floating gate unit in a gate medium, maintaining thermal coupling but electrical isolation between the unit and a main channel, and enabling a charge change rule and an interface state relaxation process to have matched thermodynamic characteristics; meanwhile, a specially combined dual-band grid bias signal is applied, interface charge redistribution is accelerated through a local electromagnetic field excited by a high-frequency component, and dynamic anchoring of channel potential is achieved through a low-frequency component; real-time compensation is carried out with the assistance of distributed thermal-electric cooperative calibration nodes; compared with the prior art, the threshold voltage path dependence caused by interface state charge relaxation is effectively eliminated, the stabilization time after temperature change is remarkably shortened, stable control over the threshold voltage of the MOSFET in a wide temperature range is achieved, and a reliable device basis is provided for a low-temperature electronic system.