259 results about "Overdrive voltage" patented technology

Techniques are disclosed for providing modulation current that includes output impedance compensation with a feed-forward bandwidth enhancement and pre-distortion modulation to control waveform transition symmetry. A feedback circuit senses output node voltage and increases the overdrive voltage of a current source. This offsets the loss of current due to channel length modulation and increases the effective output impedance of the source. A feed-forward circuit enhances the bandwidth of the impedance compensation feedback loop. Waveform transition symmetry is improved by pre-distorting a laser modulation current by introducing an undershoot current on the falling edge of the modulating current.

Provided are an electromagnetic valve control unit and a fuel injection control device using the same that can precisely detect a change of an operating state of an electromagnetic valve, that is, a valve opening time or a valve closing time of the electromagnetic valve, precisely correct a drive voltage or a drive current applied to the electromagnetic valve, and appropriately control opening / closing of the electromagnetic valve, with a simple configuration. In an electromagnetic valve control unit for controlling opening / closing of an electromagnetic valve by a drive voltage and a drive current to be applied, the drive voltage and the drive current applied to the electromagnetic valve are corrected on the basis of a detection time of an inflection point from time series data of the drive voltage and the drive current when the electromagnetic valve is opened / closed.

An overdrive controller for driving a liquid crystal display includes a change rate Rst calculating section for comprehending a transition state from a present brightness to a targeted brightness for each of R, G and B sub-pixels, a select section for selecting the sub-pixel with the slowest transition and the other sub-pixels from the comprehended transition states, and an overdrive voltage calculating section for calculating a voltage to accelerate a transition of brightness for the sub-pixel with the slowest transition. The overdrive controller further includes, an effective brightness Yst′ calculating section and Yst′ overdrive voltage calculating section for calculating a voltage to accelerate or to decelerate a transition of brightness for the other sub-pixels in order to coordination with each other, wherein the voltage is switched by a switch 23 to be supplied.

In a liquid crystal display device includes; a plurality of pixels arranged substantially in a matrix pattern; wherein each of the plurality of pixel includes; first and second thin film transistors including current paths connected to a source line in series, a storage capacitor line, a first capacitor connected between the first and second thin film transistors and connected to the storage capacitor line, a second capacitor connected between one of the source and the drain of the second thin film transistor and a pixel electrode and connected to the storage capacitor line, and a third capacitor including the pixel electrode, a common electrode, and a liquid crystal between the pixel electrode and the common electrode, wherein an overdrive voltage Vover satisfying equation Vover=C⁢ ⁢1C⁢ ⁢2+C⁢ ⁢lc·Vsigis added to a display signal voltage Vsig and a resultant voltage is applied to the source line.

A semiconductor memory device capable of controlling a drivability of an overdriver is provided. The semiconductor memory device includes: a first power supply for supplying a normal driving voltage; a memory cell array block; a bit line sense amplifier block for sensing and amplifying voltage difference between bit line pair of the memory cell array block; a first driver for driving a power supply line of the bit line sense amplifier block to a voltage of a node connected with the first power supply in response to a driving control signal; a plurality of second drivers for driving the node to an overdriving voltage higher than the normal driving voltage; and an overdriving drivability controller for selectively activating the second drivers in response to a test-mode drivability control signal inputted during an activation period of an overdriving signal.

Disclosed is a display device with integrated touch screen (110). The display device includes a panel (100) configured to include a plurality of driving electrodes (112) and a plurality of sensing electrodes (114) and a display driver IC (200) configured to apply a common voltage to the plurality of driving electrodes (112) and the plurality of sensing electrodes (114) when the panel (100) operates in a display driving mode, and when the panel (100) operates in a touch driving mode, generate a driving pulse, which includes a maximum voltage with an overdriving voltage applied thereto and a minimum voltage with an under-driving voltage applied thereto, according to a timing pulse to apply the driving pulse to the plurality of driving electrodes (112), and respectively receive a plurality of sensing signals from the plurality of sensing electrodes (114).

Circuits that provide a gate boost to address non-linear threshold voltage variation in a CMOS T / H circuit. In embodiments of the invention, a boost capacitor and a feedback amplifier add a signal-dependent threshold voltage to the switch gate over-drive voltage of a switch that controls track and hold circuit sampling. In a modified embodiment, capacitive boost is omitted and the feedback amplifier provides the signal-dependent threshold voltage boost. In another embodiment, a boost capacitor and a diode connected transistor provide the signal-dependent threshold voltage boost. In a modified embodiment, capacitive boost is omitted and the diode connected transistor provides the signal-dependent threshold voltage.

In a 3D stacked non-volatile memory device, multiple smaller drain-end selected gate (SGD) transistors replace one larger SGD transistor. The SGD transistors have different control gate overdrive voltages so that, during a programming operation, a discontinuous channel potential is created in an inhibited NAND string. The SGD transistor closest to the bit line has a lower control gate overdrive voltage so that the channel potential under it is lower, and the next SGD transistor has a higher control gate overdrive voltage so that the channel potential under it is higher. The different control gate overdrive voltages can be provided by programming different threshold voltages, or by providing different control gates voltages, for the SGD transistors. Undesirable reductions in a Vsgd window due to drain-induced barrier lowering can be avoided.

The invention relates to the integrated circuit technique and discloses a low-voltage bandgap-free reference voltage source. According to the technical scheme, the low-voltage bandgap-free reference voltage source comprises a starting circuit composed of a CMOS transistor circuit, a first current generating circuit, a second current generating circuit, a third current generating circuit and an overlaying output circuit, wherein the starting circuit is used for providing a starting bias voltage for the whole circuit, the first current generating circuit is used for generating a current IPTAT in direct proportion to the temperature, the second current generating circuit is used for generating a current IPTOD in direct proportion to an overdriving voltage, the third current generating circuit is used for generating a current IPTTV in direct proportion to a threshold voltage, the current IPTTV is inversely proportional to the temperature, and the overlaying output circuit is used for overlaying of the current IPTAT and the current IPTTV and outputting a reference voltage VREF. The low-voltage bandgap-free reference voltage source has the advantages that the working voltage is low, the output voltage can be adjusted, influence of a technique on the low-voltage bandgap-free reference voltage source is little, and the area of a chip is small.