98 results about "Wire speed" patented technology

The invention discloses a P4 switch processor core-oriented multi-service traffic packet scheduling method, which mainly comprises the following steps of: proposing a feature extraction method based on a statistical interval and Sketch, integrating data packet time correlation and traffic dynamic change, optimizing a Bloom filter conflict detection mechanism, and improving the adaptability and accuracy of an algorithm in a limited resource environment; a decision tree model is combined with scheduling, a decision tree is reconstructed to adapt to an operation mode and a data processing requirement of a P4 switch, and high-precision service flow classification under linear speed operation is ensured; a packet scheduling method AD-PIFO is designed based on a variable priority, the forwarding priority of a data packet is dynamically adjusted, the QoS requirements of different services are met, and the overall performance and efficiency of the switch are improved. The method is outstanding in high-priority traffic throughput and low-delay performance, is superior to similar algorithms in medium-low priority traffic throughput, is stable and effective under different load conditions, is reasonable in extra time overhead of data packet transmission, and is widely applied to SDN network optimization data packet scheduling scenes.

The invention relates to an IPv4 data message processing method and device based on longest prefix matching. The method comprises the following steps: acquiring an IPv4 data message, and extracting a destination IP address in the message; based on a longest prefix matching mode, extracting a preset number of bits from the high order of the destination IP address; generating a search index through the preset number of bits; determining a corresponding table item in a pre-stored FPGA rule matching table according to the lookup index; extracting a message processing rule according to pre-stored information of the table item; and executing a subsequent processing action on the IPv4 data message based on the message processing rule. According to the method and the device, the IPv4 message prefix matching can be carried out through FPGA hardware acceleration, a matching result is generated through single query, linear speed processing under million-level rules is supported, and meanwhile, the longest prefix priority principle is automatically maintained when the rules are changed through a CPU-FPGA collaborative updating mechanism.

The invention discloses a line speed bit mask message matching method based on an FPGA (Field Programmable Gate Array), the FPGA comprises at least one block RAM (Random Access Memory), the block RAM comprises a plurality of storage addresses, and the method comprises the following steps: acquiring N matching rules, each matching rule comprising a rule number, a keyword and a mask; and executing configuration of the matching rules in the block RAM according to the N matching rules: for each matching rule, determining at least one storage address corresponding to the matching rule according to an effective bit of a mask in the matching rule and a corresponding keyword, and determining a bit to be configured in N bits of the storage address according to a rule number of the matching rule, writing an effective bit value in the bit; and taking quintuple information in the received message as a storage address of the block RAM, reading a plurality of effective bit values corresponding to the storage address, and determining a rule number of each matching rule hit by the message based on each effective bit value. According to the invention, bit mask rule matching of the message can be realized at a line speed.

The invention relates to the technical field of varnished wire production, in particular to an automatic adjustment method and system for a varnished wire production process, and the method comprises the steps: obtaining the real-time linear speed data of a wire rod in a varnishing process of varnished wire production; determining wire motion characteristics according to the real-time linear velocity data; inputting the wire motion characteristics and the wire speed characteristics into a pre-constructed risk prediction model for prediction processing to obtain a wire motion risk coefficient; steepness of all the sequences is determined according to the real-time linear speed data, and an automatic adjustment strategy is generated according to the steepness output of all the sequences to obtain the wire operation complexity; and inputting the maximum steepness and the wire motion characteristics in the extracted sequence into a multi-dimensional learning model to obtain the wire pay-off speed regulation and control proportion. Under the condition that the safety and adjustability are qualified, the linear speed is automatically regulated by considering the change fluctuation, early warning, trend and complex comprehensive degree of the linear speed, so that the wire pay-off speed regulation and control proportion is greatly improved, and the wire pay-off speed regulation and control proportion is improved. And the uniform coating effect of the enameled wire is ensured.

A system and computer-implemented method for routing an encrypted packet through a cloud enforcement network based on a metadata tag. The cloud enforcement network applies policy and routing attributions or tags outside of the encrypted packet payload in such a way as to not require an inner packet to first be decrypted. Traffic prioritization, data protection, and per application policies are achieved by using such metadata tags for internode routing without the need for DPI or decryption. Furthermore, the metadata itself can also be signed or encrypted depending on the provenance of the data. As such, applying meta-tagging external to an encrypted packet, the payload would not be needed to be decrypted during transit of the packet to express end-to-end policy and routing decisions.

The invention discloses a server name indication SNI identification method and device based on an FPGA, and the method comprises the steps: receiving an Ethernet data packet, obtaining a 72-byte data stream for a current clock period, moving one byte from the first byte of the data stream for one time according to a sliding window with the length of 9 bytes, carrying out the interception, obtaining 64 groups of sub-data streams, and carrying out the recognition of the SNI for each group of sub-data streams, matching the sub-data stream with a preset 9-byte server name indication SNI feature code, and if the matching is successful, obtaining the successfully matched sub-data stream; determining the length of a host name according to the values of the last two bytes in the successfully matched sub-data streams, determining the byte position of a host name field in the Ethernet data packet, and extracting a host name character string from the Ethernet data packet; and if the value of the extracted host name character string meets a preset character string threshold value, outputting a corresponding host name. According to the method and the device, the host name in the Ethernet data packet can be effectively identified at a line speed.

The invention relates to a multi-tenant unified storage routing table item compression method and system based on identification mapping. The method comprises the following steps: in a routing table entry insertion stage, dynamically distributing a minimum available reduce ID for each new tenant, and ensuring that an IP prefix space of the new tenant is not overlapped with a tenant using the same reduce ID; in the lookup stage, a message VNI is firstly converted into a reduce ID through a mapping table realized based on an RAM, then the reduce ID and a destination IP are used as a joint key to look up the TCAM, and by constructing a mapping relation from the VNI to the reduce ID, the table item bit width of the TCAM is remarkably reduced on the premise of ensuring the routing correctness. The method is suitable for an IPv4 / IPv6 multi-tenant environment, the hardware area and power consumption can be effectively reduced especially in an FPGA or ASIC high-performance data plane, and meanwhile the line speed forwarding capacity is kept.

The invention discloses a fine-grained flow scheduling priority marking system for a hardware unloading network, which comprises a packet analysis module for extracting quintuple flow identification information from a data packet and supporting multi-layer protocol field extraction, and a flow table module for maintaining the real-time state of the current active data flow by adopting a double-hash table structure and supporting parallel search and update, the priority judgment module is used for allocating scheduling priorities to current messages through configurable boundary matching rules on the basis of state information returned by a flow table, the message recombination and marking module is used for encoding priority labels into DSCP fields of an IPv4 message header, and the whole system adopts a full-assembly-line hardware architecture and can be ensured to continuously run at a linear speed under a 100Gbps network load. Dynamic packet-by-packet scheduling control is supported, a scheduling priority based on a real-time flow state can be given to each data packet, and fine scheduling of network resources is realized.

The utility model discloses a high -speed spark -discharge wire cutting device with wire storage mechanism is provided in the electric spark wire cutting technical field, including the first wire storage cylinder and second wire storage cylinder of vertical setting in the wire storage box. The high -speed spark -discharge wire cutting device with wire storage mechanism, through the first wire storage cylinder and second wire storage cylinder of vertical arrangement, cooperate the sliding block of sliding setting, realize the conductive wire on the first wire storage cylinder after cutting section and set up to second wire storage cylinder, thereby realize single -layer wire storage, and the sum of the conductive wire length between first fixed pulley and first movable pulley and the conductive wire length between second fixed pulley and second movable pulley remain unchanged in the moving process of moving block, thereby realized the conductive wire moving stability, compared with existing device, avoided the problem that the wire speed changed when the electrode wire was arranged in the laminated arrangement on the wire cylinder, improved wire cutting stability.

The application discloses a multi-service traffic grouping scheduling method for a P4 switch processor core, mainly comprising a feature extraction method based on a statistical interval and a Sketch, comprehensive data packet time correlation and traffic dynamic change, an optimized Bloom filter conflict detection mechanism, improved adaptability and accuracy of the algorithm in a limited resource environment; a decision tree model is combined with scheduling, a decision tree is reconstructed to adapt to a P4 switch operation mode and data processing demand, high-precision service flow classification under line-speed operation is ensured; a grouping scheduling method AD-PIFO is designed based on variable priority, data packet forwarding priority is dynamically adjusted, different service QoS demand is met, and the overall performance and efficiency of the switch are improved. The method is outstanding in high-priority traffic throughput and low-latency performance, and the medium-low-priority traffic throughput is better than that of similar algorithms, is stable and effective under different load conditions, has reasonable additional time overhead of data packet transmission, and is widely used in SDN network optimization data packet scheduling scenes.

The invention relates to a dynamic purification method for 5G user plane traffic. The method comprises the following steps: receiving mixed user plane traffic in a network, preprocessing the received traffic, analyzing the preprocessed traffic according to a message header feature and an extension structure of a user plane bearer protocol, and dynamically identifying and separating out 5G user plane data stream; performing application layer depth detection on the identified 5G user plane data stream, identifying a second type of service data stream established based on the session control signaling, and analyzing a dynamic transmission channel parameter of the second type of service data stream; generating a flow filtering strategy according to the analyzed dynamic transmission channel parameters; and executing a dynamic strategy to carry out linear speed filtering on the 5G user plane data stream. The 5G user plane data flow is identified by analyzing the protocol head feature and the extension structure in the user plane flow in real time, and deep detection is performed on the application layer, so that the 5G flow can be quickly screened in a high-speed network environment.

The application discloses a flat wire motor unwinding device and a control method thereof, and relates to the technical field of wire forming for flat wire motor production, and comprises an unwinding device, a tensioning and monitoring device and a copper wire buffer device. The movable guide wheel is used for tensioning and real-time adjustment of copper wire tension. The unwinding belt is used for isolating the wire coil from the wire pulling component, and the tensile force borne by the copper wire is reduced by more than 30%. The diameter measuring sensor is used for real-time monitoring of the wire coil diameter, the PLC control cabinet is used for dynamic adjustment of the unwinding motor speed, the unwinding wire speed is matched with the unwinding belt wire speed, and constant tension is maintained. The copper wire buffer space is used for storing redundant copper wire through a multi-layer guide wheel structure, and the wire length PID closed-loop control of the unwinding belt and the wire pulling component is combined to realize continuous unwinding. The accumulated wire feeding length matching algorithm is used for smooth processing of signals, and the number of motor start-stop times is reduced by more than 50%, and the equipment service life is prolonged. The application provides key technical support for efficient and high-quality production of flat wire motors, and has remarkable economic benefits and industry popularization value.

The invention discloses a method for keeping the line width consistency of a circuit board, which is characterized by comprising an online control system, and the keeping method comprises the following steps: S1, obtaining the copper thickness of each point of a copper wire on the circuit board; s2, the liquid level of a VCP wire groove and the height of a floating plate are adjusted; s3, the line width design value is adjusted according to the copper thickness; s4, adjusting the etching line speed range according to the copper thickness; s5, monitoring the copper ion concentration in real time; and S6, determining an adjustment means according to the copper ion concentration in the etching process. The copper thickness on the circuit board is obtained in real time, and the liquid level of the VCP wire groove and the height of the floating plate are fed back and adjusted according to the difference between the copper thickness and the preset copper thickness, so that the copper thickness is accurately controlled, the subsequent etching difficulty is reduced, and the consistency of the line width of the circuit board is kept. And through an accurate dynamic compensation mode, the consistency of the finally formed line width can be maintained. According to the technical means, the stability of the forming method of the circuit on the circuit board is improved, and the CPK standard reaching rate of the circuit width of the circuit on the circuit board can be 100%.

This application provides a flow control method, an artificial intelligence distributed training method, an electronic device, a storage medium, and a program product. The method includes: acquiring traffic characteristic information of a data stream to be transmitted sent by an application layer program; generating corresponding flow table rules based on the traffic characteristic information; pre-configuring the flow table rules to a network device and controlling the flow table rules to be in an inactive dormant state; upon receiving a trigger signal sent by the application layer program, sending a control command to the network device to switch the flow table rules to an active state, so that the data stream to be transmitted is transmitted via a target path based on the active flow table rules; the trigger signal is used to instruct the data stream to be transmitted to start transmission. This avoids the problem of repeated PFC oscillations caused by switch buffer congestion due to sudden large traffic flows in traditional RoCE networks, enabling large data streams to be transmitted at a stable rate close to line speed.

The invention relates to a winding type precise coating processing device for a multi-channel flexible implanted wire. The device comprises a multi-coil pay-off mechanism, a wrapping head, a curing unit, a desolventizing unit, a drying unit, an online metering unit and a controller. A wrapping head is provided with an independent main guide belt and a soluble phase guide wire channel, and the main guide belt and the soluble phase guide wire channel are wound on the periphery of the core material in the same direction and at the same pitch when each layer of wrapping is formed; the curing unit adopts a one-time curing and final curing segmentation mode, the screw pitch and the geometric phase are locked firstly, and then the final morphology is frozen; the desolventizing unit is used for dissolving or extracting the soluble guide wire after final curing, so that residues are avoided; the on-line metering unit collects a screw pitch signal in real time, the controller carries out power spectrum analysis, and a beat frequency spectrum peak amplitude is used as a feedback closed loop to adjust the line speed and the wrapping head angular speed. According to the scheme, the beat frequency effect caused by the multi-layer pitch differential is effectively inhibited, the geometric stability of the wire is ensured, the flexibility and the insulating property are improved, no residue is ensured, and the consistency and the long-term reliability of the flexible implanted wire are remarkably improved.

The application discloses a non-sliding refractory metal hot interpass wire drawing machine, which comprises a pay-off part, a main machine part and a take-up part; a pay-off assembly is arranged at the front end of the pay-off part; the main machine part is arranged on one side of the pay-off part; and the take-up part is arranged on the side, away from the pay-off part, of the main machine part; the technical key points are as follows: the fluctuation of the metal wire caused by internal and external factors during the operation of each drawing unit can be detected separately, the wire speed of each drawing unit is adjusted according to the fluctuation, the speed rebalancing and force rebalancing between the drawing units are realized at the first time, the metal wire cannot produce sliding friction during the drawing process, constant tension, constant wire speed, non-sliding and non-friction wire stretching are realized, the manufacturing defects of the traditional wire drawing machine are avoided, and therefore, the product quality is ensured, the yield is improved, the enterprise benefit is improved, meanwhile, the metal wires of all the drawing units are guided into the same heater through the guide wheels, the energy consumed by heating is greatly saved, and the non-sliding refractory metal hot interpass wire drawing machine has a good application prospect.

A method to create a serial wire speed firewall that can monitor and enforce security policy on a CAN buy network and prevent cyber-attacks.

This application relates to a silicon wafer cutting method and apparatus. The silicon wafer cutting method includes the following steps: setting a brand-new cutting wire on a main roller mechanism, driving the cutting wire in the cutting wire mesh to run cyclically through the main roller mechanism, cutting the silicon rod entering the cutting wire mesh into silicon wafers. The cyclical running includes an initial forward run, a reverse run, and a second forward run. The silicon wafer cutting method of this application, by making the cutting wire run cyclically during the cutting process, utilizes a cutting wire three times in a reasonable manner. In the three utilization processes, the cutting depth is maximized during the initial forward run with the highest wire speed, and the cutting depth is minimized during the second forward run with the lowest wire speed. This effectively controls the cutting wire speed and cutting depth according to the wear condition of the cutting wire, so as to make full use of the cutting wire while ensuring the normal operation of the wire bow, and thus ensuring the cutting quality and the quality of the silicon wafer.

A system and method for hardware-accelerated determination of hybrid codebook performance using FPGA implementation. The system transforms the mathematical operations of estimating combined performance of primary and secondary codebooks into dedicated hardware circuits on field-programmable gate arrays. By implementing specialized components for primary term calculation, secondary term calculation, and mismatch probability estimation directly in hardware, the system enables wire-speed performance estimation without generating test codebooks. The FPGA design comprises parallel processing paths, dedicated bit manipulation circuits for logarithmic approximation, and specialized memory structures for occurrence tracking. This hardware implementation enables real-time hybrid codebook optimization in high-throughput environments such as network appliances, storage controllers, and data processing systems, while providing a development pathway toward eventual ASIC implementation for mass-market deployment.

1. Name of the designed product: secondary line speed integrated module (PT cabinet). 2. Use of the designed product: used for electrical connection or signal connection in electrical room. 3. Design points of the designed product: in shape. 4. Picture or photo best showing the design points: perspective view 1.

The invention relates to the technical field of copper body processing, in particular to a wire drawing device for high-speed communication copper conductor processing, which comprises a device base, a reduction gearbox is fixedly connected to the top surface of the device base, an adjustable wire spool is arranged on the outer side surface of an output shaft, and an adjusting control rod is arranged on the bottom surface of the adjustable wire spool. A wire speed adjusting shaft is arranged on the surface of the outer side of the working box, a winding column is arranged at one end of the wire speed adjusting shaft, after the adjustable wire spool is unlocked, the control shaft is inserted into different depths and rotated according to needed parallelism, the radial size of the adjustable wire spool is adjusted to the needed size, meanwhile, the angular speed of the winding column is changed through the wire speed adjusting shaft, and the winding column is adjusted to the needed size according to the needed parallelism. The driving motor adjusts the rotating speed and the torque through the reduction gearbox to drive the two output shafts to rotate, the wire drawing die head is used for wire drawing and spraying cooling liquid through the cooling spray head in the working process to conduct wire drawing of the copper wire, and the effect of parallel adjustment according to the number of times of drawing needed by the copper wire is achieved.

The application relates to a TCP maximum transmission unit dynamic adjustment method and system based on a programmable data plane, and belongs to the technical field of computer networks. Whether the length exceeds the port MTU size is judged by identifying the data packet encapsulation structure, the TCP SYN message maximum transmission unit option is dynamically corrected to inform the opposite end device to adjust the data packet size, different tunnel encapsulation structures are dynamically adapted, and the link efficiency is maximized; according to different tunnel encapsulation structures, the TCP maximum transmission unit size is dynamically adjusted, higher flexibility can be supported to be extended to other types of tunnels, the terminal device and the intermediate device are transparent, the existing infrastructure does not need to be modified, compared with software implementation, linear speed forwarding can be realized, the method has the characteristics of good expansibility and high flexibility, and the MSS size can be adjusted according to the traffic of different network states.

Techniques for utilizing a portion of a communication session identifier (e.g., a Session-ID, an SPI, a CID, a DCID, and / or the like) to indicate a target routing device (e.g., a VPN and / or ZTNA termination device) for establishing control plane session(s) and / or data plane session(s) at wire-speed in a networked computing environment. The routing device(s) of a networked computing environment may generate a communication session identifier and send the communication session identifier to the client device, such that subsequent packets send from the client device may be forwarded to the proper routing device indicated by the communication session identifier for establishment of one or more data plane sessions. Additionally, data plane sessions may be established using a Resumed Handshake rather than a full handshake that is typically required, as Session Resumption utilizes the assigned communication session identifier for mapping.

A method for measuring a line speed frame length comprises: determining a test interval as a preset frame length interval; determining a test frame length according to the test interval; determining a first frame number according to a preset bandwidth, a preset time length and the test frame length; sending a data frame of the test frame length to a network device; receiving a data frame of the test frame length sent by the network device; comparing the first frame number with a second frame number; updating the test interval to a sub-interval of the test interval according to a comparison result; triggering a second step to a seventh step when a length of the test interval is greater than a preset length; and obtaining the line speed frame length when the length of the test interval is not greater than the preset length. The method can improve the measurement accuracy with the increase of the test times. The application further provides a measuring device capable of implementing the above method.

The invention discloses a production method of a flat cable, which comprises the following steps of: S1, conductor preparation: performing back-twist twisting on a conductor wire to prepare a guide wire bundle, the back-twist rate being 100%, and the pitch being (11-13) * OD + / -1mm; s2, insulating extrusion: starting an extruder to heat and pull a guide wire bundle, and enabling the preheated guide wire bundle to pass through the extruder so as to extrude and coat an insulating layer on the surface of the guide wire bundle to form a cable; when the tow is preheated, the preheating temperature is set to be T1 based on the moving linear speed of the tow; and S3, post-processing: performing water-cooling shaping on the cable to keep the shape, wherein the water-cooling temperature is 12-18 DEG C. By heating the conductor and optimizing the synergistic effect of the insulating rubber material formula, the cable wire can simultaneously meet the requirements of zero hoisting displacement and no copper wire breakage during wire stripping; under the condition of high hoisting weight, enough adhesive force exists between the conductor and the insulating layer; and during the wire stripping operation, the adhesive force between the conductor and the insulating layer is ensured to be small, and the processing adaptability and the use reliability of the cable are improved.

The application discloses an integrated tinning machine intelligent control method and system combined with data fusion, and belongs to the field of automatic control. The method comprises the following steps: a multi-dimensional data fusion sensing step, in which the copper-clad steel wire speed, acceleration, width, yaw displacement and rectifier feedback current are acquired; a dynamic current density model construction step, in which a theoretical current reference value is output based on the Faraday electrolysis law and real-time bath parameters; a transient feedforward compensation control step, in which a current compensation amount is calculated according to the acceleration and phase delay time constant, and a predictive current control instruction is generated; and a side effect cooperative optimization step, in which the anode plate position and shielding state are dynamically adjusted according to the width and yaw displacement. The application is suitable for complex production conditions and improves the automatic operation level of the tinning machine set.

This invention discloses a programmable data plane high-intensity traffic response method and system based on feature distribution, belonging to the field of network traffic classification technology. The programmable data plane high-intensity traffic response method based on feature distribution includes: extracting features from each flow in the data plane and determining whether the features are matched by the current rule; if matched, processing according to the corresponding rule; if not matched, processing as an outlier and recording it; periodically sampling processed flows, triggering rule updates when outliers reach a preset threshold; the control plane uses a density-based clustering algorithm to cluster sampled points to obtain the current traffic feature distribution shape, extracting the boundaries of each cluster to form a high-dimensional rectangle as a new rule, and formulating corresponding processing measures based on spatial features and meta-features, and issuing them to the data plane. This invention achieves line-rate processing and dynamic adaptation on resource-constrained programmable hardware, effectively addressing feature drift under high-intensity traffic while ensuring interpretability.

The invention relates to the technical field of network communication, in particular to a programmable data packet scheduling method and system for a network switching chip, and the method comprises the steps: constructing a hierarchical scheduling tree; the hierarchical scheduling tree comprises a leaf node level and a root node level, and each node is provided with a bitmap mapping bucket queue, a dynamic priority window mapping module and a reconfigurable priority calculator. According to the method, the technical problem that an existing scheduler is insufficient in flexibility, performance and expansibility can be solved, and then multi-algorithm dynamic deployment, priority range expansion and hierarchical scheduling optimization are achieved while the linear speed processing performance is kept.

The invention discloses a data drainage device and method in a virtual network, and the device comprises an intelligent network card which is directly connected with a source virtual machine and a target virtual machine, and is used for carrying out the hardware acceleration recognition of the feature information of a data package, and marking the data package according to a preset rule; directly forwarding the unmarked data packet to the target virtual machine, and triggering a drainage operation for the marked data packet; the security service chain controller communicates with the intelligent network card and is used for receiving dynamic registration information of the security virtual machine and generating an extensible service chain topology; issuing a dynamic drainage instruction to the intelligent network card according to the data packet mark; and the secure virtual machine pool comprises at least one secure service node, and each node is connected with the controller through a standard API (Application Program Interface). According to the invention, through cooperation of intelligent network card hardware unloading and dynamic scheduling of the service chain controller, the effects of line speed traffic classification and stateless drainage are achieved, and the problem of poor expansibility caused by flow table rule staticization in the prior art is solved.

The invention provides a testing device of a network switch, which comprises a central processing unit, a first acceleration port, a second acceleration port and a transmission port, and the transmission port is connected with a to-be-tested transmission port of at least one to-be-tested network switch. The first acceleration port, the second acceleration port and the transmission port are set to be the same virtual local area network. The central processing unit transmits the packet to a first acceleration port; the first acceleration port and the second acceleration port enable the packet to reach a preset line speed and transmit the packet to the transmission port through internal loopback and a flooding mechanism of a virtual local area network; the transmission port transmits the packets reaching the preset line speed to the transmission port to be tested; the central processing unit stops the transmission port from transmitting the packet when the test time expires. The invention also provides a test method of the network switch.