835 results about "Voltage clamp" patented technology

A soft-switched single-phase quasi-single-stage (QSS) bi-directional inverter/charger converts AC-DC or DC-AC. The inverter/charger comprises a push-pull inverter/rectifier on the dc-side, an isolation transformer which provides ohmic isolation and voltage scaling, two full-bridges on the ac side in cascade, a voltage clamp branch comprising a capacitive energy storage element in series with an active switch with its anti-parallel diode, a passive filter at the ac side to smooth out the high frequency switching voltage ripple at the output, and a corresponding PWM scheme to seamlessly control the converter to operate in all four quadrant operation modes in the output voltage and output current plane, and is capable of converting power in both directions.

The DC-DC converter connects a first and a second switching circuit for converting power mutually between direct current and alternating current respectively to a first DC power source and a second DC power source and has a transformer between the AC terminals thereof. Here, between the AC terminals of the second switching circuit and the negative pole terminal of the DC power source, a voltage clamp circuit composed of a series unit of switching devices with a reverse parallel diode and a clamp condenser is connected. An isolated bidirectional DC-DC converter which prevents a reduction in a circulating current at time of buck and an occurrence of a surge voltage at time of voltage boost and realizes highly efficiency, low noise, and miniaturization is provided.

A bi-directional DC-DC converter has a transformer for connecting a voltage type full bridge circuit connected to a first power source and a current type switching circuit connected to a second power source. A voltage clamping circuit constructed by switching elements and a clamping capacitor is connected to the current type switching circuit. The converter has a control circuit for cooperatively making switching elements operative so as to control a current flowing in a resonance reactor.

The present invention is a circuit and method for reducing switching and reverse recovery losses in the output rectifiers while creating zero voltage switching conditions for the primary switchers. There are described two output configurations, one employing a soft commutation inductor element a bridge rectifier and a output filter capacitor, the second using a soft commutation inductor element a rectification-filtering bridge composed by two capacitors and two capacitors. Both secondary circuits can be driven by three primary circuits. A first circuit is a full bridge with phase shift control, and a second circuit is a half bridge topology with an additional bydirectional switch which achieves two goals, on to get soft switching commutation across all the primary switches, the second to create the right waveforms in the secondary suitable with the claims in this invention. The third topology is a phase shifted two transistors forward. The circuits claimed in this invention can provide soft commutation across the primary switching elements and secondary rectifier means, clamping the voltage across the rectifiers to the output voltage eliminating the need for snubbers circuits both in primary and the secondary section.

A ring oscillator includes an even-numbered plurality of ring coupled delay stages. Each delay stage includes a differential amplifier, a voltage clamping circuit, and a current source. The differential amplifier receives first and second input signals from a preceding delay stage. The differential amplifier provides a first output signal and a complementary second output signal at first and second nodes, respectively. The voltage clamping circuit is coupled between the first and second nodes to limit a peak-to-peak voltage swing of each of the first and second output signals. The current source is coupled to the differential amplifier and varies a bias current in accordance with a delay bias voltage.

The clamp circuit clamps an input voltage at prescribed higher and lower clamp voltages which are stabilized under a temperature fluctuation. Transistors Q12 and Q14 are switched on in their linear region. In a lower voltage clamp circuit 18, an Vin detecting circuit 20 outputs Va1 by level-shifting Vin by Q13 and voltage-divides by series resistance circuit 23 the level-shifted Vin, while a reference voltage generating circuit 21 outputs Vr1 by level-shifting 0 V by Q15 and voltage-divides by series resistance circuit 25 the level-shifted voltage. Q11 is switched on, when a comparator 22 determines that Va1 descends and goes across Vr1. Here, Q12 is of the same characteristics as Q14, while Q13 is of the same characteristics as Q15. Further, the resistance of the circuits 23 is the same as that of the circuit 25. The higher voltage clamp circuit 19 is similar to the circuit 18.

The invention provides a reverse-connection preventing circuit, a reverse-connection preventing processing method and communication equipment. The circuit comprises a voltage bias resistor connected between the anode and the cathode of the power supply, a bidirectional voltage-lamping circuit and at least one field-effect tube, wherein the voltage bias resistor is connected with the grid electrode of the field-effect tube and is used for conducting and biasing the field-effect tube; the bidirectional voltage-lamping circuit is connected in parallel at two ends of the grid electrode and the source electrode of the field-effect tube and is used for taking a grid electrode and source electrode voltage clamp of the field-effect tube as a first protective voltage when inputting overvoltage in the forward direction; and the first protective voltage is the normal work voltage of the field-effect tube. The invention also provides the reverse-connection preventing processing method and the communication equipment. The invention achieves the input overvoltage protection function of the direct current input reverse-connection preventing circuit and improves the reliability of the circuit.

Several inversion circuits used to convert a DC input to an AC output comprise two series circuits, at least one clamp capacitor, and at least one transformer. Each of the series circuits is in parallel with the DC input. The first series circuit includes one switch network and at least one transformer primary. The second series circuit includes one voltage-clamp network and at least one transformer primary. At least one clamp capacitor couples the first and the second series circuits, and is attached to each series circuit at a node between the respective transformer primary winding. The voltage-clamp network may be implemented with two of the three sub-circuits connected in series: a diode, a resister-capacitor-diode, and a MOSFET-capacitor.

A power supply detection circuit biased by at least two power supply voltages for controlling a signal driver circuit. Upstream and downstream amplifiers, powered by upstream and downstream power supply voltages, respectively, process an original control signal to produce a differential signal via output signal electrodes. Capacitances coupling respective ones of the output signal electrodes to the downstream power supply voltage and the circuit reference potential discharge and charge respective ones of the output signal electrodes in relation to initial receptions of the upstream and downstream power supply voltages and original control signal, following which voltage clamp circuitry maintains such discharged and charged states pending reception of the original control signal in a predetermined state.

A segmented slope compensation circuit applicable to a BUCK converter belongs to the technical field of an electronic circuit. An oscillator circuit is used for introducing output voltage informationof the BUCK converter, a negative input end voltage of an operational amplifier is clamped to a positive input end voltage thereof, a first capacitor is charged by a current mirror, the negative inputend voltage, namely a slop voltage signal, of the operational amplifier is obtained, the slop voltage signal is compared with a second reference voltage to obtain a periodic slope voltage signal, a slope current generation circuit is used for generating compensation slopes with different slope rates under different duty ratios, a slope voltage correlated to the duty ratios is generated on a sampling resistor after passing through a slope summing circuit, and a base current compensation circuit is used for stabilizing a system. Compared with a traditional slope compensation circuit, the segmented slope compensation circuit has the advantages that the system stability is improved by employing different slope compensation rates under different duty ratios; and with the adoption of a triode as a buffer, the segmentation accuracy is improved.

A perfusion chamber includes a porous oocyte support structure. A continuously sloped top surface and a receiving well in the support structure entrap the underside of the oocyte, thereby localizing the cell in a predetermined fixed position within the reach of dedicated voltage-clamp microelectrodes. A test solution is delivered continuously at the top of the chamber, above the oocyte, and withdrawn from the bottom of the chamber, below the oocyte. The porosity of the support material enables the continuous perfusion of test solution around the membrane of the oocyte, including its bottom portion that is held firmly in contact with the holding well. The geometry of the holding well is selected such as to ensure the automatic and precise placement of the oocyte by gravity and to optimize the pressure distribution over its membrane, thereby minimizing the probability of rupture or other damage to the cell. The entire top surface of the support structure is sloped inward toward the substantially central well, and the bottom of the well is contoured to conform to the shape of an oocyte of average size.

A linear voltage regulator has a regulating transistor with a first channel electrode receiving an input voltage source and a second electrode providing an output voltage. A control electrode of the regulating transistor is controlled by an error amplifying circuit based on comparison between a feedback signal of the output voltage and a reference voltage. An event detecting circuit is coupled to the input voltage source for detecting occurrence of a transient in the input voltage source. In response to the detected transient event, an enable controlling circuit generates an enable signal for determining an effective operation time of a voltage clamping circuit. During such effective operation time, a potential difference between the first channel electrode and the control electrode is limited within a predetermined clamp voltage for preventing the regulating transistor from being dramatically changed in operation.

A fast-acting power protection system and a related method of power protection are disclosed. In one embodiment of the invention, the fast-acting power protection system includes a current limiting block capable of reducing or shutting down an unwanted current or voltage surge at an input terminal of the fast-acting power protection system. The fast-acting power protection system also integrates an output voltage clamp and the current limiting block in one piece of monolithic semiconductor material, wherein the output voltage clamp protects an electrical device connected to an output terminal of the fast-acting power protection system from an unwanted voltage surge by rapidly clamping an output voltage to a clamp voltage. Furthermore, the fast-acting power protection system also protects from a reverse polarity input voltage and dielectrically isolates a MOSFET for reverse polarity protection from other current-limiting MOSFET's inside the current limiting block.

High voltage clamps with active activation and activation-release control are provided herein. In certain configurations, a clamp can have scalable operating clamping voltage level and can be used to protect the electrical circuit connected to a power supply of a semiconductor chip from damage from an overstress event, such as electrostatic discharge (ESD) events. The pins of the power supply are actively monitored to detect when an overstress event is present, and the clamp is turned-on in response to detecting the overstress event. A timer is used to shut down the clamp after a time delay from detecting the overstress event, thereby providing a false detection shutdown mechanism that prevents the protection clamp from getting falsely activated and remain in the on-state during normal circuit operation.

Process variation-tolerant diodes and diode-connected thin film transistors (TFTs), printed or patterned structures (e.g., circuitry) containing such diodes and TFTs, methods of making the same, and applications of the same for identification tags and sensors are disclosed. A patterned structure comprising a complementary pair of diodes or diode-connected TFTs in series can stabilize the threshold voltage (V_t) of a diode manufactured using printing or laser writing techniques. The present invention advantageously utilizes the separation between the V_t of an NMOS TFT (V_tn) and the V_t of a PMOS TFT (V_tp) to establish and/or improve stability of a forward voltage drop across a printed or laser-written diode. Further applications of the present invention relate to reference voltage generators, voltage clamp circuits, methods of controlling voltages on related or differential signal transmission lines, and RFID and EAS tags and sensors.

An integrated circuit is provided for use with a supply voltage and which includes an input/output (I/O) circuit with an output driver with a pull-up transistor and a pull-down transistor and which includes an I/O pin connected to receive output signals from the output driver and connected to provide input signals to the integrated circuit, the protection circuit comprising: bias circuitry that imparts a bias voltage to the pull-up transistor so as to substantially prevent leakage current when a voltage applied externally to the I/O pin rises above the supply voltage; a switch connected to conduct current from the I/O pin to the supply voltage when the switch is turned on and to block current flow from the I/O pin to the supply voltage when the switch is turned off; and voltage clamp circuitry connected to clamp voltage on the I/O pin to the supply voltage when the switch is turned on; and programming circuitry which is programmable to turn the switch on and off.