487 results about "Voltage clamp" patented technology

The invention discloses a slew rate enhancement circuit of an operational amplifier, which comprises a comparison module used for comparing a positive input voltage and a negative input voltage of the operational amplifier and generating a first comparison signal and a second comparison signal according to a comparison result; the slew rate enhancing module is used for enhancing the slew rate of the falling edge of the output voltage of the operational amplifier according to the first comparison signal and enhancing the slew rate of the rising edge of the output voltage of the operational amplifier according to the second comparison signal; the common-mode feedback module is used for clamping the common-mode voltage of the first comparison signal and the common-mode voltage of the second comparison signal to a reference voltage when the operational amplifier is in a steady state, so that the slew rate enhancing module is in a closed state; therefore, the slew rate of the output voltage of the operational amplifier can be quickly enhanced when the operational amplifier has large step signal output, so that the output of the operational amplifier is quickly responded and established.

The present disclosure concerns a method for measuring a degradation of thermal characteristics of a power module comprising sequences of: - injecting current pulses (Pinj), having a voltage-clamped constant amplitude (IInj), between an emitter and a gate of a power semiconductor of such power module, a duration of said voltage-clamped constant amplitude (Iinj) current pulses (Pinj) being modulated periodically with a modulation frequency (Fmod), said current pulses causing losses modulated with said modulation frequency (Fmod), - measuring a parameter (k.Tj) dependent of a junction temperature (Tj) of such power semiconductor at the beginning of said current pulses, - measuring a phase shift (Δφ) between said modulation frequency (Fmod) and said parameter (k.Tj), said phase shift (Δφ) providing a health indicator for the power module.　

The utility model discloses a lightning protection circuit and a power converter, and relates to the technical field of power electronics. According to the lightning protection circuit, for the condition that a capacitor parallel branch in a bus capacitor circuit comprises a first capacitor, a second capacitor and an inductor, and the first capacitor is connected with the inductor in series and then connected with the second capacitor in parallel, a lightning protection device is arranged to be connected with the inductor in parallel; in the lightning stroke process, the voltage at the two ends of the inductor exceeds the action voltage of the lightning protection device, so that the lightning protection device is broken down, and the voltage at the two ends of the inductor is clamped at the voltage drop after the lightning protection device is broken down, so that overlarge voltage cannot be formed on the second capacitor; therefore, the problem of voltage oscillation caused by current backflow at the lightning stroke moment can be weakened, the voltage stress borne by a corresponding power device in a post-stage circuit is reduced, and the corresponding power device is effectively protected.

The invention discloses a gallium nitride driving circuit which is used for generating driving voltage for driving a gallium nitride transistor. The circuit comprises a gallium nitride switching tube, an upper switching tube, a lower switching tube, a clamping module, an energy collection module, a diode, a capacitor, a clamping and logic driving module and a bias voltage generation module. The gallium nitride switch tube is connected with the drain electrode of the gallium nitride transistor and clamps the drain electrode voltage to a first voltage; the clamping module receives the first voltage and clamps the first voltage to a second voltage; the energy collection module receives the second voltage and the PWM signal and generates a power supply voltage and a stable voltage. The clamping and logic driving module receives a power supply voltage and a PWM signal and generates a pull-down driving signal. The bias voltage generation module receives the stable voltage and the pull-down driving signal and outputs a bias voltage. When the PWM signal is at a high level, the pull-down driving signal is at a low level, the bias voltage is at a high level, and the driving voltage is at a high level; when the PWM signal is at a low level, the pull-down driving signal is at a high level, the bias voltage is at a low level, and the driving voltage is at a low level.

The utility model relates to a surge protection circuit and an automobile controller system, and relates to the technical field of automobiles. The circuit comprises at least one surge protection sub-circuit, and each surge protection sub-circuit is connected with a bus. The surge protection sub-circuit comprises a first surge sub-circuit and a second surge sub-circuit. The first end, the second end and the control end of the first surge sub-circuit are electrically connected with the bus, the first voltage end and the second voltage end respectively. The first end, the second end and the control end of the second surge sub-circuit are electrically connected with the bus, the first voltage end and the third voltage end respectively. When the difference between the voltage of the signal transmitted by the bus and the voltage of the second voltage end is greater than or equal to a first threshold value, the first surge sub-circuit clamps the voltage on the bus to a first safety voltage. And when the difference between the voltage of the third voltage end and the voltage of the signal transmitted by the bus is greater than or equal to a second threshold value, the second surge sub-circuit clamps the voltage on the bus to a second safety voltage.

The invention discloses a negative voltage clamping circuit and method. The negative voltage clamping circuit comprises a current mirroring module which is used for providing a reference current Iref and generating a corresponding reference current according to a preset current proportion mirroring; the voltage detection module is connected with the current mirror module and the negative voltage input end of the chip and is used for detecting the voltage VS of the negative voltage input end; and the clamping control module is connected with the current mirroring module and the voltage detection module, and the clamping control module is configured to be switched on when the voltage VS of the negative voltage input end exceeds a preset clamping threshold value and clamp the voltage VS of the negative voltage input end within a preset range. According to the negative voltage clamping circuit, the change of the negative voltage input end can be monitored in real time, it is ensured that the clamping control module responds rapidly when the voltage exceeds a threshold value, the negative voltage is limited within a safe range, circuit damage or performance reduction caused by too low voltage is avoided, and therefore the stability and reliability of a chip are improved.

In one example, a circuit includes a first transistor having a first terminal coupled to a first supply voltage source, a second transistor coupled between a second terminal of the first transistor and a ground terminal, and a voltage clamp circuit coupled between the first supply voltage source and the ground terminal. The circuit may further include a first switch coupled between a control terminal of the first transistor and a second supply voltage source, the first switch having a control terminal coupled to the second terminal of the first transistor, a second switch coupled between a control terminal of the second transistor and the second supply voltage source, the second switch having a control terminal coupled to the ground terminal, and a filter coupled between the control terminal of the second transistor and the ground terminal.

The utility model provides a protection circuit and a vehicle power utilization system, and relates to the technical field of electronic circuits. The protection circuit comprises a voltage clamping unit, a voltage comparison unit and a first switch unit, wherein one end of the voltage clamping unit is connected with a power supply input end, the other end of the voltage clamping unit is connected with a first input end of the voltage comparison unit, and the voltage clamping unit is used for clamping the voltage of the power supply input end to a first voltage and outputting the first voltage to the voltage comparison unit; the second input end of the voltage comparison unit is connected with a preset voltage reference point, the output end of the voltage comparison unit is connected with the control end of the first switch unit, and the voltage comparison unit is used for turning off the first switch unit when the first voltage is larger than the voltage input by the preset voltage reference point; the first end of the first switch unit is connected with the power input end, and the second end of the first switch unit is connected with the voltage output end. Therefore, when a load throwing event occurs, high voltage is clamped, overvoltage protection is realized, and damage to electric equipment is avoided.

The invention provides a feedback circuit, a DCDC conversion circuit, a chip and electronic equipment. The feedback circuit comprises a first clamping circuit, a digital-to-analog conversion circuit, a voltage and current conversion circuit and a first voltage division circuit. The first clamping circuit is used for receiving a first reference voltage and clamping the voltage of the input end of the digital-to-analog conversion circuit at the first reference voltage, and the digital-to-analog conversion circuit is used for converting the first reference voltage into a first voltage according to a received binary code value of a set output voltage; the voltage and current conversion circuit is used for converting the first voltage into first current; the first voltage division circuit is used for generating a feedback voltage according to the actual output voltage of the DCDC conversion circuit and the first current and transmitting the feedback voltage to the control circuit. According to the feedback circuit provided by the invention, the direct-current signal feedback coefficient and the alternating-current signal feedback coefficient are separately designed, the alternating-current signal feedback coefficient is reasonably designed, the problem of small alternating-current feedback quantity fed back to the control circuit in the related technology is solved, and the transient response performance of the system is improved.

The invention discloses a dual-channel voltage clamping circuit, a chip and electronic equipment, and the dual-channel voltage clamping circuit comprises a first voltage clamping circuit which is connected with a to-be-clamped position and is used for clamping the voltage of the to-be-clamped position to a positive voltage clamping value when the voltage of an input signal is in a first voltage range, and a second voltage clamping circuit which is connected with the to-be-clamped position and is used for clamping the voltage of the to-be-clamped position to a negative voltage clamping value when the voltage of the input signal is in a second voltage range; the second voltage clamping circuit is connected with the to-be-clamped position and used for clamping the voltage of the to-be-clamped position to a negative voltage clamping value when the voltage of the input signal is in a second voltage range; wherein the voltage in the first voltage range is greater than the voltage in the second voltage range, and wherein the negative voltage clamp value is full amplitude adjustable. According to the dual-channel voltage clamping circuit, at least the negative voltage clamping value can be flexibly adjusted to meet different requirements, positive and negative voltage clamping is achieved through dual channels, the positive and negative voltage clamping does not affect each other, and the accuracy of the positive and negative voltage clamping is ensured.

The present invention discloses a level conversion circuit and chip for converting an input signal in a first voltage domain into an output signal in a second voltage domain. The level conversion circuit includes: a switch unit including a first MOS transistor and a second MOS transistor, wherein the control end of the first MOS transistor and the control end of the second MOS transistor are both connected to a bias voltage; an input unit operating in the first voltage domain and connected to the second end of the first MOS transistor and the second end of the second MOS transistor; a conversion unit operating in the second voltage domain and connected to the first end of the first MOS transistor and the first end of the second MOS transistor; an output unit operating in the second voltage domain; and a clamping unit connected between the switch unit and a first low voltage. In a first state, the first high voltage is not powered off and the clamping unit is disconnected. In a second state, the first high voltage is powered off and the clamping unit is turned on to clamp the driving voltage to the second low voltage. The present invention reduces chip area and avoids power consumption caused by the DC current brought by the pull-down element.

The invention provides a method and device for increasing the rated current breaking frequency of a direct-current solid-state circuit breaker and application of the method and device, and aims to solve the problem that the breaking frequency of an existing direct-current solid-state circuit breaker is limited due to over-temperature damage caused by performance degradation after multiple current impacts of a piezoresistor and difficult measurement of the junction temperature of a power device. The system comprises a junction temperature prediction module based on a physical information neural network, an auxiliary energy absorption module and a power device voltage clamping module. The junction temperature prediction module is used for accurately predicting the junction temperature of the power device in real time by fusing a physical thermal model and a neural network; the voltage clamping module suppresses turn-off overvoltage; and the auxiliary energy absorption module is started when the junction temperature is close to the limit to absorb residual energy. According to the design, turn-off energy is reasonably distributed, the impact frequency and strength of the piezoresistor are reduced, the service life of the piezoresistor is remarkably prolonged (for example, the service life is prolonged by about 10 times under the impact of 200A), then the rated breaking frequency of the solid-state circuit breaker is greatly increased, and the solid-state circuit breaker is low in cost, high in reliability and suitable for scenes such as a direct-current power grid.

The utility model discloses an inductive load circuit of a gallium nitride device and electronic equipment, which are used in the technical field of gallium nitride. According to the utility model, when the gallium nitride device is in a turn-off state, the drain-source electrode voltage of the gallium nitride device is clamped in the maximum withstand voltage of the drain-source electrode of the gallium nitride device through the clamping circuit, so that the gallium nitride device can be effectively prevented from being broken down by the voltage and losing efficacy; the gate-source voltage of the gallium nitride device is adjusted through a potential self-building circuit, the gallium nitride device is controlled to work in a semi-conduction state, the current of the inductor is released, and the turn-off process of the gallium nitride device is completed; according to the utility model, in the turn-off process of the gallium nitride device, the clamping circuit and the potential self-building circuit are signal circuits, the power of the gallium nitride inductive load circuit is not additionally consumed, the power loss of the gallium nitride inductive load circuit can be effectively avoided, and the system efficiency of the gallium nitride inductive load circuit is improved.

The invention relates to the technical field of off-grid renewable energy hydrogen production, and discloses an off-grid alkaline hydrogen production system and a power adaptive distribution and safety control method thereof, the off-grid alkaline hydrogen production system comprises a renewable energy power supply unit, a parallel electrolytic cell module, a gas-liquid treatment system and a main controller; in the Faraday hydrogen production mode, the bubble volume is compressed by adjusting the operation pressure so as to modulate the impedance characteristic of the electrolytic cell, and the energy efficiency is improved in cooperation with current control; and in the non-Faraday polarization hot standby mode, the voltage of the rectifier cabinet is controlled to be clamped to a non-gassing polarization interval, and liquid level plugging is constructed in the U-shaped communicating pipeline according to the fluid statics principle. The system is further provided with a transient buffering strategy based on the pneumatic capacity, and pressure attenuation is delayed through the gas dead zone volume when power is suddenly reduced. The problems of hydrogen production efficiency optimization, low-power safe hot standby and mechanical protection under wide power fluctuation are effectively solved.

Described embodiments include a power driver circuit having a first transistor coupled between an input voltage terminal and an intermediate terminal, and having a first control terminal. A second transistor is coupled between the intermediate terminal and a switching terminal, and has a second control terminal coupled to an output of a gate drive circuit. A first diode has a first anode coupled to the input voltage terminal, and a first cathode coupled to the first control terminal through a resistor. A first voltage clamp circuit is coupled between the first control terminal and the intermediate terminal. A second voltage clamp circuit is coupled between the first control terminal and the switching terminal. A second diode is coupled between the first control terminal and a voltage supply terminal.

A method and apparatus for determining the total external voltage of a relay, and a vehicle and a storage medium. The method is applied to a BMS comprising relays (104, 105). The BMS comprises a reference source (103) and a plurality of voltage-dividing resistors, wherein the relays (104, 105) are connected to the plurality of voltage-dividing resistors (106, 107, 108, 109) in series, the reference source (103) is used for clamping a voltage of a central contact of the plurality of voltage-dividing resistors (106, 107, 108, 109) to a first voltage value, and voltage-dividing resistors located on two sides of the central contact have equal resistance values. The method comprises: determining a second voltage value of voltage-dividing resistors (106, 107), which are located on a positive electrode side of a central contact, and a third voltage value of voltage-dividing resistors (108, 109), which are located on a negative electrode side of the central contact; and determining the total external voltage value of a relay on the basis of a first voltage value, the second voltage value and the third voltage value.

A power semiconductor circuit is provided for clamping the voltage across the circuit during a fault. The circuit may include a power semiconductor switch, a clamping branch coupled in parallel with the power semiconductor switch, a snubber branch coupled in parallel with the power semiconductor switch and the clamping branch, and an isolation switch coupled in series with the power semiconductor switch. The clamping branch may include a first capacitor and a surge arrester coupled in parallel with a first resistor. The first capacitor may be coupled in series with the surge arrester and the first resistor. The snubber branch may include a second capacitor, a plurality of resistors, and a diode.

The invention discloses an overcurrent protection circuit, a linear voltage regulator and an overcurrent protection method. The linear voltage regulator comprises a power tube; the overcurrent protection circuit comprises a sampling module, a comparison module and a driving module; the sampling module collects the current of the output end of the linear voltage regulator and outputs a first current signal. The comparison module outputs a first voltage signal and a second voltage signal according to the accessed first reference signal and first current signal, and the first voltage signal and the second voltage signal are reverse signals; the driving module is connected to a loop circuit of the linear voltage regulator and connected with the comparison module and the control electrode of the power tube, and the driving module controls the driving voltage of the power tube according to the first voltage signal and clamps the driving voltage of the power tube at a first preset value according to the second voltage signal. The over-current protection circuit provided by the invention can ensure that the driving voltage of the power tube changes smoothly when over-current protection is carried out on the linear voltage regulator, so that circuit elements are effectively protected.

The invention discloses a readout circuit selected from a strobe memory, comprising: a clamp voltage generating circuit for clamping a word line readout voltage of a memory cell and generating a read current; the current bias circuit is externally connected with a bias voltage, generates a bias current according to the bias voltage, and compensates the read current; the current acquisition circuit is used for acquiring read current on the storage unit and mirroring the acquired read current to the sensitive amplifier circuit; the reference current generating circuit is used for generating reference read current and mirroring the reference read current to the sensitive amplifier circuit; and the sensitive amplifier circuit is used for generating a first voltage and a second voltage according to the read current and the reference read current, comparing the first voltage with the second voltage, and outputting storage data in the storage unit according to a comparison result. According to the reading circuit disclosed by the invention, reading errors caused by inconsistency of device parameters are overcome, and high-speed reading can be realized.

The invention relates to the technical field of isolation driving chips, and provides a common-mode rejection circuit, an isolation transmission circuit and a motor driving circuit. The common-mode rejection circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first resistor, a second resistor, a first clamping circuit and a second clamping circuit. The first clamping circuit is coupled between the power supply voltage of the receiver and a common node of the first end of the first transistor and the first end of the second transistor, and is used for clamping the voltage on the first common node; the second clamping circuit is coupled between a common node of the first end of the third transistor and the first end of the fourth transistor and the reference ground of the receiver, and is used for clamping the voltage on a second common node. According to the invention, the common-mode transient interference can be effectively suppressed in the isolation transmission circuit, and the system reliability is improved.

A short-circuit protection circuit of a half-bridge driving chip relates to the field of short-circuit protection and integrated circuit design, and comprises a pre-driving module for generating a high-side signal and a low-side signal; the half-bridge module is driven, a high-side MOS receives a high-side signal, and a low-side MOS receives a low-side signal; the gate source hardware clamping module is used for carrying out voltage clamping on the high-side MOS when over-current of the over-ground short circuit of the high-side MOS is detected; the phase voltage short-circuit protection module is used for controlling the overcurrent time when the high-side MOS short circuit is over-current, and sending a fault signal to the logic module when detecting that the high / low-side MOS short circuit is over-current; the bus over-current protection module is used for sending a fault signal to the logic module when bus over-current is detected; and the logic module judges whether the short-circuit protection circuit enters a protection state according to the fault signal. According to the invention, the response speed and the protection mechanism are intelligently switched in real time in different overcurrent fault scenes through the three-stage protection circuit, and the circuit has the characteristics of high sensitivity, fast response speed and strong anti-interference capability.

The invention belongs to the field of electrostatic discharge (ESD) and electrical overstress (EOS) pulse protection of an integrated circuit, and particularly provides an electrostatic surge integrated protection circuit of a high-reliability high-voltage driving chip, which is used for solving the problems of easy latching, high trigger voltage, poor robustness, low starting speed and the like in a traditional high-voltage ESD / EOS protection scheme. The SCR structure, the Zener structure and the LDMOS structure are technically embedded, the voltage clamping capacity of the Zener diode, the high voltage endurance capacity of the LDMOS, the quick response characteristic of the composite transistor and the strong discharge capacity of the SCR are integrated, the electrostatic and surge integrated protection efficiency is achieved, and under the ESD / EOS electric stress effect, the electrostatic and surge integrated protection effect is achieved. The composite structure promotes orderly opening of the Zener structure, the SCR structure and the LDMOS structure under the action of positive feedback, so that ESD and EOS protection requirements of different pulse frequencies are met, the hysteresis effect and the trigger voltage are remarkably reduced, and the latch-up phenomenon is effectively avoided.

In some examples, the system may include a parametric system matrix coupled one or more test and measurement instruments. Also, the system may include an adapter circuit coupled to the parametric system matrix, the adapter circuit having a voltage clamping circuit coupled to the parametric system matrix. Furthermore, the system may include a probe circuit coupled to the adapter circuit and to the power device, where the power device is disposed on a wafer.

Circuits and methods are provided that more effectively and efficiently implement multi-level converter circuits. In some embodiments an integrated circuit comprises first and second terminals. The integrated circuit may be configured to provide a first voltage at the first terminal based on a difference between a second voltage and a third voltage, clamp the first voltage at a minimum level when the difference between the second voltage and the third voltage would cause the first voltage to drop below the minimum level, and force the first voltage at the first terminal below the minimum level regardless of the second voltage and the third voltage in response to a fault condition.

The invention discloses an absorption circuit for a multi-path parallel flyback switching power supply MOS (Metal Oxide Semiconductor) tube, which is used for controlling voltage between a drain electrode and a source electrode of the MOS tube and comprises a first flyback circuit, a second flyback circuit and an absorption circuit, and the first flyback circuit and the second flyback circuit are connected in parallel and are connected to an output end of the absorption circuit; and the high-frequency capacitors C101 and C103 respectively form a loop with the primary side leakage inductance Lm of the transformer in the first flyback circuit and the second flyback circuit, so that the voltage amplitude generated by resonance of the leakage inductance Lm and the parasitic capacitance Coss of the MOS tube is reduced. Meanwhile, fast recovery diodes D102 and D104 are conducted, so that a high-frequency capacitor C102 absorbs voltage energy, a transient voltage suppression diode D101 performs voltage clamping, and terminal voltage of an MOS tube in the flyback circuit is controlled. The circuit is verified by an actual multi-path parallel flyback switching power supply, the work is stable and reliable, the stress control effect of the MOS tube is good, and the cost is relatively low.

The invention discloses a shield gate field effect transistor for eliminating voltage clamping and a preparation method thereof, the shield gate field effect transistor comprises a shield gate, a control gate and source electrode metal, the shield gate and the control gate are located in a groove, the shield gate comprises a gate body part and an extension part, the gate body part is located below the control gate, the extension part extends upwards from the gate body part, and the source electrode metal is located in the groove. The extension part is led out from two sides of the control gate to the top of the groove, or the extension part is led out from one side of the control gate to the top of the groove; the top of the extension portion is in direct contact with the source metal by configuring a contact hole structure. Compared with an up-and-down structure of a shield grid and a control grid in a traditional SGT, a whole contact hole can be formed in the top of the extending part of the extended shield grid to be in direct contact with source electrode metal, shield grid resistance is eliminated, shield grid current and voltage are avoided, the voltage clamping problem introduced by shielding is eliminated, and the stability of the SGT is improved. Meanwhile, the charge balance effect and electric field distribution of the whole chip are improved, and current concentration is reduced.

The embodiment of the invention provides an electronic data destruction system, which comprises the following steps of: covering and erasing stored data to generate a logic destruction state; the main storage power line and / or the key control chip are / is burnt out in a voltage clamping and / or current fusing mode through the self-destruction circuit. By means of logic erasing and physical destroying, data destroying is thorough and irreversible, a data reconstruction path is thoroughly blocked, and irrecoverability of data is fundamentally ensured.

A system and method for converting an input AC voltage of a voltage source into an output DC voltage is proposed. The proposed system and method include at least two MEMS switches coupled in parallel with a corresponding voltage clamp switch within a MEMS rectifier. The MEMS switches achieve Zero-Voltage-Zero-Current (ZVZC) Turn on and Zero-Current-Zero-Voltage (ZCZV) Turn off through the inclusion of at least one high frequency switch and a current diverting circuit which ensure that when the at least two MEMS switches transition between an on-state and off-state there is no voltage or current present in the at least two MEMS switches.

A buffer circuit, a linear regulator, a display panel, and a head-mounted display device. The buffer circuit (20) comprises an error amplification module (11), a voltage clamping module (12), and an output module (13); an input end of the voltage clamping module (12) is connected to an output end of the error amplification module (11), an output end of the voltage clamping module (12) is connected to a first input end (O1) of the output module (13), and the voltage clamping module (12) is configured to clamp, when a load current changes, the voltage of the output end of the error amplification module (11) and then transmit the clamped voltage to the first input end (O1) of the output module (13); and a second input end (O2) of the output module (13) is connected to an input end of the buffer circuit (20).

The utility model discloses a level conversion circuit, a chip and a display driving device. The level conversion circuit comprises an input signal processing unit which is coupled with an enable signal and an input signal, during the effective level period of the enable signal, the input signal processing unit provides a first control signal and a second control signal which are opposite in phase, and the overturning of the first control signal and the second control signal follows the overturning of the input signal; the enabling unit is coupled with the enabling signal and provides the clamping voltage during the invalid level period of the enabling signal; the conversion unit is coupled with the first control signal and the second control signal during the effective level period of the enable signal so as to convert the input signal of the first power domain into the output signal of the second power domain; or a clamp voltage is coupled during the invalid level period of the enable signal to clamp the output signal to the clamp voltage, and the voltage value of the clamp voltage falls into the second power domain. Start-stop control of the level conversion circuit is achieved through the enabling unit, and product use scenes can be expanded.