46results about How to "Reduce reverse recovery loss" patented technology

An electric power conversion system including a direct current power supply, plural main circuit switching devices bridge-connected to convert the direct current to alternating current, including free wheeling diodes connected in reverse parallel thereto, respectively, and a reverse voltage application circuit applying a reverse voltage smaller than the direct current power supply to each free wheeling diode, upon cutoff of back-flow current of the free wheeling diode. The reverse voltage application circuit includes in series connection a low-voltage direct current power supply having a voltage lower than the direct current power supply, a reverse voltage application switching device having holes as a majority current and a lower withstand voltage than the main circuit switching devices and adapted to turn on upon reverse recovery of the free wheeling diode, and an auxiliary diode having a shorter reverse recovery time than the free wheeling diode.

The invention discloses a combined switch comprising a first transistor, a second transistor, a first body diode, a second body diode and a first diode, wherein the cathode of the first body diode is connected with the drain of the first transistor, and the anode of the first body diode is connected with the source of the first transistor; and the cathode of the second body diode is connected with the drain of the second transistor, and the anode of the second body diode is connected with the source of the second transistor. The combined switch further comprises a first transistor and a second transistor both of which are reversely connected in series, wherein the first diode is parallelly connected with the first transistor and the second transistor which are connected in series. The combined switch can be used for solving the problems that a diode has large conduction loss during normal rectification, or the reverse recovery losses of body diodes are large by utilizing an MOSFET (metal oxide semiconductor field effect transistor) and the body diodes during synchronous rectification and the like, and improving the efficiency of a circuit.

The invention relates to a two-way two-tube forward converter topology, its main circuit composed of power supply, four power diodes, two primary side clamping diodes, two serial capacitances, a main power transformer composed of primary winding and secondary winding with a secondary side composed of a rectifier with two rectifier diodes and an output filter capacitance. It remains the advantages of low primary-side voltage stress of a two-way two-tube forward converter, no direct turn-on of bridge arm, high reliability, etc; compared with general two-way two-tube forward converters, it has only two clamping diodes and simple structure; it adopts magnetic integration technique of transform, further reducing the bulk and enhancing power density of transform. It not only implements zero voltage turn-on and turn-off, but also basically eliminating voltage peak of diodes in the secondary rectifier by the clamping action of filter capacitance, having very high efficiency.

The invention provides a controlling method for a staggering duplex tube forward converter. The converter comprises two main change-over circuits that are connected with each other in parallel; and each main change-over circuit comprises a first power semiconductor switch, a second power semiconductor switch, a first diode, a second diode, a transformer, and a rectification switch. The controlling method comprises that the paired power semiconductor switches are switched on simultaneously but not simultaneously switched off, instead, the second power semiconductor switch in the other pair is not switched off until the first and the second power semiconductor switches in one pair are switched on.

A super junction MOSFET is disclosed. The super junction MOSFET includes a plurality of mutually parallel pn junctions extending in a vertical direction on a first principal surface of an n-type semiconductor substrate; a parallel pn layer in which n-type drift regions and p-type partition regions, each sandwiched between the adjacent pn junctions, are disposed alternately in contact with each other; and an MOS gate structure on the first principal surface side of the parallel pn layer, wherein an n-type first buffer layer and second buffer layer are in contact in that order on the opposite principal surface side, and the impurity concentration of the first buffer layer is a concentration that is equal to or less than the same level as that of the impurity concentration of the n-type drift region.

The invention discloses a semiconductor power device with ultralow power consumption, wherein the quantity of photo-etching layers is small, and reverse recovery time is short. The device comprises a semiconductor baseplate, wherein a cellular area and a terminal protection area are disposed on the semiconductor base plate; and cells are disposed in the cellular area. The structure of the cellular area comprises a cellular groove, wherein upper conductive polycrystalline silicon layers and lower conductive polycrystalline silicon layers are disposed in the cellular groove; two sides of the upper conductive polycrystalline silicon layers are symmetrically disposed at extension parts which are located on two sides of the lower conductive polycrystalline silicon layers so as to form a cap-shaped structure. At least two voltage partition rings and at least one stop ring are disposed in the terminal protection area. The conductive polycrystalline silicon layer close to a voltage partition groove of the cellular area is electrically connected to a source electrode of the device; the rest conductive polycrystalline silicon layers in the voltage partition groove are suspended; and a Schottky diode is disposed in a transition area which is located between the cellular area and the terminal protection area. The invention also discloses a method which can be used for manufacture of the semiconductor power device with the ultralow power consumption.

The invention provides an improved HERIC single-phase inverter. The improved HERIC single-phase inverter comprises a direct current power supply, an H bridge arm, a filter circuit and a continuous current circuit, wherein two ends of the H bridge arm are respectively connected to positive and negative poles of the direct current power supply; two ends of the filter circuit are respectively connected to the midpoint of the H bridge arm; the continuous current circuit is connected in parallel to the filter circuit, and comprises two switch tubes which are connected in series reversely and at least one inductor; and the inductor is connected in series with the switch tubes. According to the inverter, at least one inductor is added onto the continuous current circuit of the inverter, and is connected in series with the switch tubes, so that an extra dead zone is not required to be inserted when the inverter is modulated, current passing through the switch tubes and a diode is nearly zero when the switch tubes are connected or disconnected, and the switching loss of the switch tubes and reverse recovery loss of the diode during working of the inverter can be remarkably reduced.

The invention discloses a multi-path direct current power supply circuit, which comprises a master transformer and a first rectification filtering unit. The master transformer comprises a primary winding and a secondary winding. The primary winding of the master transformer and a first switch are connected in series with input voltage. The secondary winding of the master transformer, the first rectification filtering unit and a current sharing capacitor form a power supply loop. In the first rectification filtering unit, a first input end is connected with the second input end of the first rectification filtering unit sequentially by a first diode, a second capacitor and a fourth diode, and a second input end is connected with the first input end of the first rectification filtering unit sequentially by a third diode, a first inductor, a first capacitor and a second diode. The multi-path direct current power supply circuit can be applied to low-cost occasions in which the primary sides of the master transformers are provided with only one switching tube respectively.

The invention discloses a power semiconductor device and a preparation method thereof, and belongs to the field of power semiconductor devices. A punch-through triode structure for extracting electrons in a drift region is introduced, so that the injection efficiency of a front hole is reduced, an emitter hole current is converted into an electron drift current, and the conduction voltage drop is not obviously increased; in addition, adjustment of punch-through area and position is realized by changing density and morphology of the front grooves, so that efficiency of electron extraction and front hole injection is changed, and design flexibility and design dimension of the device are improved.

The invention belongs to the technical field of switch power supply control, and particularly relates to a switch power supply driving circuit for reducing loss of metal-oxide-semiconductor (MOS) tubediode in a switch power supply circuit. The switch power supply circuit at least comprises an upper MOS tube, a lower MOS tube and an inductor, a driving circuit comprises an upper MOS tube driving power supply, a lower MOS tube driving power supply, a time sequence control circuit, an upper MOS tube driving circuit and a lower MOS tube driving circuit, the upper MOS tube driving circuit and/or the lower MOS tube driving circuit comprises four transistors and a switch, the conduction of a lower MOS tube diode is effectively prevented during the conversion process from switch-off of the lowerMOS tube to the conduction of the upper MOS tube and/or the conduction of an upper MOS tube diode is effectively prevented during the conversion process from switch-off of the upper MOS tube diode tothe conduction of the lower MOS tube, or only a small part of current flows through a body diode, so that reverse recovery loss caused by the body diode is effectively reduced.

The invention relates to a fast recovery diode and a manufacturing method thereof, and belongs to the technical field of semiconductor devices. The fast recovery diode comprises: a substrate of a first conductivity type; an anode region of a second conductivity type over the substrate, wherein a doped region of a first conductivity type is embedded in the anode region; an anode metal layer over the anode region; a cathode region of the first conductivity type under the substrate; and a cathode metal layer below the cathode region. The doped region of the first conductivity type is introduced into the anode region of the second conductivity type, the contact between the surface of the anode region and the metal is not influenced, and the doped region of the first conductivity type can inhibit the hole injection efficiency of the anode region when the fast recovery diode is conducted. When the fast recovery diode is turned off, the doped region of the first conductivity type can generate electrons, so that holes of the body region are rapidly compounded, the purpose of reducing the turn-off loss of the device is achieved, and the performance of the device is improved.

The invention relates to a soft switching AC-DC Vienna converter topological structure and a control method, and the structure comprises a first rectifier diode D1, a second rectifier diode D2, a first main switch S1, a second main switch S2, a first output DC link capacitor C01, and a second output DC link capacitor C01, and also comprises an active buffer circuit. The active snubber circuit comprises a snubber inductor LS, a first auxiliary active switch SS1, a first snubber capacitor CS1, a second auxiliary active switch SS2 and a second snubber capacitor CS2, and the snubber inductor LS isconnected with the negative electrode of a first rectifier diode D1 through the first auxiliary active switch SS1 and the first snubber capacitor CS1 in sequence, and is connected with the negative electrode of the second rectifier diode D2 through the second auxiliary active switch SS2 and the second buffer capacitor CS2 in sequence, and is grounded through a first main switch S1 and a second main switch S2 in sequence. Compared with the prior art, the invention has the advantages of reducing the reverse recovery loss of the rectifier diode, avoiding the ringing problem and the like.

The invention provides a single-phase power input circuit based on a three-phase Vienna PFC topology and a control method. Through the adjustment of the duty ratio of a corresponding switching tube suspended in the three-phase Vienna PFC topology, the reverse recovery problem of a low-frequency device in the bidirectional switch is suppressed, the reverse recovery loss of the low-frequency devicein a bidirectional switch of the three-phase Vienna PFC topology is reduced, the heating of the three-phase Vienna PFC topology is reduced, and a solution is provided for the reliable operation of thethree-phase Vienna PFC topology during single-phase power or direct-current input.

Provided is a double-boost-structure soft switching rectification charging multiplex circuit, which comprises a transistor Q1, a transistor Q2, a transistor Q5, a diode D1, a diode D2, a diode D5, a diode D7, a diode D8, a capacitor C1, a capacitor C3 and an inductor L3. A branch formed by connecting the inductor L3 and the transistor Q5 in series in the same direction is connected in parallel in the same direction to a branch formed by connecting the transistor Q1, the transistor Q2 and the capacitor C1 in series in the same direction; a branch formed by connecting the diode D7 and the diode D8 in the same direction is connected in parallel between the inductor L3 and the transistor Q5; the diode D1 is connected in parallel between the two ends of the transistor Q1; the diode D2 is connected in parallel between the two ends of the transistor Q2; the diode D5 is connected in parallel between the two ends of the transistor Q5; and the capacitor C3 is connected in parallel between the two ends of a branch formed by the inductor L3 and the diode D7. The double-boost-structure soft switching rectification charging multiplex circuit realizes commercial power boost and battery boost as well as battery charging, thereby greatly reducing hardware complexity of the whole machine, improving reliability and reducing cost.

The invention discloses a multi-stage groove Schottky diode and a manufacturing method thereof, and the Schottky diode comprises an epitaxial wafer which comprises a semiconductor substrate and an epitaxial layer located on the surface of the semiconductor substrate; the deep groove is formed in one side, away from the semiconductor substrate, of the epitaxial layer and comprises a plurality of sub-grooves which are sequentially arranged in the first direction; the first direction is the direction in which the opening of the deep groove points to the bottom; in two adjacent sub-grooves, the width of the sub-groove close to the bottom of the deep groove is smaller than that of the sub-groove far away from the bottom of the deep groove; doped layers are arranged on the side walls and the bottoms of the deep trenches; an electric field buffer region surrounding the deep trench opening is arranged in the surface of one side, deviating from the semiconductor substrate, of the epitaxial layer and is in contact with the doping layer; the cathode is positioned on one side, away from the epitaxial layer, of the semiconductor substrate; the filling structure and the anode are located in the deep trench, and the filling structure is located between the anode and the bottom of the deep trench; and the doping layer and the electric field buffer region are both inversely doped with the epitaxial layer.

The invention provides a SiC/GaN MOSFET drive circuit and an integrated circuit. The SiC/GaN MOSFET drive circuit comprises an isolation transformer, a first leading edge pulse turn-on circuit, a second leading edge pulse turn-on circuit, a first trailing edge pulse turn-off circuit, a second trailing edge pulse turn-off circuit, a clamping buffer circuit, a pulse leading and trailing edge generation circuit and a SiC/GaN MOSFET. The input end of the first leading edge pulse turn-on circuit and the input end of the first trailing edge pulse turn-off circuit are connected with one end of the secondary side of the isolation transformer. The input ends of the second leading edge pulse turn-on circuit and the second trailing edge pulse turn-off circuit are respectively connected with the other end of the secondary side of the isolation transformer; one end of the clamping buffer circuit is connected with the output end of the first leading edge pulse turn-on circuit and the output end of the first trailing edge pulse turn-off circuit. According to the invention, the effect of keeping the stable voltage when the secondary SiC/GaN MOSFET of the isolation transformer is switched on is realized, and the stable clamping turn-off negative voltage can be kept.

The invention discloses a composite three-level double-buck inverter, and a control method and system thereof. The inverter comprises a DC voltage source Vcc, a support capacitor C1, a support capacitor C2, a power switch tube S1, a power switch tube S2, a power switch tube S3, a power switch tube S4, a power switch tube S5, a power switch tube S6, a power diode D1, a power diode D2, a power diode D3, a power diode D4, a power diode D5, a power diode D6, a filter inductor La1, a filter inductor La2, a filter inductor L, a filter capacitor Cf and a load resistor R. The invention aims to provide a composite three-level double-buck inverter, and a control method and system thereof, and solves problems that in the prior art, dead time needs to be set for a same-bridge-arm switching tube of a composite three-level bridge inverter, the harmonic content of a load current is increased, the electric energy quality of the inverter is reduced, a reverse recovery loss is high, and reliability is low.