148results about How to "Short reverse recovery time" patented technology

The invention discloses a method for manufacturing a planar high-voltage ultrafast soft recovery diode. The method comprises the following steps of: oxidizing, and photoetching to form an active region and a field limiting ring; doping and pushing; manufacturing a polycrystalline silicon field plate; performing platinum diffusion; thinning; forming an N-type buffer layer; performing contact doping and annealing; and metalizing. The method can be used for manufacturing an ultrafast soft recovery diode chip which is low in cost and short in recovery time and has high-voltage resistance, low leakage current, low forward voltage drop and soft recovery characteristics.

The invention discloses a totem-pole bridgeless power factor correction circuit which comprises a switching tube series branch and a rectifier diode series branch, and also comprises two series diodes and two parallel diodes, wherein the switching tube series branch is provided with a first switching tube and a second switching tube, the rectifier diode series branch is provided with a first rectifier diode and a second rectifier diode, the two series diodes are respectively serially connected between the first switching tube and a negative busbar and between the second switching tube and a positive busbar, the two parallel diodes are respectively connected in parallel between a common terminal of the first switching tube and the positive busbar and between the common terminal of the second switching tube and the negative busbar, wherein reverse recovery time of the parallel diodes corresponding to the first switching tube is less than that of the first switching tube, and reverse recovery time of the parallel diodes corresponding to the second switching tube is less than that of the second switching tube. Because reverse recovery characteristics of the parallel diodes are better, a reverse recovery current is smaller without damaging the totem-pole bridgeless power factor correction (PFC) circuit working in a CCM (Coincident-Current Memory) mode.

The invention discloses a groove gate VDMOS device integrated with a Schottky diode and belongs to the technical field of semiconductor devices. According to the groove gate VDMOS device integrated with the Schottky diode, an additional structure composed of a piece of Schottky junction metal and a body electrode conductive material is additionally arranged on each of drift regions on the two sides of a groove gate structure of a conventional groove gate VDMOS device, the upper portion of each piece of Schottky junction metal is in contact with source electrode metal, the lower portion of each piece of Schottky junction metal is in contact with a corresponding body electrode conductive material, and the lower surface and the lateral sides of the each piece Schottky junction metal are in contact with a corresponding drift region to form a Schottky junction; dielectric layers are arranged between the lateral sides of each body electrode conductive material and a corresponding drift region and between the bottom surface of each body electrode conductive material and the corresponding drift region. Compared with a traditional groove gate VDMOS device with the same size, the groove gate VDMOS device integrated with the Schottky diode has the advantages that due to the fact that higher drift region dosage concentration is adopted under the condition of same puncture voltage, turn-on resistance is reduced obviously, and the reverse recovery property of the diode is improved obviously.

The invention discloses a silicon carbide VDMOS device and manufacturing method thereof, and belongs to the technical field of power semiconductors. A trench is etched on a JFET region surface of a traditional silicon carbide VDMOS device, P type doping is introduced into the bottom of the trench, and at the same time, a polycrystalline silicon layer is formed in the trench, so that the polycrystalline silicon layer and a side wall of the trench are in contact to form a Si/SiC heterojunction. A diode is integrated in the device, and the device has the advantages of low conduction voltage drop, fast switching speed and good reverse recovery characteristic in a diode working mode, and has the advantages of high breakdown voltage, small grid capacitance and fast switching speed in an MOS working mode. The proposed device structure optimizes application of the device in the field of inverter circuits, chopper circuits and the like, and has the advantage that the process is simple, and is compatible with a traditional silicon carbide VDMOS device process.

The invention belongs to the technical field of power semiconductor devices, and particularly relates to a reverse conducting IGBT device. Compared with a conventional reverse conducting IGBT structure, emission electrode schottky metal is additionally arranged in source electrode metal, and an N-region is arranged below an N-type electric field stop layer so that a reverse recovery characteristic working under a freewheel diode mode is respectively improved and generation of the snapback phenomenon is suppressed. The beneficial effects of the reverse conducting IGBT device are that the reverse conducting IGBT device has short reverse recovery time, the snapback phenomenon can be eliminated at a shorter back P+ collector region, and the preparation technology of the reverse conducting IGBT device is compatible with the technology of the conventional IGBT device. The invention is especially suitable for the reverse conducting IGBT device.

The invention provides a silicon carbide MOSFET device and a manufacturing method thereof. Silicon carbide deep P injection is performed in a specified region, groove etching and deposition of metal or polysilicon are performed above a silicon carbide deep P doped region, and the deposited metal or polysilicon is in direct contact with the silicon carbide N-epitaxy to form a Schottky contact or aSi/SiC heterojunction contact having rectifying characteristics. Therefore, the integration of multiple sub-rectifiers is achieve while optimizing the basic performance of the conventional silicon carbide UMOSFET, the working performance of the third quadrant of the device is greatly optimized, the gate-drain capacitance of the device is reduced and the switching speed of the device is improved.

The invention discloses a silicon carbide TrenchMOS device and manufacturing method thereof, belonging to the technical field of power semiconductors. Considering the defects of an external anti-parallel fast recovery diode (FRD) and a parasitic diode directly using a silicon carbide TrenchMOS device, a polysilicon area is additionally arranged in the p+ contact area of a conventional device, so that a Si/SiC heterojunction is formed by the polysilicon and silicon carbide epitaxial layer material, and furthermore, a diode is integrated in the device. The junction voltage drop is significantly reduced when a device diode is applied, and the conductive mode during the diode application is converted from bipolar conduction into single polar conduction, so that the silicon carbide TrenchMOS device has the advantages of short reverse recovery time and less reverse recovery charge. The device structure also has the advantages of low parasitic silicon carbide diode reverse leakage, high breakdown voltage and good device temperature stability. Therefore, the silicon carbide TrenchMOS device has wide prospects in circuits such as an inversion circuit and a chopper circuit.

The invention provides a silicon carbide MOSFET device and a manufacturing method thereof. The invention improves device structure design and finally integrates Schottky contact or heterojunction contact with rectifying characteristics on the basis of traditional silicon carbide UMOSFET structure. At that same time of optimize the basic characteristics of the traditional silicon carbide UMOSFET structure, the improvement realize the integration of multi-sub rectifier devices, greatly optimizes the work performance of the third quadrant of the device, and in addition, the invention also optimizes the dynamic performance of the device, and has shorter switching time; In addition, the invention also has the characteristics of simple process and easy realization.

There are provided: sets of pairs of main circuit switching elements (4u), (4x) that supply power to a load, connected in series with a DC power source; free-wheel diodes (5u), (5x) connected in anti-parallel with these main circuit switching elements; and a reverse voltage application circuit (8) that applies reverse voltage smaller than the DC voltage source to the free-wheel diodes when these free-wheel diodes cut off. The reverse voltage application circuit includes a current suppression circuit (10) that suppresses the main circuit current flowing in the low-voltage DC voltage power source on reverse recovery of the free-wheel diodes.

The invention discloses a base region gradient P<+>-N-N<+> type SiC ultrafast recovery diode manufactured on a 4H type single crystal silicon carbide epitaxial layer and a process. An anode/(P<+>)4H-nc-SiC/(N) slowly changes into a 6H-nc-SiC/(N)4H-c-SiC/(N<+>)4H-c-SiC/cathode. The base region gradient P<+>-N-N<+> type SiC ultrafast recovery diode comprises an N<+> type 4H-c-SiC substrate, an N type 4H-c-SiC epitaxial layer, an N type 6H-nc-SiC gradually-doped and grain-gradient multilayer film and a P<+> type 4H-c-SiC single layer film, wherein the outer sides of the N<+> type 4H-c-SiC substrate and the P<+> type 4H-c-SiC single layer film are in ohm connection with an anode NiAu and an anode TiAu respectively. The device structure is made by using a PECVD (Plasma Enhanced Chemical Vapor Deposition) technology. The process has the advantages of shortening the reverse recovery time, inhibiting surge current and lowering the process temperature.

The invention belongs to the technical field of power semiconductor devices, and relates to a diode with a floating island structure. The diode comprises an N-type semiconductor substrate, a cathode arranged at the bottom of the N-type semiconductor substrate, an N-type semiconductor drift region arranged on the upper layer of the N-type semiconductor substrate, a gate oxide layer arranged on the upper layer of the N-type semiconductor drift region, and an anode arranged on the upper layer of the gate oxide layer, wherein the gate oxide layer is of a trench gate structure, and an N-type semiconductor region is arranged between the portions, on the two sides of a trench, of the gate oxide layer. The diode is characterized in that a plurality of doping regions including P-type semiconductor doping regions are arranged in the N-type semiconductor drift region, and therefore the floating island structure is formed. The diode has the advantages that conductive voltage is reduced, the reverse recovery time is short, and the temperature characteristic is good. The diode is particularly suitable for trench type diodes.

The invention discloses a system for preventing reverse recovered charges in a DUT. The system is a current injection circuit connected to the two ends of the DUT in a forward bias mode. The injected current circuit comprises a pulse nS-level pulse signal generator formed by an SRD and a pulse edge acceleration circuit formed by a BG2 and a BG1, wherein the pulse edge acceleration circuit is tightly connected with the back of the pulse nS-level pulse signal generator and used for shortening the rising edge time and the falling edge time of pulses. The system has the advantages that the reverse recovered features of the DUT can be improved, the reverse recovered charges can be reduced, and the reverse recovered time can be shortened; meanwhile, switching losses and conduction losses of the DUT can be reduced, electromagnetic interference and surges can be restrained, and efficiency is improved.

The invention belongs to the technical field of a power semiconductor device, in particular relates to a reverse-conducting trench gate charge storage insulated-gate bipolar transistor (IGBT). By introducing a side-surfaces split electrode connected with an emitter into a trench on the condition of a certain device trench depth and a certain trench metal oxide semiconductor (MOS) structure density, the gate capacitance of the device is reduced, the switching speed of the device is increased, the switching loss is reduced, and the positive conduction voltage drop and the average switching loss are improved; meanwhile, the density of an MOS channel is reduced, the short-circuit safety working region of the IGBT is improved, and the performance and the reliability of the device are improved; and a reverse freewheeling diode works in multiple submodes in a working mode of the reverse freewheeling diode, the IGBG has low diode conduction voltage drop, and the reverse recovery characteristic of the freewheeling diode is improved.

The invention discloses a method for integrating a Schottky diode in a super-junction MOSFET (metal-oxide-semiconductor field effect transistor). In order to connect and combine the Schottky diode consisting of a Schottky contact and a substrate in the super-junction MOSFET in parallel, the anode of the Schottky diode is positioned on a drift area between two body areas at a source end of the super-junction MOSFET element cell area, and is connected with the source end of the super-junction MOSFET; a plurality of doping areas are arranged on the drift area of the anode, the electric conduction types of the doping areas are opposite to the electric conduction type of the drift area, the concentration of impurity is larger than that of impurity in the drift area, and the doping areas are connected with the source end of the super-junction MOSFET; and the cathodes of the Schottky diode share the drain electrode of the super-junction MOSFET. According to the method, the reverse electric leakage amount of the Schottky diode can be reduced.

The invention discloses a channel MOS P-N junction Schottky diode structure and a manufacturing method thereof. The structure mainly comprises a substrate, a channel structure, a polysilicon layer, an oxide layer, a metal layer and an ion implantation area; and the manufacturing method comprises the following steps: providing the substrate; forming a first mask layer on the substrate; performing a first photoetching process to form the channel structure; growing a gate oxide layer in the channel structure; performing an ion implantation process to form the ion implantation area; forming the polysilicon layer in the channel structure; forming a second mask layer on partial polysilicon layer and the first mask layer; performing a second photoetching process to form a side wall structure and expose the partial polysilicon layer and the substrate; and forming the metal layer on a generating structure. The channel MOS P-N junction Schottky diode structure has the characteristics of low reverse voltage leakage current, low forward voltage drop value, high reverse withstanding voltage value and low reverse recovery time.

The invention discloses a silicon carbide Trench MOS device and a manufacturing method thereof, and belongs to the technical field of power semiconductors. The method includes: a layer of a polysilicon region distributed in a pi shape is additionally arranged under a trench gate structure of a conventional device, the polysilicon region and an epitaxial layer form a Si/SiC heterojunction, and a diode is integrated in the device. Compared with a parasitic silicon carbide diode which directly employs a silicon carbide Trench MOS, according to the silicon carbide Trench MOS device and the manufacturing method thereof, the junction voltage drop of the device diode during application is substantially reduced, and the switch-on characteristic of the device is improved through large junction area of the heterojunction; moreover, the gate-drain capacitance and the ratio of the gate-drain capacitance to the gate-source capacitance of the device are reduced, and the performance and the reliability of the device MOS during application are enhanced; besides, the silicon carbide Trench MOS device and the manufacturing method thereof are also advantageous in that the reverse recovery time is short, the reverse recovery charges are less, and advantages including low reverse leakage, high breakdown voltage, and good temperature stabilization performance of the conventional silicon carbide Trench MOS device are maintained. In conclusion, according to the silicon carbide Trench MOS device and the manufacturing method thereof, the prospect is wide in circuits such as inversion circuits and chopper circuits etc.