110results about How to "Reduce reverse leakage" patented technology

A trench Schottky barrier rectifier includes an cathode electrode at a face of a semiconductor substrate and an multiple epitaxial structure in drift region which in combination provide high blocking voltage capability with low reverse-biased leakage current and low forward voltage. The multiple structure of the drift region contains a concentration of first conductivity dopants therein which comprises two or three different uniform value from a Schottky rectifying junction formed between the anode electrode and the drift region. The thickness of the insulating region (e.g., SiO2) in the MOS-filled trenches is greater than 1000 Å to simultaneously inhibit field crowing and increase the breakdown voltage of the device. The multiple epi structure is preferably formed by epitaxial growth from the cathode region and doped in-situ.

The invention discloses a silicon carbide VDMOS device and manufacturing method thereof, and belongs to the technical field of power semiconductors. A trench is etched on a JFET region surface of a traditional silicon carbide VDMOS device, P type doping is introduced into the bottom of the trench, and at the same time, a polycrystalline silicon layer is formed in the trench, so that the polycrystalline silicon layer and a side wall of the trench are in contact to form a Si/SiC heterojunction. A diode is integrated in the device, and the device has the advantages of low conduction voltage drop, fast switching speed and good reverse recovery characteristic in a diode working mode, and has the advantages of high breakdown voltage, small grid capacitance and fast switching speed in an MOS working mode. The proposed device structure optimizes application of the device in the field of inverter circuits, chopper circuits and the like, and has the advantage that the process is simple, and is compatible with a traditional silicon carbide VDMOS device process.

The invention discloses a method for integrating a Schottky diode in a super-junction MOSFET (metal-oxide-semiconductor field effect transistor). In order to connect and combine the Schottky diode consisting of a Schottky contact and a substrate in the super-junction MOSFET in parallel, the anode of the Schottky diode is positioned on a drift area between two body areas at a source end of the super-junction MOSFET element cell area, and is connected with the source end of the super-junction MOSFET; a plurality of doping areas are arranged on the drift area of the anode, the electric conduction types of the doping areas are opposite to the electric conduction type of the drift area, the concentration of impurity is larger than that of impurity in the drift area, and the doping areas are connected with the source end of the super-junction MOSFET; and the cathodes of the Schottky diode share the drain electrode of the super-junction MOSFET. According to the method, the reverse electric leakage amount of the Schottky diode can be reduced.

The invention provides a Schottky diode structure. An exemplary embodiment of a Schottky diode structure includes a semiconductor substrate having an active region. A first well region having a first conductive type is formed in the active region. A first doped region having the first conductive type is formed on the first well region. A first electrode is disposed on the active region, covering the first doped region. A second electrode is disposed on the active region, contacting to the first well region. A gate structure is disposed on the first well region. A second doped region, having a second conductive type opposite to the first conductive type, and is formed on the first well region. The gate structure and the second doped region are disposed between the first and second electrodes.

The invention discloses a trenched Schottky-barrier diode, and solves the problems that a conventional trenched Schottky-barrier diode is lower in performance and reliability, high in reverse current leakage and poor in reverse blocking capability. The doping density of an epilayer gradually increases from the top to bottom, a second conduction type non-uniformly doped conductive polycrystalline silicon of which the doping density gradually decreases from the top to bottom is filled in trenches, second conduction type heavily doped lug boss apex angle protection areas are formed at the apex angles on two sides of lug bosses, and a Schottky-barrier metal layer in ohmic contact with the top surfaces of both the conductive polycrystalline silicon and the lug boss apex angle protection areas is added to the bottom surface of an anodal metal layer. The trenched Schottky-barrier diode provided by the invention has the advantages of low reverse current leakage, good voltage reverse blocking capability and excellent reliability. The invention also provides a manufacturing method of the trenched Schottky-barrier diode, which has the advantages of less steps and low manufacturing cost and can effectively isolate areas from damage by the technological process and contamination of impurities due to local impairment of isolating layers.

The invention discloses a method for fast preparing a sapphire pattern substrate through the nanoimprint technology. The method comprises the following steps: a nanoimprint template is prepared through two methods including the hard template method and the soft template method, an epitaxial layer is grown on a clean sapphire substrate, SiO2 or Cr is evaporated and plated to obtain a target substrate, and then the surface of the target substrate is coated with moderate hot-pressing adhesive, imprinting is performed on the target substrate coated with uniform adhesive and the nanoimprint template, a photoresist surface pattern is transferred to the surface of the target substrate, and after a series of post processes, the required sapphire pattern substrate is obtained. The method of the invention has the following main advantages that the problem of the traditional lithography in the feature size reduction process can be solved, the pattern substrate having the nanometer feature size is prepared, and the size of the pattern substrate is less than 500nm. The method of the invention has the following advantages that the bran-new NPSS substrate industrialization technology can be realized, and at the same time, the substrate machining cost and epitaxy production cost can be reduced, and the LED lighting chip production cost is reduced by 15%.

The invention discloses a technological method for manufacturing groove type Schottky diodes. Contact holes are particularly formed by means of etching by the aid of two-step dry processes. The technological method includes etching silicon surfaces at first when the contact holes are about to be formed; then etching silicon and silicon oxide in grooves together. Selection ratios of the silicon to the silicon oxide in last-step contact hole etching menus are 1:1, the silicon surfaces are etched by depths higher than 1000 angstroms approximately, the silicon oxide in the side walls of the grooves is protruded out of the silicon surfaces, and Schottky contact effects are ultimately realized by the aid of metal. The technological method has the advantages that the technological method aims to solve the problem of high electric leakage of existing groove Schottky diode products, the internal uniformity of the surfaces of products can be improved, the production cost can be reduced, the yield of the products can be increased, and the technological method is suitable for mass production on a large scale.

The embodiment of the invention discloses a diode anode structure, a vertical diode and a transverse diode, and relates to the technical field of semiconductors. The diode anode structure comprises a semiconductor layer, at least two first Schottky metal layers, and at least one second Schottky metal layer, the two first Schottky metal layers are located on the semiconductor layer and forms Schottky contact with the semiconductor layer to obtain a first Schottky barrier height, and the at least one second Schottky metal layer is located on the semiconductor layer and between the first Schottky metal layers, and forms Schottky contact with the semiconductor layer to obtain a second Schottky barrier height. By employing the above technical scheme, two barrier heights are formed at an anode area with a semiconductor, when the diode is turned off in a reverse manner, the first Schottky barrier height can reduce reverse leakage, when the diode is turned on in a forward manner, the second Schottky barrier height can reduce forward turn-on voltage, and the usage efficiency of the diode can be improved by employing the above diode anode structure.

The invention relates to a mesa etching process of high voltage diode silicon blocks. The mesa etching process sequentially comprises performing mixed acid preparation; placing the silicon blocks to be treated into a BE plastic film and arranging the BE film with the silicon blocks on a plastic supporting frame; performing mixed acid treatment; performing etching quantity measurement; performing first time washing; performing nitric acid etching cleaning; performing second time washing; performing third time washing; performing dewatering and drying; drying the dry air; performing assembly sintering on the silicon blocks and electrode leads. According to the mesa etching process of the high voltage diode silicon blocks, a novel mixed acid is developed and accordingly the etching speed of cutting surfaces of the silicon blocks is consistent, the difference of the etching quantity is small, and damage layers caused by cut-off are completely removed; hydrofluoric acid cleaning treatment is performed after the mixed acid treatment is performed and accordingly a few oxidation layers on the surface of chip solder are removed and the good sintering soldering of the electrode leads can be convenient; the etching treatment rate is uniform and accordingly the good mesa shapes of the silicon blocks are formed and the difference of the etching quantity is small; the reverse electric leakage of a device is small, the breakdown characteristic is hard, the surge tolerance is large, and the rate of finished products is significantly improved.

The invention provides a trench-type Schottky-barrier diode rectifier and a preparation method. By using the two shoulders of a conducting poly-silicon T-shaped head in the trench and the silica layers on the extended sections to cover the vertex angles of boss structures on two sides of the trench, the invention, based on the existing trench-type Schottky diode rectifiers, overcomes the problems of increase in inverse current leakage and reduction in inverse blocking capacity caused by the tip discharge effect produced by contact of the vertex angles of the boss and an upper metal layer; moreover, by filling the trench with the conducting poly-silicon instead of aluminum, titanium and other conventional materials of the upper metal layer, on one hand, the invention solves the problem that the reliability of the rectifier is influenced by hollow cavities left during trench filling, and on the other hand, the invention provides more flexible design space for the ratio of the opening width to depth of the trench of the diode rectifier.

The invention relates to the field of semiconductors, and particularly relates to a Schottky diode and a preparation method thereof. The method comprises the steps of extending an n-type gallium oxidelayer on a substrate; preparing a first mask layer on the n-type gallium oxide layer, wherein a window of the first mask layer is an area corresponding to a thermal oxidation treatment area to be prepared, and the thermal oxidation treatment area comprises at least one first thermal oxidation area and two second thermal oxidation areas; performing first high-temperature annealing treatment on thefront surface of the device to form a thermal oxidation treatment region; removing the first mask layer; preparing an anode metal layer on the front surface and a cathode metal layer on the back surface, the first thermal oxidation region is located below the anode metal, and each second thermal oxidation region is partially located below the anode metal. According to the method, the terminal structure can be formed through thermal oxidation, and the electric fields below the anode metal and in the edge region are reduced, so that anode reverse electric leakage is reduced, and breakdown and conduction characteristics are improved.

The invention discloses a silicon carbide power diode device and a manufacturing method thereof, belonging to the technical field of power semiconductors. A trench structure is formed in the surface drift region of a conventional silicon carbide device, a high concentration doped region opposite to the drift region in the doping type is formed at the bottom of the trench, and a polysilicon layer opposite to the drift region in the doping type is arranged in the trench, so that the polysilicon layer and the trench side wall form an Si/SiC heterojunction, and furthermore, a diode is integrated inside the device. According to the invention, the forward voltage drop of the device is reduced, meanwhile, as the conduction mode of the device is converted from the silicon carbide PIN diode bipolar conduction into majority carrier conduction, thereby improving the reverse recovery characteristic of the device and improving the device switching speed; and the device further has the advantages of low PIN diode reverse leakage, high breakdown voltage and good device temperature stability. In addition, the device manufacturing method has the advantages of simple process, fewer process step, and low cost.

The invention discloses a clamp diode comprising an N type well region on a P type substrate, P type high resistance regions at the upper part of the N type well region, a P type low resistance region between the P type high resistance regions, insulated regions at the outer sides of the P type high resistance regions, N+ deposed regions between the two insulated regions at the same side of P type high resistance regions, polysilicon layers on the insulated regions adjacent to the P type high resistance regions, and metal silicide on the P type low resistance region and the N+ deposed regions. The P type high resistance regions and the P type low resistance region are led out through the metal silicide to form the anode of the clamp diode, the N+ deposed regions are led out through the metal silicide to form the cathode of the clamp diode, and the polysilicon layers and an anode lead-out end are in short circuit connection. The invention also provides the layout structure of the clamp diode and a manufacturing method of the clamp diode. The function of a BGR circuit in a high precision voltage requirement application can be replaced by the clamp diode, the manufacturing cost of a circuit can be reduced at the same time, the integrated chip area is reduced, and the miniaturization of an integrated circuit is facilitated.

The invention discloses a structure of a trench-type MOS rectifying element structure. The structure includes: a planar MOS rectifying structure is formed on platforms of an active zone and adjacent edges of the platforms are provided with active-zone trenches which are formed in an n- epitaxial layer of a heavily doped n+ semiconductor substrate. In the active-zone trenches, trench gate oxide layers are formed at the bottom parts and side walls of the trenches and p-type doped polycrystalline silicon layers are formed on the trench gate oxide layers. A top-part metal layer is formed on the active zone and connected with a grid electrode and a source electrode of the planar MOS structure and the polycrystalline silicon layers of the active-zone trenches. The invention also discloses a manufacturing method of the trench-type MOS rectifying element structure. The trench-type MOS rectifying element structure and the manufacturing method thereof use the trench-type structure so that the forward bias voltage VF is lower and reverse electricity leakage is smaller.

The invention discloses a vertical high-voltage MOSFET device and a manufacturing method thereof, and mainly solves the problems that a vertical MOSFET device in the prior art is low in breakdown voltage and is large in leakage current. The device comprises a drain electrode, a substrate and epitaxial layers from bottom to top, wherein shallow grooves with the depth being less than 300 nm is formed in the surface of the upper epitaxial layer. A source electrode is arranged in the shallow grooves, and deep grooves which are greater than 500 nm in depth and penetrate through the two epitaxial layers to the surface of the substrate are formed between the shallow grooves in the surface of the upper epitaxial layer; insulated gate media and gate electrodes are arranged in the deep grooves, andthe substrate is made of n-type Ga2O3 materials, wherein the number of the epitaxial layers is two, and the materials are sequentially p-type GaN with the hole concentration of 1,017-1018cm<-3> and n-type Ga2O3 with the electron concentration of 1,018-1019cm<-3> from bottom to top in sequence. The device improves the breakdown voltage, reduces the reverse leakage and static power consumption, reduces the manufacturing cost and difficulty, and can be used for power devices and high-voltage switching devices.

The invention discloses a threshold compensation rectifying circuit. The threshold compensation rectifying circuit includes N grades of complementary MOS rectifying units, a complementary MOS output rectifying unit, a load capacitor, and a load resistor, wherein each grade of complementary MOS rectifying unit is provided with a first input end, a second input end and an output end; the first input end of the current grade of complementary MOS rectifying unit is connected with the output end of the former-grade of complementary MOS rectifying unit; the second input end of the current grade of complementary MOS rectifying unit is connected with a first input signal or a second input signal; the output end of the current grade of complementary MOS rectifying unit is connected with the first input end of the next-grade of complementary MOS rectifying unit; the first input end of the first-grade of complementary MOS rectifying unit is connected with the ground; the output end of the last-grade of complementary MOS rectifying unit is connected with the input end of the complementary MOS output rectifying unit; the complementary MOS output rectifying unit is provided with an input end and an output end, and the output end is connected with an output signal; one end of the load capacitor is connected with the output signal, and the other end of the load capacitor is connected with the ground; and one end of the load resistor is connected with the output signal, and the other end of the load resistor is connected with the ground.

The invention discloses a high-barrier SiC JBS device and a preparation method thereof. The device comprises a first electrode layer, a SiC substrate, an N-SiC epitaxial layer, a second electrode layer, a dielectric layer and a PI layer which are arranged from top to bottom. According to the SiC device, a JBS structure and a surface low-concentration structure are formed on the epitaxial layer, sothat the barrier height of the device is increased, and meanwhile, the electric leakage characteristic of the device is reduced.

The invention relates to the field of semiconductors, in particular to a Schottky diode and a preparation method thereof. The Schottky diode comprises: a substrate; an n-type gallium oxide layer formed on the substrate, wherein the n-type gallium oxide layer comprises at least one first thermal oxidation region and two second thermal oxidation regions; an anode metal layer which is formed on the n-type gallium oxide layer; the first thermal oxidation region located below the anode metal layer, wherein the second thermal oxidation regions are partially located below the anode metal layer; a cathode metal layer which is formed on the back surface of the substrate, wherein at least one first thermal oxidation region is provided with a groove structure. Compared with an existing Schottky diode, the Schottky diode has the advantages that the electric field at the anode junction is better, and the high-voltage resistance characteristic and the conduction characteristic are better.