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16 results about "Surface trap" patented technology

Method for packaging perovskite quantum dots by photon sintering

The invention relates to a method for packaging perovskite quantum dots by photon sintering. The preparation method comprises the following steps: firstly, preparing turbid liquid of mesoporous silica nanoparticles; coating the surface of a substrate with the obtained turbid liquid, and drying to form a layer of uniform mesoporous silica nanoparticle array on the surface of the substrate; immersing the obtained substrate into a perovskite precursor solution, and carrying out ultrasonic treatment and crystallization to obtain a quantum dot crystallized substrate; and carrying out photon sintering packaging to obtain the perovskite quantum dots. According to the invention, mesoporous silica nanoparticles are used as a packaging material, a porous structure is used for confinement growth, quantum dots are uniformly dispersed in a submicron scale, accurate size control is realized, and quantum dot agglomeration is avoided. A photon sintering process is used, and packaging of quantum dots is realized through rapid energy transfer. According to the process, sintering can be completed at the millisecond level, surface traps and oxidation reactions possibly introduced in the traditional thermal annealing process are reduced, and the optical performance and stability of the quantum dots are further improved.
Owner:SUZHOU UNIV

A method for preparing a metal oxide passivation film on a gallium nitride surface

The application discloses a preparation method of a metal oxide passivation film on a gallium nitride surface; the method comprises the following steps: mixing a metal nitrate precursor solution and a hole sacrificial agent to obtain a mixed solution; placing a substrate containing a GaN layer into the mixed solution and performing photochemical deposition under ultraviolet light to obtain a metal oxide passivation film formed on the surface of the GaN layer. The preparation method uses a metal nitrate as a precursor, and under ultraviolet light, photo-generated electrons and holes of the GaN are used to initiate a redox reaction at a solid / liquid interface to form a uniform and dense metal oxide passivation film. The method is simple in process, is performed at room temperature, does not need vacuum, has small interface damage, can be used to reduce the trap state density of the GaN surface, improve the interface stability and reliability of a device, and is suitable for surface / interface passivation treatment of power electronic and ultraviolet photoelectric devices.
Owner:WUYI UNIV

Perovskite quantum dot elastomer, preparation method thereof and display device containing perovskite quantum dot elastomer

The invention discloses a perovskite quantum dot elastomer, a preparation method thereof and a display device. The elastomer comprises perovskite quantum dots and an allyl ester polymer protective layer matrix, the perovskite quantum dots are dispersed in the matrix, and the allyl acrylate polymer matrix coats the peripheries of the perovskite quantum dots to protect the perovskite quantum dots; the component of the perovskite quantum dot is CsPbX3, X is Cl or Br, the matrix of the allyl ester polymer protective layer is a butyl rubber-OOCCnH2n + 1 polymer, and the perovskite quantum dot is prepared through an in-situ chemical reaction. The allyl ester polymer chain forms a passivation layer on a perovskite quantum dot interface, surface traps are inhibited, and entry of H2O / O2 is prevented. The perovskite quantum dot elastomer has the advantages of good film-forming property, high fluorescence quantum efficiency, good stability, long fluorescence lifetime and adjustable light-emitting wavelength, and can be applied to the fields of backlight display and the like.
Owner:FUDAN UNIV YIWU RES INST

Ion surface trap, and method for operating an ion surface trap

The invention relates to an ion surface trap (10) with (a) an electrode pair (12) that comprises a first trap electrode (14.1) and a second trap electrode (14.2) and is configured to form a trap volume for at least one ion (22) when an electrical AC voltage is applied, (b) at least two AC voltage electrodes (16) arranged to close the trap volume and / or generate an electrical field, by means of which an ion position of an ion (22) trapped in the ion surface trap can be modified relative to the ion surface trap (10), and (c) a sensor for detecting photons (20) emitted by at least one ion (22), wherein (d) the sensor is an energy-sensitive measuring superconductor sensor (18) that has a superconductor layer / separating layer / superconductor layer structure and (e) at least the first superconductor layer (24, 28) forms the first trap electrode (14).
Owner:BUNDESREPUBLIK DEUT VERTRETEN DURCH DAS BUNDESMINIST FUR WIRTSCHAFT & ENERGIE DIESES VERTRETEN DURCH DEN PRASIDENTEN DER PHYSIKALISCH TECHNN BUNDESANSTALT

Low surface trap state GaN HEMT device based on pseudo-single crystal passivation and preparation method thereof

The invention discloses a low surface trap state GaN HEMT (High Electron Mobility Transistor) device based on quasi-single crystal passivation and a preparation method thereof. The preparation method comprises the following steps: sequentially forming a nucleating layer, a buffer layer, a channel layer and a barrier layer on a substrate layer; a pseudo-single crystal passivation layer is formed in the gap region, and the pseudo-single crystal passivation layer is in direct contact with the upper interface of the barrier layer; the gap region includes a region between the source region and the gate region, and includes a region between the drain region and the gate region. According to the method provided by the invention, the first passivation layer is deposited on the barrier layer, and the first passivation layer is rapidly annealed to realize quasi-single crystallization, so that the interface state between the passivation layer and the barrier layer is improved, and the reliability of the device is improved.
Owner:XIDIAN UNIV +1

Insulating material surface charge and surface trap integrated in-situ measurement device

The invention relates to the field of insulating materials, in particular to an insulating material surface charge and surface trap integrated in-situ measurement device which comprises a measurement cavity and a data acquisition system. The measuring cavity comprises a cavity shell, and an electrode, a three-axis screw rod sliding table group, a surface charge measuring unit and a surface trap testing unit which are positioned in the cavity shell; the data acquisition system comprises a static capacitance probe, an electrometer, an oscilloscope and a computer, and the measuring cavity is connected with the data acquisition system through the static capacitance probe; through the integrated design of integrating surface charge measurement and surface trap test in one device, continuous measurement of the same sample can be realized, damage caused by frequent movement of the sample is avoided, distributed measurement of surface charge space-time distribution, surface potential attenuation characteristics and surface trap distribution characteristics of an insulating material can be realized, and the measurement accuracy is improved. The experimental error is reduced, and the measurement efficiency and accuracy are improved.
Owner:MAINTENANCE & TEST CENTRE CSG EHV POWER TRANSMISSION CO +1

A hydrogen plasma treated partitioned passivated p-gan bridge hemt device

The application belongs to the technical field of power semiconductors, and relates to a hydrogen plasma processing partitioned passivation p-GaN bridge HEMT device. The structure has the advantages of high withstand voltage, low dynamic resistance, high threshold voltage, high gate breakdown voltage, high threshold voltage stability and the like. The structure replaces the etching technology by hydrogen plasma passivation processing, can significantly reduce the AlGaN surface trap concentration, improve the interface quality, inhibit the current collapse effect and dynamic resistance degradation; the thin layer p-GaN extending from the gate to the drift region as an active passivation region, uses the charge balance mechanism to improve the device breakdown voltage; the p-GaN cap layer after the gate surface passivation can improve the device threshold voltage, gate breakdown voltage and gate service life; the p-GaN bridge arranged in the longitudinal direction between the gate and the source realizes the introduction of the "discharge path" of the gate region, relieves the charge storage effect of the gate region, and realizes higher threshold voltage stability.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

ODADBr in-situ passivated perovskite quantum dot high-efficiency light-emitting LED and its fabrication method

ActiveCN115498123BQuantum yieldLuminescence
This invention discloses a high-efficiency LED made of perovskite quantum dots with in-situ passivation using ODADBr and its preparation method. ITO is used as the anode; PEDOT:PSS is used as the hole injection layer with a thickness of 40 nm; Poly-TPD is used as the hole transport layer with a thickness of 20 nm; PMMA is used as the interface modification layer with a thickness of 5 nm; ODADBr is 1,8-octanediamine hydrobromide; the original CsPbBr3 quantum dots, in situ passivated with ODADBr, form the light-emitting layer with a thickness of 15 nm; TPBi is used as the electron transport layer with a thickness of 50 nm; LiF is used as the electron injection layer with a thickness of 1 nm; and Al is used as the cathode with a thickness of 100 nm. ODADBr passivation is used to passivate the surface traps of the CsPbBr3 quantum dots synthesized by high-temperature thermal injection, reducing excess Pb on the quantum dot surface. 2+ With V Br This improves the fluorescence lifetime, luminescence intensity, and fluorescence quantum yield (PLQY) of the material, thereby enhancing its stability. When applied to LEDs, this can achieve high brightness, high purity, high external quantum efficiency, and improved device lifespan.
Owner:JILIN UNIVERSITY

High-stability GAN bidirectional device

PCT designated stageWO2025167630A1Valence bandElectrical resistance and conductance
A high-stability GaN bidirectional device, comprising a substrate, and a transition layer, a buffer layer, a back-barrier layer, a channel layer, and barrier layer which are successively stacked on the substrate. A first gate (G1) and a second gate (G2) are respectively prepared on a first hole injection layer (P1) and a second hole injection layer (P2), and the first and second hole injection layers are located on the barrier layer; a first source (S1) and the second source (S2) are prepared on the barrier layer by means of an Ohmic contact, and are located on two sides of the first and second hole injection layers; the first source, the first hole injection layer, the second hole injection layer, and the second source are isolated from each other by passivation layers; and from the perspective of an energy band, the valence band maximum of the back-barrier layer is lower than the valence band maximum of the channel layer, thereby preventing hole injection into the substrate. The device has the functions of bidirectional conduction and bidirectional voltage withstanding, and can effectively suppress the current collapse effect caused by surface traps and substrate effects, enabling the device to have high dynamic stability and low dynamic on-resistance. The substrate can be connected to either source or left electrically floating to increase the breakdown voltage of the device.
Owner:PEKING UNIV

A surface trap distribution testing method and device based on optical excitation

The present application provides a surface trap distribution test method and device based on light excitation, which belongs to the technical field of dielectric property testing of solid medium materials. The method sends a preset excitation energy parameter to the electron gun device so that the electron gun device emits corresponding trapped charges to the sample to be tested within a first time period. The sample to be tested is a solid medium that is relatively arranged at the emission end of the electron gun device and the collection end of the surface potentiometer through an active connection device. When the trapped charge is injected into the sample to be tested, a light source excitation instruction is generated to enable the light source excitation device to emit preset wavelength photon streams to the sample to be tested in sequence through the light source excitation instruction. The surface potential sequence corresponding to the trapped charge is determined by the relatively arranged surface potentiometer. Based on the excitation energy parameter, the surface potential sequence, the preset trap energy level formula and the preset trap density distribution formula, the corresponding surface trap energy level value and surface trap density distribution value of the sample to be tested are determined.
Owner:XI AN JIAOTONG UNIV

A photovoltaic device and a method of manufacturing the same

The application discloses a photovoltaic device and a preparation method thereof, and belongs to the technical field of photovoltaic devices. The photovoltaic device comprises, from bottom to top, a substrate, an electron transport layer, a YbBr3 spin-coated modified PbS-PbX2 quantum dot layer, a PbS-EDT layer and a metal layer. In the photovoltaic device, YbBr3 is spin-coated on the surface of a PbS-PbX2 quantum dot layer after halogen ligand exchange is completed, so that Yb 3+ / Br ‑ forms an ionic coordination bond on the surface of PbS; first, by utilizing the quantum confinement characteristics of Yb 3+ , two 980 nm near-infrared photons are emitted after visible light with higher energy is absorbed, and then the photons are absorbed by adjacent PbS quantum dots again, so that the utilization rate of the photons is improved, and the short-circuit current and overall power conversion efficiency are significantly improved; second, Yb 3+ / Br ‑ passivates the surface vacancy defects, reduces the surface trap density, prolongs the carrier lifetime, improves the open-circuit voltage and the fill factor.
Owner:ANHUI LIANGXIN OPTOELECTRONICS TECHNOLOGY CO LTD

Ultrasound-induced emission material as well as preparation method and application thereof

The invention relates to the technical field of ultrasound-induced emission materials, in particular to an ultrasound-induced emission material and a preparation method and application thereof. The chemical formula of the ultrasonic induced emission material is Li (1-x) TaO3: xTb < 3 + >, and x is greater than or equal to 0 and less than or equal to 0.2. The damage detection method based on ultrasonic-induced emission comprises the following steps: coating a substrate to be detected with the ultrasonic-induced emission material to form a coating layer, performing ultrasonic action on the substrate, inducing the coating layer to emit light, and judging the damage degree of the substrate according to a light-emitting image. Ultrasonic waves are used as a stressor to induce LiTaO3: Tb < 3 + > to emit light, the cavitation effect generated by the ultrasonic waves in the LiTaO3: Tb < 3 + > material is combined with the ultrasonic waves to induce luminescence generated by overflowing of carriers in traps on the surface of the material, the ultrasonic waves have the advantages of being non-contact and capable of accurately controlling parameters, and a brand new means is provided for researching mechanoluminescence.
Owner:CHINA UNIV OF GEOSCIENCES (WUHAN) +1

Vertical gallium nitride MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device with multiple quantum well insertion layers and preparation method of vertical gallium nitride MOSFET device

PendingCN121078763AMOSFETGallium nitride
The invention provides a vertical gallium nitride MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device with a multi-quantum well insertion layer and a preparation method of the vertical gallium nitride MOSFET device. According to the invention, by introducing the multi-quantum well insertion layer, the problems of performance degradation (reliability problems such as threshold voltage drift, dynamic on-resistance increase and transconductance reduction) and instability of the transistor caused by surface traps and body traps trapping carriers are solved; by arranging the nanoscale n-GaN thin layer, the blocking effect of polarization barriers among multiple quantum wells on electrons is avoided, and the forward conduction characteristic of the transistor is improved; three-quadrant follow current is carried out through a built-in MOS channel diode (MCD), unipolar conduction can be realized under low drain reverse bias voltage, and the problem of three-quadrant follow current of a traditional vertical power T-MOSFET is well solved.
Owner:SHANDONG UNIV +1

Method for processing n-type gallium nitride Schottky interface and method for preparing n-type gallium nitride Schottky diode

The invention discloses an n-type gallium nitride Schottky interface processing method and a preparation method of an n-type gallium nitride Schottky diode. The n-type gallium nitride Schottky interface processing method comprises the following steps: cleaning a Schottky interface of n-type gallium nitride by using a first ammonia water diluted solution; in a vacuum environment, nitrogen plasma is used for carrying out reaction repairing treatment on the Schottky interface of the n-type gallium nitride; and carrying out passivation repair treatment on the Schottky interface of the n-type gallium nitride by using a second ammonia water diluted solution, wherein the concentration of the second ammonia water diluted solution is smaller than that of the first ammonia water diluted solution. According to the invention, Ga-O bonds of n-type gallium nitride can be removed, a natural oxide layer can be removed, a surface defect state can be repaired, the content of surface impurity elements can be reduced, the surface appearance and properties can be improved, and the surface trap state density can be reduced, so that an interface state more suitable for Schottky preparation can be realized; according to the GaN Schottky diode prepared based on the method, the turn-on voltage is effectively reduced, the leakage current is improved, and the overall performance is improved.
Owner:SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI

High electron mobility transister, and method for producing same

PCT designated stageWO2025249841A1Chemical physicsHigh electron
A high electron mobility transistor according to the present invention may comprise: a substrate; a channel layer formed on the substrate; a barrier layer formed on the channel layer; a first protective layer formed on the barrier layer to reduce interface traps, surface traps, and deep level traps of the channel layer and the barrier layer; and a second protective layer formed on the first protective layer to reduce leakage current generation in a gate electrode.
Owner:RFHIC CORP

A device and method for measuring surface trap distribution characteristics of an insulating material

The application provides a device and method for measuring surface trap distribution characteristics of insulating materials, which comprises a test cavity and a data acquisition system; the test cavity comprises a cavity shell, a rotating connecting rod, a clamping plate, a needle electrode, a grid electrode and a sample surface grounding ring electrode; the rotating connecting rod is fixed on the cavity shell; the clamping plate is fixed on the rotating connecting rod; the clamping plate comprises an upper end clamping plate, a middle clamping plate and a lower end clamping plate; the needle electrode is fixed on the upper end clamping plate; the grid electrode is fixed on the lower end clamping plate; the needle electrode applies high voltage and is used for generating charged particles through corona discharge; the grid electrode applies low voltage and is used for uniformizing the electric field between the needle electrode and the sample; the sample surface grounding ring electrode is arranged on the sample surface, a circular hole is formed in the center of the sample surface grounding ring electrode, and the needle electrode is opposite to the center of the circular hole during corona charging; and the data acquisition system is used for recording the sample surface potential. The device and method can improve the electric field distribution on the sample surface after corona charging and effectively measure the surface trap distribution characteristics of insulating materials.
Owner:NORTH CHINA ELECTRIC POWER UNIV +2