Gallium nitride transistor structure and preparation method thereof

A technology of transistors and gallium nitride, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of difficult device technology and small etching selection, achieve high etching selection ratio, alleviate electric field concentration, and simple growth process Effect

Active Publication Date: 2019-11-08
安徽长飞先进半导体有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the relatively small etching selection between p-AlGaN or p-GaN and the epitaxial AlGaN barrier layer, it brings certain difficulties to the device process

Method used

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  • Gallium nitride transistor structure and preparation method thereof
  • Gallium nitride transistor structure and preparation method thereof
  • Gallium nitride transistor structure and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0040] A gallium nitride transistor structure, comprising a substrate 1, wherein the substrate 1 is a Si, SiC, GaN or sapphire substrate;

[0041] A GaN-based buffer layer 2 located above the substrate 1; a GaN-based channel layer 3 located above the GaN-based buffer layer 2; an In layer located above the GaN-based channel layer 3 x Al y Ga 1-x-y N barrier layer 4, where 0≤x<1, 0≤y<1, and x+y≠0;

[0042] The structure of the GaN-based buffer layer 2 is an AlN nucleation layer, a GaN buffer layer, and an AlGaN buffer layer from bottom to top;

[0043] Located in x Al y Ga 1-x-y The source electrode 6 at one end above the N barrier layer 4; the source electrode 6 is an ohmic contact metal electrode, and the ohmic contact metal electrode is composed of a single layer or multiple layers of metal and In x Al y Ga 1-x-y The N barrier layer 4 forms an ohmic contact electrode;

[0044] Located in x Al y Ga 1-x-y The drain electrode 5 at the other end above the N barrier la...

Embodiment 2

[0055] A gallium nitride transistor structure, the others are the same as in Embodiment 1, except that the uppermost layer of the gallium nitride transistor structure is also covered with a passivation layer 9; the passivation layer 9 includes Si 3 N 4 、Al 2 o 3 , AlN, Y 2 o 3 , La 2 o 3 、 Ta 2 o 5 、TiO 2 , HfO 2 , ZrO 2 single-layer or multi-layer composite structures.

[0056] The preparation method of the gallium nitride transistor is the same as that of Embodiment 1, except that after step (6), a passivation layer 9 deposition step is included, and the passivation layer 9 is deposited by PECVD, MOCVD, ALD or sputtering.

Embodiment 3

[0058] A gallium nitride transistor structure, comprising a substrate 1, wherein the substrate 1 is a Si, SiC, GaN or sapphire substrate;

[0059] A GaN-based buffer layer 2 located above the substrate 1; a GaN-based channel layer 3 located above the GaN-based buffer layer 2; an In layer located above the GaN-based channel layer 3 x Al y Ga 1-x-y N barrier layer 4, where 0≤x<1, 0≤y<1, and x+y≠0;

[0060] The structure of the GaN-based buffer layer 2 is an AlN nucleation layer, a GaN buffer layer, and an AlGaN buffer layer from bottom to top;

[0061] Located in x Al y Ga 1-x-y The source electrode 6 at one end above the N barrier layer 4; the source electrode 6 is an ohmic contact metal electrode, and the ohmic contact metal electrode is composed of a single layer or multiple layers of metal and In x Al y Ga 1-x-y The N barrier layer 4 forms an ohmic contact electrode;

[0062] Located in x Al y Ga 1-x-y The drain electrode 5 at the other end above the N barrier la...

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Abstract

The invention discloses a gallium nitride transistor structure and a preparation method thereof. The gallium nitride transistor structure includes: a substrate 1; a GaN-based buffer layer 2 located onthe substrate 1; an InxAlyGa1-x-yN/GaN heterojunction epitaxial structure positioned on the GaN-based buffer layer 2; a source electrode 6 positioned at one end of the surface of the InxAlyGa1-x-yN/GaN heterojunction epitaxial structure; a drain electrode 5 positioned at the other end of the surface of the InxAlyGa1-x-yN/GaN heterojunction epitaxial structure; and a p-type oxide film and a gate 7which are located at the surface of the InxAlyGa1-x-yN/GaN heterojunction epitaxial structure. The p-type oxide film is arranged between the source electrode 6 and the drain electrode 5 at the surface of the InxAlyGa1-x-yN/GaN heterojunction epitaxial structure to obtain the GaN transistor structure of the p-type oxide intercalation to suppress the current collapse effect, and the virtual gate effect is relieved by neutralizing electrons in the hole in the p-type oxide and captured by surface traps.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to a gallium nitride transistor structure and a preparation method thereof. Background technique [0002] Devices based on traditional semiconductor materials such as Si and GaAs are limited by the properties of the material itself, so it is difficult to further improve the corresponding indicators of power semiconductor devices. In recent years, the third-generation wide-bandgap semiconductor materials based on group III nitrides have developed rapidly. GaN has excellent material properties such as wide band gap, high saturation electron drift rate, high breakdown field strength and high thermal conductivity, and has great development potential in the fields of high frequency, high temperature, high power and ultraviolet LEDs. In addition, GaN also has excellent electronic properties, and can form a modulation-doped AlGaN / GaN heterostructure with AlGaN, and obta...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/12H01L29/78
CPCH01L29/0603H01L29/0684H01L29/0611H01L29/2003H01L29/78
Inventor 刘煦冉程海英王敬宋东波
Owner 安徽长飞先进半导体有限公司
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