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1509 results about "High-electron-mobility transistor" patented technology

A high-electron-mobility transistor (HEMT), also known as heterostructure FET (HFET) or modulation-doped FET (MODFET), is a field-effect transistor incorporating a junction between two materials with different band gaps (i.e. a heterojunction) as the channel instead of a doped region (as is generally the case for MOSFET). A commonly used material combination is GaAs with AlGaAs, though there is wide variation, dependent on the application of the device. Devices incorporating more indium generally show better high-frequency performance, while in recent years, gallium nitride HEMTs have attracted attention due to their high-power performance. Like other FETs, HEMTs are used in integrated circuits as digital on-off switches. FETs can also be used as amplifiers for large amounts of current using a small voltage as a control signal. Both of these uses are made possible by the FET’s unique current-voltage characteristics. HEMT transistors are able to operate at higher frequencies than ordinary transistors, up to millimeter wave frequencies, and are used in high-frequency products such as cell phones, satellite television receivers, voltage converters, and radar equipment. They are widely used in satellite receivers, in low power amplifiers and in the defense industry.

Method for achieving improved epitaxy quality (surface texture and defect density) on free-standing (aluminum, indium, gallium) nitride ((al,in,ga)n) substrates for opto-electronic and electronic devices

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V / III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.
Owner:WOLFSPEED INC

Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer

InactiveUS6849882B2High piezoelectric chargeReduction in piezoelectric scatteringSemiconductor/solid-state device manufacturingSemiconductor devicesHigh electronNucleation
A Group III nitride based high electron mobility transistors (HEMT) is disclosed that provides improved high frequency performance. One embodiment of the HEMT comprises a GaN buffer layer, with an AlyGa1−yN (y=1 or y 1) layer on the GaN buffer layer. An AlxGa1−xN (0≦x≦0.5) barrier layer on to the AlyGa1−yN layer, opposite the GaN buffer layer, AlyGa1−yN layer having a higher Al concentration than that of the AlxGa1−xN barrier layer. A preferred AlyGa1−yN layer has y=1 or y˜1 and a preferred AlxGa1−xN barrier layer has 0≦x≦0.5. A 2DEG forms at the interface between the GaN buffer layer and the AlyGa1−yN layer. Respective source, drain and gate contacts are formed on the AlxGa1−xN barrier layer. The HEMT can also comprising a substrate adjacent to the buffer layer, opposite the AlyGa1−yN layer and a nucleation layer between the AlxGa1−xN buffer layer and the substrate.
Owner:CREE INC +1

Methods of fabricating nitride-based transistors having regrown ohmic contact regions and nitride-based transistors having regrown ohmic contact regions

Transistor fabrication includes forming a nitride-based channel layer on a substrate, forming a barrier layer on the nitride-based channel layer, forming a contact recess in the barrier layer to expose a contact region of the nitride-based channel layer, forming a contact layer on the exposed contact region of the nitride-based channel layer, for example, using a low temperature deposition process, forming an ohmic contact on the contact layer and forming a gate contact disposed on the barrier layer adjacent the ohmic contact. A high electron mobility transistor (HEMT) and methods of fabricating a HEMT are also provided. The HEMT includes a nitride-based channel layer on a substrate, a barrier layer on the nitride-based channel layer, a contact recess in the barrier layer that extends into the channel layer, an n-type nitride-based semiconductor material contact region on the nitride-based channel layer in the contact recess, an ohmic contact on the nitride-based contact region and a gate contact disposed on the barrier layer adjacent the ohmic contact. The n-type nitride-based semiconductor material contact region and the nitride-based channel layer include a surface area enlargement structure.
Owner:CREE INC

Switch mode power amplifier using MIS-HEMT with field plate extension

Disclosed are a switch mode power amplifier and a field effect transistor especially suitable for use in a switch mode power amplifier. The transistor is preferably a compound high electron mobility transistor (HEMT) having a source terminal and a drain terminal with a gate terminal therebetween and positioned on a dielectric material. A field plate extends from the gate terminal over at least two layers of dielectric material towards the drain. The dielectric layers preferably comprise silicon oxide and silicon nitride. A third layer of silicon oxide can be provided with the layer of silicon nitride being positioned between layers of silicon oxide. Etch selectivity is utilized in etching recesses for the gate terminal.
Owner:WOLFSPEED INC

Binary group III-nitride based high electron mobility transistors

Binary Group III-nitride high electron mobility transistors (HEMTs) and methods of fabricating binary Group III-nitride HEMTs are provided. In some embodiments, the binary Group III-nitride HEMTs include a first binary Group III-nitride barrier layer, a binary Group III-nitride channel layer on the first barrier layer; and a second binary Group III-nitride barrier layer on the channel layer. In some embodiments, the binary Group III-nitride HEMTs include a first AIN barrier layer, a GaN channel layer and a second AIN barrier layer.
Owner:CREE INC

Cap layers and/or passivation layers for nitride-based transistors, transistor structures and methods of fabricating same

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.
Owner:CREE INC

Robust transistors with fluorine treatment

A semiconductor device, and particularly a high electron mobility transistor (HEMT), having a plurality of epitaxial layers and experiencing an operating (E) field. A negative ion region in the epitaxial layers to counter the operating (E) field. One method for fabricating a semiconductor device comprises providing a substrate and growing epitaxial layers on the substrate. Negative ions are introduced into the epitaxial layers to form a negative ion region to counter operating electric (E) fields in the semiconductor device. Contacts can be deposited on the epitaxial layers, either before or after formation of the negative ion region.
Owner:CREE INC

Methods to shape the electric field in electron devices, passivate dislocations and point defects, and enhance the luminescence efficiency of optical devices

A fluorine treatment that can shape the electric field profile in electronic devices in 1, 2, or 3 dimensions is disclosed. A method to increase the breakdown voltage of AlGaN / GaN high electron mobility transistors, by the introduction of a controlled amount of dispersion into the device, is also disclosed. This dispersion is large enough to reduce the peak electric field in the channel, but low enough in order not to cause a significant decrease in the output power of the device. In this design, the whole transistor is passivated against dispersion with the exception of a small region 50 to 100 nm wide right next to the drain side of the gate. In that region, surface traps cause limited amounts of dispersion, that will spread the high electric field under the gate edge, therefore increasing the breakdown voltage. Three different methods to introduce dispersion in the 50 nm closest to the gate are described: (1) introduction of a small gap between the passivation and the gate metal, (2) gradually reducing the thickness of the passivation, and (3) gradually reducing the thickness of the AlGaN cap layer in the region close the gate.
Owner:RGT UNIV OF CALIFORNIA

P-GaN/AlGaN/AlN/GaN ENHANCEMENT-MODE FIELD EFFECT TRANSISTOR

An enhancement mode High Electron Mobility Transistor (HEMT) comprising a p-type nitride layer between the gate and a channel of the HEMT, for reducing an electron population under the gate. The HEMT may also comprise an Aluminum Nitride (AlN) layer between an AlGaN layer and buffer layer of the HEMT to reduce an on resistance of a channel.
Owner:RGT UNIV OF CALIFORNIA

Diode-Like Composite Semiconductor Device

A silicon-made low-forward-voltage Schottky barrier diode is serially combined with a high-antivoltage-strength high-electron-mobility transistor made from a nitride semiconductor that is wider in bandgap than silicon. The Schottky barrier diode has its anode connected to the gate, and its cathode to the source, of the HEMT. This HEMT is normally on. The reverse voltage withstanding capability of the complete device depends upon that between the drain and gate of the HEMT.
Owner:SANKEN ELECTRIC CO LTD

Cap Layers Including Aluminum Nitride for Nitride-Based Transistors and Methods of Fabricating Same

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.
Owner:CREE INC

III-V Nitride homoepitaxial material of improved MOVPE epitaxial quality (surface texture and defect density) formed on free-standing (Al,In,Ga)N substrates, and opto-electronic and electronic devices comprising same

A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V / III ratio in a range of from about 1 to about 10<5>, nitrogen source material partial pressure in a range of from about 1 to about 10<3 >torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 10<2 >microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.
Owner:WOLFSPEED INC

Methods of fabricating nitride-based transistors having regrown ohmic contact regions

Transistor fabrication includes forming a nitride-based channel layer on a substrate, forming a barrier layer on the nitride-based channel layer, forming a contact recess in the barrier layer to expose a contact region of the nitride-based channel layer, forming a contact layer on the exposed contact region of the nitride-based channel layer, for example, using a low temperature deposition process, forming an ohmic contact on the contact layer and forming a gate contact disposed on the barrier layer adjacent the ohmic contact. A high electron mobility transistor (HEMT) and methods of fabricating a HEMT are also provided. The HEMT includes a nitride-based channel layer on a substrate, a barrier layer on the nitride-based channel layer, a contact recess in the barrier layer that extends into the channel layer, an n-type nitride-based semiconductor material contact region on the nitride-based channel layer in the contact recess, an ohmic contact on the nitride-based contact region and a gate contact disposed on the barrier layer adjacent the ohmic contact. The n-type nitride-based semiconductor material contact region and the nitride-based channel layer include a surface area enlargement structure.
Owner:CREE INC

Semiconductor device and a method of making the same

A semiconductor device having nitride semiconductor layers has a buffer layer (2) in the form of alternations of a first sublayer (8) of AlN and a second layer (9) of GaN with interposition of a third layer (10) of p-type GaN therebetween. On this buffer layer there is grown a main semiconductor region (3) having nitride semiconductor layers for providing a high-electron-mobility transistor or the like. From 0.5 to 50.0 nanometers thick, the third sublayers (10) of the buffer layer restrict the generation of two-dimensional electron gas and so prevent the buffer layer from becoming unnecessarily low in resistance.
Owner:SANKEN ELECTRIC CO LTD

GaN-based high electron mobility transistor and method for making the same

A high electron mobility transistor including: a GaN material system based heterostructure; a passivating nitride layer over the heterostructure and defining a plurality of openings; and a plurality of electrical contacts for the heterostructure and formed through the openings.
Owner:LOCKHEED MARTIN CORP

Self-aligned structures and methods for asymmetric GAN transistors & enhancement mode operation

Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain semiconductor region to provide high breakdown voltage and low on-state resistance. In embodiments, self-alignment techniques are applied to form a dielectric liner in trenches and over an intervening mandrel to independently define a gate length, gate-source length, and gate-drain length with a single masking operation. In embodiments, III-N HEMTs include fluorine doped semiconductor barrier layers for threshold voltage tuning and / or enhancement mode operation.
Owner:INTEL CORP

Aluminum free group III-nitride based high electron mobility transistors

Aluminum free high electron mobility transistors (HEMTs) and methods of fabricating aluminum free HEMTs are provided. In some embodiments, the aluminum free HEMTs include an aluminum free Group III-nitride barrier layer, an aluminum free Group III-nitride channel layer on the barrier layer and an aluminum free Group III-nitride cap layer on the channel layer.
Owner:WOLFSPEED INC

Cap layers including aluminum nitride for nitride-based transistors

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.
Owner:CREE INC

GaN-based high electron mobility transistor

A GaN-based high electron mobility transistor (HEMT) has an undoped GaN layer where a two-dimensional electron gas layer is formed, the undoped GaN layer having a high electric resistivity enabling a pinch-off state to be obtained even when the gate bias voltage is 0 V. The GaN-based HEMT comprises a semi-insulating substrate on which a GaN buffer layer is formed. An undoped GaN layer is disposed on the GaN buffer layer and has an electric resistivity of not less than 1x106 OMEGA / cm2. An undoped AlGaN layer is disposed on the undoped GaN layer via a heterojunction such that an undercut portion is formed therebetween. An n-type GaN layer is further disposed in such a manner as to bury side portions of the undoped AlGaN layer and the undercut portion. The individual layers thus Ad form a layered structure. A gate electrode G is formed on the undoped AlGaN layer, and a source electrode S and a drain electrode D are formed on the n-type GaN layer.
Owner:FURUKAWA ELECTRIC CO LTD

High electron mobility transistor and method for fabricating the same

A high electron mobility transistor includes a substrate, a buffer layer, a channel layer, a spacer layer, a schottky layer and a cap layer. The buffer layer is formed on the substrate. The channel layer is formed on the buffer layer, in which the channel layer comprises a superlattice structure formed with a plurality of indium gallium arsenide thin films alternately stacked with a plurality of indium arsenide thin films. The spacer layer is formed on the channel layer. The schottky layer is formed on the spacer layer. The cap layer is formed on the schottky layer.
Owner:YLTLINK TECH CORP

Aluminum free group III-nitride based high electron mobility transistors and methods of fabricating same

Aluminum free high electron mobility transistors (HEMTs) and methods of fabricating aluminum free HEMTs are provided. In some embodiments, the aluminum free HEMTs include an aluminum free Group III-nitride barrier layer, an aluminum free Group III-nitride channel layer on the barrier layer and an aluminum free Group III-nitride cap layer on the channel layer.
Owner:WOLFSPEED INC

Transistors having buried n-type and p-type regions beneath the source region

High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.
Owner:CREE INC

Low Density Drain HEMTs

Methods and devices for fabricating AlGaN / GaN normally-off high electron mobility transistors (HEMTs). A fluorine-based (electronegative ions-based) plasma treatment or low-energy ion implantation is used to modify the drain-side surface field distribution without the use of a field plate electrode. The off-state breakdown voltage can be improved and current collapse can be completely suppressed in LDD-HEMTs with no significant degradation in gains and cutoff frequencies.
Owner:THE HONG KONG UNIV OF SCI & TECH

AlGaN/GaN high electron mobility transistor devices

The present invention recites a new method for manufacturing Group III-N field-effect devices, such as HEMT, MOSHFET, MISHFET devices or MESFET devices, grown by Metal-Organic Vapor Phase Expitaxy, with higher performance (power), by covering the surface with a thin SiN layer on the top AlGaN layer, in the reactor where the growth takes place at high temperature, prior cooling down the structure and loading the sample out of the reactor, as well as a method to produce some HEMT transistors on those heterostructures, by depositing the contact on the surface without any removal of the SiN layer by MOCVD. The present invention recites also a device.
Owner:INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)

High electron mobility transistor

ActiveUS7253454B2Improving linearity without substantial loss of electron mobilityTransistorBand bendingElectron mobility
A HEMT device including a GaN channel structure including a very thin (Al,In,Ga)N subchannel layer that is disposed between a first GaN channel layer and a second GaN channel layer, to effect band bending induced from the piezoelectric and spontaneous charges associated with the (Al,In,Ga)N subchannel layer. This GaN channel / (Al,In,Ga)N subchannel arrangement effectively disperses the 2DEG throughout the channel of the device, thereby rendering the device more linear in character (relative to a corresponding device lacking the subchannel (Al,In,Ga)N sub-layer), without substantial loss of electron mobility.
Owner:WOLFSPEED INC

Semiconductor device and power conversion device using the same

In a semiconductor device in which a diode and a high electron mobility transistor are incorporated in the same semiconductor chip, a compound semiconductor layer of the high electron mobility transistor is formed on a main surface (first main surface) of a semiconductor substrate of the diode, and an anode electrode of the diode is electrically connected to an anode region via a conductive material embedded in a via hole (hole) reaching a p+ region which is the anode region of the main surface of the semiconductor substrate from a main surface of the compound semiconductor layer.
Owner:RENESAS ELECTRONICS CORP
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