1668 results about "Switched capacitance" patented technology

This disclosure provides apparatus, systems and methods of fabricating force-sensitive switches. In some implementations, an array of force-sensitive switches and local capacitors of a combined sensor device may be used to connect the local capacitor into associated projected capacitive touch (PCT) detection circuitry. In some implementations, each capacitor may be formed with a thin dielectric layer to achieve a high capacitance increase when the force-sensitive switch is closed, e.g., by the pressing of a stylus or finger. In some implementations, the same PCT detection circuitry can be used to detect changes in mutual capacitance when touched with a finger (touch mode) and changes in sensel capacitance when the force-sensitive switch is depressed (stylus or fingerprint mode).

The invention relates to a resonant switched capacitor direct current voltage converter which comprises a first voltage node, a second voltage node, a first switch, a second switch, a first diode, a second diode and a control circuit, wherein a first voltage exists between the first voltage node and a negative wire; a second voltage exists between the second voltage node and the negative wire; and the control circuit provides switching gate signals for the first and the second switches. The resonant switched capacitor direct current voltage converter further comprises a center-tapped inductor and a resonant capacitor, wherein the center-tapped inductor is connected between the first switch and the second switch; and the resonant capacitor is connected between the common node of the first and the second diodes and the central node of the center-tapped inductor. Compared with the conventional switched capacitor direct current voltage converter, the invention has the advantages of reducing complexity, loss and cost, improving the speed, and avoiding the limitation.

A multi-tap direct sub-sampling mixing system for wireless receivers is provided with a dynamically configurable passive switched capacitor filter. A front end amplifier is connected to receive a signal. The passive switched capacitor filter is connected to receive the amplified signal and has an output for providing a filtered signal. The switched capacitor filter has at least two sections that are each operable as a pole, wherein a first section of the at least two sections has sets of at least two stacked capacitors interconnected with a set of switches operable to amplify in input voltage provided to an input of the first section in response to operation of the set of switches; and a back end section connected to the output of the switched capacitor filter to receive the filtered signal.

A frequency control circuit including a controlled oscillator and an amplifier circuit is disclosed for providing a clock signal to a switched capacitor circuit which divides an input voltage to provide an output voltage. The controlled oscillator has a frequency control input receiving a frequency control signal and an output for providing the clock signal at a frequency based on the frequency control signal. The amplifier circuit has an input for receiving the output voltage and an output providing the frequency control signal based on droop of the output voltage. In one embodiment, the amplifier circuit adjusts the frequency control signal to optimize efficiency of the switched capacitor circuit over a voltage range of the output voltage, which changes based on load level.

A digital filter in an oversampling converter is tuned to compensate for the non-ideal frequency response of a transducer coupled to the converter. In the A/D path, the filter coefficients of the decimation filter in a sigma-delta converter are tuned to compensate for the transducer. In the D/A path, the filter coefficients of the interpolation filter of a sigma-delta converter are tuned to compensate for the transducer. Filter coefficients may be statically defined in circuitry or programmable from values stored in a storage memory. Compensation may also be accomplished by tuning capacitor ratios in a switched capacitor filter, which is typically integral to the D/A path of an oversampling converter.

A bandpass SIGMADELTA ADC utilizing either a single-loop or a MASH architecture wherein the resonators are implemented as either a delay cell resonator, a delay cell based resonator, a Forward-Euler resonator, a two-path interleaved resonator, or a four-path interleaved resonator. The resonator can be synthesized with analog circuit techniques such as active-RC, gm-C, MOSFET-C, switched capacitor, or switched current. The switched capacitor or switched current circuits can be designed using single-sampling, double-sampling, or multi-sampling circuits. The non-stringent requirement of a SIGMADELTA ADC using switched capacitor circuits allows the ADC to be implemented in a CMOS process to minimize cost and reduce power consumption. Double-sampling circuits provide improved matching and improved tolerance to sampling clock jitter. In particular, a bandpass MASH 4-4 SIGMADELTA ADC provides a simulated signal-to-noise ratio of 85 dB at an oversampling ratio of 32 for a CDMA application. The bandpass SIGMADELTA ADC can also be used in conjunction with undersampling to provide a frequency downconversion.

A switched-capacitor voltage converter which is particularly well-suited for receiving a line voltage from which to drive current through a series of light emitting diodes (LEDs). Input voltage is rectified in a multi-level rectifier network having switched capacitors in an ascending-bank configuration for passing voltages in uniform steps between zero volts up to full received voltage V_DC. A regulator section, operating on V_DC, comprises switched-capacitor stages of H-bridge switching and flying capacitors. A current controlled oscillator drives the states of the switched-capacitor stages and changes its frequency to maintain a constant current to the load. Embodiments are described for isolating the load from the mains, utilizing an LC tank circuit or a multi-primary-winding transformer.

The invention provides a charging device that uses switched capacitor voltage converters to charge a battery using solar power. The charger uses boosting topology to efficiently use solar module photovoltaic power. The boosting topology enables a lower voltage to be used resulting in reduced cutting and soldering of photovoltaic cells. The battery charger has overcharge protection and uses inductor-less circuitry.

The present invention relates to resonant power converters and inverters comprising a self-oscillating feedback loop coupled from a switch output to a control input of a switching network comprising one or more semiconductor switches (S₁, S₂). The self-oscillating feedback loop sets a switching frequency of the power converter (100) and comprises a first intrinsic switch capacitance (C_GD) coupled between a switch output and a control input of the switching network and a first inductor (L_G). The first inductor (L_G) is coupled in-between a first bias voltage source and the control input of the switching network and has a substantially fixed inductance. The first bias voltage source is configured to generate an adjustable bias voltage (V_Bias) applied to the first inductor (L_G). The output voltage (V0UT) of the power converter (100) is controlled in a flexible and rapid manner by controlling the adjustable bias voltage (V_Bias).

Capacitance measurement apparatus that enhances the sensitivity and accuracy of capacitive transducers, proximity sensors, and touchless switches. Each of two capacitors (C1, C2) under measurement has one end connected to ground and is kept at substantially the same voltage potential by operational amplifier (A1) or amplifiers (A0, A1) using negative feedback. The apparatus is driven by a periodic e.g. sinusoidal signal source (G1) or sources (G1, G2) and includes a difference amplifier (A2) operative to produce an electrical signal having a linear relationship with a specified arithmetic function of the capacitances of the two capacitors (C1, C2). A touchless switch is implemented using the capacitance measurement apparatus. The touchless switch includes two sensor electrodes (E1, E2) that correspond to the two capacitors (C1, C2) under measurement and in one embodiment has a front surface in the form of a container.

The invention discloses a forward-flyback isolated type boost inverter realized by coupling inductors and application thereof, comprising two power switch tubes, two auxiliary switch tubes, four anti-parallel diodes, a switch tube parallel capacitor, two clamp capacitors, two switch capacitors, two output diodes and two coupling inductors respectively provided with two windings. The invention realizes zero-voltage switching on of the power switch tubes through the resonance of the leakage inductance of the two coupling inductors and the switch tube parallel capacitor, absorbs the voltage peak switched off by the switch tubes caused by the leakage inductance and realizes energy lossless transfer by utilizing a clamp circuit comprising the anti-parallel diodes of the switch tubes and the two clamp capacitors, realizes the high gain output of the inverter by utilizing the serial connection of the second windings of the two coupling inductors, further improves the gain of the inverter and lowers the output voltage stress of the diodes by utilizing the switch capacitors and realizes the output zero-current switching off of the diodes by utilizing the leakage inductance of the coupling inductors.

An electronic device which includes a first stage having an input capacitance, a switch, a buffer and a second stage having an input sensitive to charge injection and/or voltage glitches. An input of the buffer and the input of the second stage are coupled together at a first node which is configured to be coupled to a voltage source for supplying a reference voltage to the input of the first stage having the input capacitance. In a first configuration of the switch, the switch is arranged to either connect the input of the first stage to the first node and to disconnect the input of the first stage from an output of the buffer. In a second configuration of the switch, to connect the input of the first stage to the output of the buffer and to disconnect the input of the first stage from the first node.

A switched capacitor controller accurately controls the rise time of an on-chip generated high voltage. An on-chip charge pump is used to generate a high voltage (VPP) from an external power supply voltage (VCC). This high voltage signal (VPP) can be used to program Flash memory cells. A capacitor of a switched capacitor circuit is selectively switched between ground and a given node voltage. This generates a stair-stepped ramp function. The period of the steps is controlled according to a clock signal. This clock signal may be altered to produce the desired period. The voltage increases of the steps is regulated by a reference voltage multiplied by a ratio between two capacitor values. Thereby, the rise-time of the ramp function is accurately controlled as a function of the frequency of the clock signal and the ratio of the two capacitor values.

A method and system for decision feedback equalization for digital transmission systems is provided. Low-power integrating decision feedback equalization with fast switched-capacitor paths are used, for suppressing intersymbol interference (ISI) due to past data symbols. The decision feedback equalization involves performing current-integrating decision feedback equalization at low-power employing a fast capacitively coupled feed-forward path at the output of a current-integrating buffer and inducing voltage changes by charge redistribution via coupled switching capacitors, and performing a voltage digital-to-analog conversation to determine a feedback coefficient as a coupling voltage. Then switches are reset to a pre-charge coupling voltage in the buffers to eliminate residual ISI caused by signal history, thereby achieving current integrating buffering with switched-capacitor feedback during the integration, and the capacitive switches are triggered by previous symbols.