98 results about "Switched capacitance" patented technology

A system and method are used to maintain a variance in feedback factors of an amplifier between the first and second phases either below a threshold value or within a specified range. The system includes the amplifier and first through third capacitances. The amplifier is coupled between an input node and an output node that operates during first and second phases of operation. The first capacitance is coupled across the amplifier and between the input node and the output node during the first and second phases of operation. The second capacitance is coupled to the input node during the first phase of operation. The third capacitance is coupled to one of the input and output nodes during one or both of the first and second phases of operation.

The utility model relates to chip calibration technical field, especially, a kind of beamformer and ultrasonic chip, including the calibration circuit being coupled with sampling circuit, the relationship between the sampling capacitor C s And parasitic capacitance C p Between by the calibration circuit is indeed, to realize the calibration of the relationship between the input signal and output signal of the sampling circuit, avoid the influence of parasitic capacitance and ultrasonic chip output signal bandwidth, realize the decoupling of the limiting relationship of parasitic capacitance and ultrasonic chip output signal bandwidth, so that the switch capacitor circuit of ultrasonic chip can adopt smaller sampling capacitor, more simple layout layout reaches sufficient bandwidth simultaneously;Smaller sampling capacitor greatly reduces chip area, while reducing the load of front-stage circuit, thereby reducing the power consumption of chip.

The utility model relates to a kind of ladder form switch capacitor conversion circuit, conversion circuit includes ladder determination module, switch control module, output capacitor at least one flying capacitor;Current input end is connected with voltage output end in turn through at least two switch tubes, voltage output end is also grounded through output capacitor;One end of flying capacitor is connected between voltage input end and the common point of adjacent two switch tubes of voltage output end, its other end is grounded through a switch tube, and also be connected to the common point of output capacitor and voltage output end through another switch;When the ratio of input voltage and output voltage is non-integer, switch control module controls the charge-discharge process of flying capacitor, so that the voltage of last flying capacitor is equal to output voltage or input voltage.The present application realizes the efficient conversion of fixed integer ratio and / or non-integer ratio of input and output voltage by the switch capacitor control mode of multiple ladder, using the ladder voltage variation of flying capacitor.

The present application relates to the field of integrated circuits and photoelectric detection technology, in particular to a low-noise hybrid domain CMOS detector readout circuit.The circuit includes a capacitance feedback transimpedance amplification unit, a switched capacitor reference unit, an analog domain readout unit, a time domain quantization unit and an output selection unit.The transimpedance amplification unit converts the pixel current into voltage.The switched capacitor reference unit filters out the reference voltage noise in the reset stage and maintains the reference potential in the integration stage.The analog domain readout unit outputs analog voltage, and the time domain quantization unit outputs digital time code through saturation time detection.The output selection unit defaults to output analog signal, and switches to digital output when the transimpedance amplifier output voltage reaches the preset threshold.The present application also provides a corresponding readout method.The present application can effectively filter out the reference voltage source noise and power supply ripple, significantly improve the signal-to-noise ratio of micro-light detection, realize high dynamic range in a single frame, significantly expand the linear response range of the detector, and can be integrated on chip.

This invention discloses a high-gain, low-device voltage stress, common-ground non-isolated DC-DC boost converter, comprising: a Stage I hybrid active boost module for front-end boosting, consisting of two inductors, two capacitors, two switching transistors, two diodes, and an input source; a Stage II switched-capacitor boost module for secondary boosting and output filtering, consisting of three capacitors and three diodes; and an output module consisting of a load. This DC-DC boost converter constructs a non-isolated, input-output common-ground converter, achieving extremely high voltage gain without duty cycle limitations, extremely low device voltage stress, and continuously low-ripple input current. The device size is small, compact, lightweight, and easy to control. Furthermore, through specific parameter design, the converter eliminates instantaneous current spikes during mode switching of the switched-capacitor units. Therefore, the converter possesses advantages such as high gain, low stress, low ripple, high reliability, and high power density.

This invention relates to an active dual-switched capacitor coupled DC / DC converter with a reverse magnetic winding, belonging to the field of optics. It solves the problem that existing DC converters cannot simultaneously achieve low turns ratios and high voltage gain. The invention combines inductors, capacitors, diodes, and coupled inductors (N1, N2) in a specific series-cross connection to form an integrated high-gain unit. Through a reverse-coupled inductor voltage multiplier circuit (composed of multi-winding coupled inductors N1 and N2 connected in reverse, diode D1, and capacitor C1) and an active dual-switched capacitor structure (composed of power switches S1 and S2, capacitor C2, and diodes D2 and D3), the proposed converter can generate high voltage gain at low turns ratios. This invention is primarily applied in high boost ratio DC power conversion applications.

A multiplying digital-to-analog converter (MDAC) includes an analog-to-digital converter (ADC), a selection circuit, an operational amplifier, a first switched capacitor (SC) circuit, a second SC circuit, a first switch, a second switch, a first load capacitor, and a second load capacitor. The ADC generates a selection signal according to a first input signal and a second input signal. The selection circuit generates a first reference voltage and a second reference voltage according to the selection signal. The first and second SC circuits amplify the signal component of the first and second input signals. The first switch receives the second reference voltage. The second switch receives the first reference voltage. The first load capacitor receives the second reference voltage through the first switch. The second load capacitor receives the first reference voltage through the second switch.

The application relates to the field of power electronics, and discloses a multi-level converter valve structure, wherein the multi-level converter valve structure comprises a switching capacitor valve tower group and a plurality of commutation bridge valve towers; the switching capacitor valve tower group comprises three switching capacitor valve towers with a phase difference; the plurality of commutation bridge valve towers are connected in series, each commutation bridge valve tower is connected in parallel with each switching capacitor valve tower, the commutation bridge valve tower comprises a plurality of bridge modules arranged in a stack, each layer of the bridge modules comprises a plurality of valve modules connected in series, the valve module comprises a power device valve string, a capacitor assembly, a power supply assembly, a central control assembly and a module frame, the power device valve string, the capacitor assembly and the power supply assembly are mounted on the module frame along a first direction, the central control assembly is arranged on a side of the power device valve string away from the module frame along a stacking direction, the power device valve string, the capacitor assembly, the power supply assembly and the central control assembly are arranged in extension along a second direction, and the first direction, the second direction and the stacking direction are perpendicular to each other. The multi-level converter valve structure can reduce the floor area.

The application provides a high-voltage cross double sampling circuit, an analog-to-digital converter and a battery management system, wherein the high-voltage cross double sampling circuit comprises a switched capacitor module, an enable control module and a capacitor initial setting module; after the switched capacitor module is turned on, the high-voltage signal and the low-voltage signal are cross double sampled through switch switching; the enable control module is connected with the switched capacitor module and is used for turning on the switched capacitor module when an enable signal is valid; and the capacitor initial setting module is connected with the switched capacitor module and is used for setting the initial state of each capacitor in the switched capacitor module when the enable signal is invalid. The application solves the problem of low battery voltage detection speed of the existing high-voltage sampling circuit.

The application discloses a multiplexed switch capacitor equalization circuit for a single battery string and a control method thereof, and relates to the field of electrochemical energy storage. The equalization circuit is composed of a switch array and a capacitor network. The battery string is divided into a plurality of battery modules. The switch array is arranged in correspondence with the battery modules. Each battery module is connected to the multiplexed capacitor network through the corresponding switch array. All the switch arrays are controlled by pulse phase shift. When the switch arrays are alternately driven, the multiplexed capacitor network can transfer the energy of high-voltage battery modules in the battery string to low-voltage battery modules, or transfer the energy of high-voltage battery cells in the battery modules to low-voltage battery cells. Through the continuous charging and discharging of the capacitor network, the voltage of the entire battery string can be finally balanced. The application completes the voltage balancing of the single battery string through the multiplexed capacitor network, and has important significance for the miniaturization and compact design of the single battery string equalization circuit.

The application discloses a coupled inductor super-high gain DC-DC converter, a device and a control method, and belongs to the technical field of renewable energy storage grid connection, wherein the DC-DC converter integrates quadratic structure, switched capacitor, three-winding coupled inductor and voltage multiplication unit technology, realizes super-high voltage gain without relying on extreme duty cycle, and provides three degrees of freedom of flexibly adjustable output voltage; the coupled inductor super-high gain DC-DC conversion device comprises a voltage sampling sensor, a controller, a PWM signal generator and the DC-DC converter; the control method is applied to the DC-DC conversion device. In addition, while obtaining high voltage gain, the DC-DC converter can effectively reduce the voltage stress borne by the switch tube, and is suitable for occasions with high requirements for high voltage conversion performance in a renewable energy power generation system.

The application discloses a wide input range high-gain three-port DC-DC converter, and belongs to the field of power electronic converters. The converter is provided with three ports of a fuel cell FC, a storage battery Bat and a resistance load R, the FC port to the Bat port is a four-switch Buck-Boost converter, the wide input range of the FC is realized, and a switch capacitor unit composed of a switch tube, a capacitor and a diode is combined, the on-off of the switch tube is controlled, the connection mode of the inductor and the capacitor in the circuit and the on-off state of the diode are changed, and therefore the voltage gain of the FC port to the R port and the Bat port to the R port is improved. The application has the advantages of wide input range, high voltage gain, high integration degree and high stability, and is suitable for a new energy hybrid power generation system of fuel cells, photovoltaic cells and the like.

A non-isolated DC-to-DC switching hybrid converter is implemented using a cross-coupled series-capacitor quadruple step-down buck converter topology. In some embodiments, the DC-to-DC switching hybrid converter includes a switched-capacitor converter circuit and incorporates a zero-voltage switching network to implement soft switching and a coupled inductor to realize a fixed step-down ratio. The hybrid converter is capable of supporting a high step-down ratio (such as 8:1) while providing high efficiency. In other embodiments, the DC-to-DC switching hybrid converter incorporates a transformer in place of the coupled inductor to further increase the step-down ratio.

The application relates to the technical field of radio frequency integrated circuits, and discloses a low-noise voltage-controlled oscillator circuit which comprises a source follower low-noise bias circuit with digital calibration, a cross-coupled amplifier array composed of multiple units, a stable DC bias switch capacitor unit array, a wide linear variable capacitor array driven by a ladder bias voltage, and an amplitude self-calibration loop composed of digital logic and a peak detector.

A multi-phase switched capacitor converter is disclosed for converting a first voltage into a second voltage, or vice versa. The converter includes two sub-converters connected in parallel between an input voltage and an output voltage. Each sub-converter comprises a flying capacitor and a plurality of switches. Power conversion is performed by periodically switching the electrical connection between the flying capacitor and the voltage sources, between a first switching phase and a second switching phase. The two sub-converters alternately switch between a first system state and a second system state in a periodic manner. During the transition between the first and second system states, an overlapping system state is inserted, wherein both sub-converters are simultaneously in the first switching phase, thereby ensuring continuous current flow and reducing voltage spikes.

The application discloses a multi-stage converter suitable for super-wide-range high-voltage input and multi-channel output, and belongs to the field of DC-DC converters of electric energy conversion devices. The multi-stage converter comprises two function modules connected in cascade. The first function module is composed of a Ladder type switched capacitor converter and a synchronous rectification Buck converter connected in cascade, wherein the Ladder type switched capacitor converter adopts an intermediate capacitor of a switched capacitor topological structure as an output to realize fixed step-down ratio step-down, thereby ensuring uniform current distribution and reducing device voltage stress; the synchronous rectification Buck converter adopts input voltage feedforward variable duty ratio control to convert super-wide-range high-voltage input into a relatively narrow-range intermediate bus voltage. The second function module is composed of a half-bridge LLC resonant converter and a multi-channel non-isolated DC-DC converter, the LLC resonant converter adopts open-loop fixed-frequency control, and the multi-channel secondary sides are respectively configured with non-isolated DC-DC converters to independently carry out closed-loop control on each channel output. The application effectively solves the problems of high device voltage stress, limit duty ratio control and poor multi-channel output cross regulation under the condition of super-wide-range high-voltage input (such as DC 320V-6500V), realizes multi-channel isolated regulated output, and improves system efficiency and reliability.

This application discloses a DC-DC converter, comprising: a first DC-DC conversion circuit, a second DC-DC conversion circuit, and a first switching transistor. The first DC-DC conversion circuit is a switched inductor circuit. The second DC-DC conversion circuit is a switched capacitor circuit. A first terminal of the second DC-DC conversion circuit is coupled to a second terminal of the first DC-DC conversion circuit, and the second terminal of the second DC-DC conversion circuit is configured to be coupled to a battery. The first switching transistor is coupled between the first and second terminals of the first DC-DC conversion circuit. When the first switching transistor is turned on, the first DC-DC conversion circuit is bypassed. The DC-DC converter of this application has multiple operating modes, improving the converter's efficiency and saving costs.

This invention discloses a relay-charge parallel envelope tracking power supply with multiplexed input sources, comprising: a stepped wave voltage generation circuit, an AB-class linear amplifier, a feedforward control circuit, and a pulse edge distribution unit. It improves upon conventional parallel envelope tracking power supplies by using a relay-charge switched-capacitor converter to generate a stepped wave voltage based on the modulated wave voltage output from the feedforward control circuit. By integrating a level providing unit and a level gating unit, it simultaneously reduces the switching frequency relative to the reference signal frequency l / k, thereby reducing switching losses. This facilitates further reducing the switching frequency while maintaining tracking bandwidth, simplifying the circuit structure. Multiplexing the input source of the stepped wave voltage generation circuit reduces linear amplifier losses and input power, further improving the overall circuit efficiency.

The application provides a multiple variable ratio switched capacitor conversion circuit, a chip and an electronic device, and relates to the technical field of power management chips. The circuit comprises a first switched storage capacitor conversion module and a second switched storage capacitor conversion module; a first end of the first switched storage capacitor conversion module is connected with an input voltage end, a second end of the first switched storage capacitor conversion module is connected with an output voltage end, a first end of the second switched storage capacitor conversion module is connected with the input voltage end, a second end of the second switched storage capacitor conversion module is connected with the output voltage end, and the first switched storage capacitor conversion module and the second switched storage capacitor conversion module are distributed in a symmetrical topological structure; the multiple variable ratio switched capacitor conversion circuit alternately operates in a first mode and a second mode, and the voltage of the input voltage end is 5 times the voltage of the output voltage end. The application is used for providing a multiple variable ratio switched capacitor conversion circuit, and a higher voltage variable ratio is realized through different switch on-off states.

The present disclosure relates to electromagnetic side-channel countermeasures. Embodiments herein relate to countermeasures against electromagnetic (EM) probing attacks on voltage regulators (VRs) of cryptographic circuits. In one aspect, the clamping strength of a VR (e.g., a switched-capacitor VR) is dynamically and randomly modulated. The VR can include switches for transferring charge, where the switches can include multiple sub-switches in parallel, and the number of active switches is randomly changed to randomize EM emissions. In another aspect, the capacitors of a VR are formed in a metal routing layer (e.g., a top metal layer) of an integrated circuit package, where the capacitors have interdigitated electrodes that cancel current in and out of the electrodes, thereby reducing EM emissions. In another aspect, a resonant VR includes circuitry for detecting changes in current or voltage that are related to changes in its resonant frequency due to being subjected to EM probing.

An integrated circuit includes a bandgap reference circuit configured to generate, from a digital chip supply voltage, a reference voltage and a proportional-to-absolute temperature (PTAT) voltage. A voltage-to-frequency (VTF) readout circuit to receive the reference voltage and the PTAT voltage as inputs. The VTF readout circuit includes sets of switched capacitors that operate as a voltage divider. The capacitors of the sets of switched capacitors are selectively charged by the PTAT voltage and generate a feedback voltage. A voltage-controlled oscillator (VCO) is driven by a difference between the feedback voltage and the reference voltage and generates a VCO clock. A clock generator generates a feedback clock based on the VCO clock. First switches of the sets of switched capacitors are controlled by the feedback clock.

The application provides a voltage type global shutter photosensitive detector based on a composite dielectric gate capacitor and a method. In a unit of the detector, a global shutter structure is arranged between a composite dielectric gate MOS capacitor and a reading transistor, and specifically includes a switch transistor and a switch capacitor. The structure of the switch transistor includes a bottom insulating dielectric layer, a control gate and a source-drain electrode. The source of the switch transistor is connected with the composite dielectric gate MOS capacitor. The drain of the switch transistor is connected with the switch capacitor in series. Charge signals are coupled from the composite dielectric gate MOS capacitor to the switch capacitor, so that the charge signals are converted into voltage signals. The control gate of the reading transistor is connected with the source of the switch transistor. Voltage signals are input from the control gate end of the reading transistor, and are read out by the drain of the reading transistor. The application can realize a global exposure function on the basis of a traditional photosensitive detector, and can effectively solve the analog domain noise caused by dark current at a photosensitive interface.

The application relates to a three-phase three-level inverter based on a switched capacitor and an inverter circuit thereof, and belongs to the field of inverter design. The inverter circuit comprises three-phase bridge arms, and the structures of the bridge arms are the same. Each bridge arm comprises five switching tubes and one capacitor. The first switching tube and the second switching tube of each bridge arm are connected with the positive pole of a direct-current bus at one end, the other end of the first switching tube is connected with one end of the capacitor and one end of the fourth switching tube; the other end of the second switching tube is connected with the other end of the capacitor, one end of the third switching tube and one end of the fifth switching tube; the other end of the third switching tube is connected with the negative pole of the direct-current bus, and the other end of the fourth switching tube is connected with the other end of the fifth switching tube and then serves as an alternating-current output end of a corresponding phase. The application can achieve voltage boosting while effectively reducing the voltage stress of each switching tube by working in different states.

This invention discloses a charging / discharging capacitor detection circuit and temperature drift compensation method based on dynamic switching of GPIO ports, belonging to the field of electronic measurement technology. The circuit includes: a capacitor under test branch, comprising a capacitor under test, resistor R1, and resistor R2 connected in series, with a GPIO interface PA connected between the capacitor under test and resistor R1, and a GPIO interface PB connected between resistor R1 and resistor R2; a reference capacitor branch, comprising a reference capacitor, resistor R4, and resistor R5 connected in series, with a GPIO interface PD connected between the reference capacitor and resistor R4, and a GPIO interface PE connected between resistor R4 and resistor R5; a charge accumulation circuit, comprising analog switches S1 and S2, capacitors C1 and C2, and resistors R3 and R6 connected in parallel with capacitors C1 and C2 respectively; and an operational amplifier for receiving signals from capacitors C1 and C2 and suppressing common-mode signals.

This invention discloses a battery equalization circuit based on complementary half-bridges, its control system, and its method, belonging to the field of electrochemical energy storage. Voltage equalization between two individual cells within a battery unit is achieved through a switched inductor circuit, while voltage equalization among all battery units is achieved through a (quasi-resonant) switched capacitor circuit. Each complementary half-bridge circuit in the switching array consists of a P-channel MOSFET and an N-channel MOSFET connected in series. Each complementary half-bridge circuit is driven by an isolated optocoupler, a push-pull circuit, or an integrated driver chip. The driver circuit is powered by the corresponding battery unit, thus eliminating the need for an auxiliary power supply. All complementary half-bridge circuits are controlled by two square wave signals with the same frequency, duty cycle, and phase. This invention reduces the number of switching transistors required for the equalization circuit and simplifies the driver design of the switching array, which is of great significance for reducing the cost and size of the battery equalization circuit, as well as the design and implementation difficulty.

Methods and devices used to cancel non-linear capacitances in high power radio frequency (RF) switches manufactured in bulk complementary metal-oxide-semiconductor (CMOS) processes are disclosed. The methods and devices are also applicable to stacked switches and RF switches fabricated in silicon-on-insulator (SOI) technology.

This invention discloses a multi-level interleaved parallel Buck active rectifier magnetically coupled wireless power transfer system, with input power V in With the transmitter-side inverter S p1 -S p4 The input port is connected to the transmitter-side inverter S. p1 -S p4 The midpoints of the two bridge arms are connected to the input terminal of the transmitter-side compensation circuit, and the output terminal of the transmitter-side compensation circuit is connected to the transmitter coil L. p Connection, transmitting coil L p and receiving coil L s There is magnetic coupling between them, and the receiving coil L s The circuit is connected to the input of the receiving-side compensation circuit. One end of the output of the receiving-side compensation coil is connected to the AC port of the receiving-side multi-level interleaved parallel Buck active rectifier, and the DC side of the rectifier is connected to the load. This invention integrates multi-level and variable-level active rectifier technologies on the basis of an active rectifier, combining the interleaved parallel Buck topology with the switched capacitor topology. This achieves full-range impedance matching under low switching device voltage stress, while the interleaved parallel connection reduces output current ripple.

The application provides a switched capacitor circuit and a control method thereof. The switched capacitor circuit comprises an input terminal, an output terminal, a first phase circuit, a second phase circuit, and a charge pump formed by an inter-phase coupling circuit. The first phase circuit and the second phase circuit each comprise two-stage flying capacitors and a plurality of switching tubes, which are respectively connected to the input terminal, the output terminal, and a reference ground through the switching tubes. The inter-phase coupling circuit comprises two cross switching tubes, which cross-connect the plate of the first-stage flying capacitor of one phase and the plate of the second-stage flying capacitor of another phase. By controlling the conduction state of each switching tube, at least two different voltage conversion ratios are output. The embodiment of the application realizes the voltage conversion output of multiple ratios by the cross-coupled two-phase two-stage charge pump structure with a small number of switching tubes, reduces the voltage stress of the flying capacitor, simplifies the control logic, and reduces the cost of the charging scheme.

A passive low noise amplifier based on N-way transformer comprises an on-chip transformer composed of at least four-way switch capacitor in parallel and two amplifier feedback loops, wherein the positive input end and the negative output end of the on-chip transformer are connected with the first amplifier feedback loop respectively, the negative input end and the positive output end are connected with the second amplifier feedback loop respectively, the voltage is stacked by using the switch capacitor to realize passive voltage gain; the capacitor end and the switch end of the first amplifier feedback loop are connected with the positive input end and the negative output end of the on-chip transformer respectively, the capacitor end and the switch end of the second amplifier feedback loop are connected with the negative input end and the positive output end of the on-chip transformer respectively, and the multi-way capacitor is used to realize the center frequency adjustable and high-quality filtering. By using the N-way on-chip transformer based on switch capacitor in the differential structure, the chip area of the passive low noise amplifier is greatly reduced, and better compatibility and integration capability are achieved.