12 results about "Pulse shaping circuits" patented technology

A superconducting controller for superconducting quantum bits is used for implementing a high-fidelity quantum gate through magnetic flux driving. The controller comprises an inductor which forms an inductance loop and is used for being coupled with a low-mutual-inductance quantum bit inductor; and a pulse shaping circuit for applying a current pulse having a predetermined shape to the inductor. The pulse shaping circuit includes: a superconducting circuit for outputting a single flux quantum (SFQ) pulse; and a digital counting circuit for generating the shape of the current (flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current of the inductor by one SFQ pulse at a time.

Disclosed herein is a radiological instrument (100, 200, 300, 400, 600, 700, 800) comprising at least one pulse shaper circuit (102) configured for a direct conversion radiation detector (108). The at least one pulse shaper circuit comprises an amplifier (110). The pulse shaper further comprises: a feedback circuit (118) in parallel with the amplifier; a first switch unit (120) in series with the feedback circuit; a second switch unit (122) in parallel with the amplifier; a discrimination circuit (124) providing a discrimination signal (128) when the output exceeds a controllable signal threshold; and a control unit (124) for controlling the first switch unit and the second switch unit, wherein the control unit controls the second switch unit such that when the second switch unit is closed, a majority of the signal is integrated.

The invention discloses a neutron counter with accumulated pulse amplitude calibration. The neutron counter comprises a charge sensitive preamplifier, a pulse processing circuit and a master control counting circuit, an electric signal output by the detector is converted into a negative exponential pulse signal through the charge sensitive preamplifier, the negative exponential pulse signal is output to the pulse processing circuit and then counted through the main control counting circuit, and a count value is obtained. The pulse shaping circuit is additionally arranged, accumulated pulse signals are decomposed, the overall pulse passing rate is improved, the amplitude of the accumulated pulses is reduced through the subtracter, and miscounting caused by amplitude superposition is greatly reduced. The neutron counter is modulated by introducing the accumulation pulse amplitude calibration technology, pulse accumulation caused by a large number of neutron events in the monitoring process of the BNCT beam field is reduced, and the influence of reduction of the pulse passing rate and pulse miscounting on the final counting value is avoided. The performance of the neutron counter can be improved to a certain extent, so that the accuracy and reliability of BNCT beam monitoring are improved.

A multi-cycle path circuit includes a logic circuit, a memory, and an on-chip clock controller. The multi-cycle path circuit is configured to operate in a functional mode in which the logic circuit controls reading and / or writing of the memory, and in a full-speed test mode in which the logic circuit controls reading and / or writing of the memory. The invention uses a clock pulse shaping circuit to control a functional mode clock gating element and a clock divider to establish a multi-cycle phase relationship between a clock into the logic and a secondary cache DRAM memory timing path. It also ensures that the clock path into and out of the secondary cache DRAM is the same in the functional mode and the full-speed test mode to avoid hold and set timing conflicts between these modes.

The invention relates to the technical field of steep-edge pulse forming of pulse forming circuits, in particular to a steep-edge pulse energy forming method based on a pulse forming circuit, which comprises the following steps: charging an energy storage capacitor bank in a preset charging period, and performing initial gating on a forming network formed by PFN sections and Blumlein transmission line sections and an impedance gradient matching network; when the charging voltage reaches a target value, a shaping switch is triggered to output a test pulse, an incident component and a reflection component are obtained through an output sampling branch, and a reflection characteristic quantity is generated; the reflection characteristic quantity executes gating updating on matching network segment impedance configuration and forming network segment combination according to a minimum reflection criterion, and a retest pulse is triggered to obtain a retest reflection characteristic quantity; and when the remeasured reflection characteristic quantity is smaller than or equal to the reflection judgment threshold value, triggering working pulse output, and obtaining a steep edge pulse energy forming result at the load end. According to the invention, impedance matching consistency and waveform stability are improved through reflection quantity closed-loop gating.

The application provides a background signal processing circuit and method for a quadrupole mass spectrometer, which comprises a pre-signal processing circuit and a data acquisition circuit, the pre-signal processing circuit comprises an amplification circuit, a fast discrimination circuit, a pulse shaping circuit and a differential output circuit connected in series, the amplification circuit is connected with an electron multiplier, and weak current pulse signals output by the electron multiplier are input to the amplification circuit; the data acquisition circuit comprises an FPGA core circuit and a pulse receiving circuit, a network port communication circuit, a quadrupole power voltage control circuit and an SPI interface circuit connected with the FPGA core circuit respectively, the differential output circuit is connected with the pulse receiving circuit, and the SPI interface circuit is connected with the fast discrimination circuit. By improving the hardware circuit structure, the application can automatically filter various noise signals in front of pulse counting, ensure the accuracy of pulse counting, and solve many problems caused by background signal interference in mass spectrum.

A pulsed power generator includes a first plurality of capacitive stages coupled together. Each capacitive stage of the first plurality of capacitive stages includes a plurality of capacitors, one or more switches for erecting the plurality of capacitors, and a conductive band forming a loop around the plurality of capacitors. The conductive band is to carry a current between the plurality of capacitors and to couple adjacent capacitive stages of the first plurality of capacitive stages. The pulsed power generator includes a pulse shaping circuit at an output of the first plurality of capacitive stages.

A pulse shaping circuit (1) for shaping detector pulses in a spectrometer comprises a circuit input for receiving detector pulses from an analog ion detector, a flip-flop (10) for receiving detector pulses from the circuit input, a delay unit (20) for receiving an output pulse from the flip-flop and feeding a delayed output pulse to a reset input of the flip-flop, and a circuit output for providing the output pulse or the delayed output pulse to a counter. A minimum duration of a duration of the output pulse and a spacing between the output pulses is determined by the delay unit (20). The pulse shaping circuit (1) can comprise at least one Schmitt trigger (40).

The present application relates to the technical field of steep pulse shaping of pulse forming circuit, and particularly relates to a steep pulse energy shaping method based on a pulse forming circuit, which comprises: charging an energy storage capacitor group in a preset charging period, and initially gating a shaping network composed of PFN segments and Blumlein transmission line segments and an impedance gradient matching network; triggering a shaping switch to output a test pulse when a charging voltage reaches a target value, obtaining an incident component and a reflected component through an output sampling branch and generating a reflected characteristic quantity; the reflected characteristic quantity performs gating update on the matching network segment impedance configuration and the shaping network segment combination according to the minimum reflection criterion, and triggers a retest test pulse to obtain a retest reflected characteristic quantity; triggering a working pulse output when the retest reflected characteristic quantity is less than or equal to a reflected judgment threshold, and obtaining a steep pulse energy shaping result at a load end. The present application improves impedance matching consistency and waveform stability through reflected quantity closed-loop gating.

The invention relates to a narrow pulse laser driving system, which relates to the technical field of laser driving, and comprises a main control circuit module, a signal generation and pulse shaping circuit module and a driving circuit module, wherein the main control circuit module obtains a control instruction and then sends the control instruction to the signal generation and pulse shaping circuit module; the signal generation and pulse shaping circuit module responds to the control instruction, generates a trigger signal and sends the trigger signal to the driving circuit module; the driving circuit module drives the laser diode to work according to the trigger signal; and in the driving circuit module, a shaping buffer circuit shapes and buffers the trigger signal to obtain a driving signal, and the wide bandgap semiconductor power switch tube switches the on-off state of the wide bandgap semiconductor power switch tube according to the on-off of the driving signal so as to control the on-off of the working current flowing through the laser diode. According to the invention, ultra-narrow laser pulses with high peak power and high repetition frequency can be stably generated, and low heat consumption can be realized.

A circuit for level-shifting includes a pulse-shaper circuit comprising a first PMOS transistor; and a level-shifting circuit, where the first PMOS transistor is configured to precharge a node on a wordline generation path of the level-shifting circuit. Also, a method of level-shifting includes detecting, at a PMOS transistor of a pulse-shaping circuit, a falling edge of a clock signal; and generating, by the pulse-shaping circuit, a pulse to activate the PMOS transistor to precharge a node on a wordline generation path of a level-shifting circuit. Another circuit for level-shifting includes a first PMOS transistor; and a level-shifting circuitry, where the circuit is configured to generate a pulse on a second voltage domain from a clock signal on a first voltage domain.

A pulsed power generator includes a first plurality of capacitive stages coupled together. Each capacitive stage of the first plurality of capacitive stages includes a plurality of capacitors, one or more switches for erecting the plurality of capacitors, and a conductive band forming a loop around the plurality of capacitors. The conductive band is to carry a current between the plurality of capacitors and to couple adjacent capacitive stages of the first plurality of capacitive stages. The pulsed power generator includes a pulse shaping circuit at an output of the first plurality of capacitive stages.