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NAND memory and preparing method thereof

A technology of memory and peripheral devices, applied in the field of NAND memory forming 3D NAND flash memory and its preparation, can solve problems such as device performance degradation

Active Publication Date: 2018-02-23
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, NAND devices need to use a source layer instead of the silicon substrate, resulting in degraded device performance

Method used

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  • NAND memory and preparing method thereof
  • NAND memory and preparing method thereof
  • NAND memory and preparing method thereof

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Embodiment Construction

[0058] Embodiments of the invention will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, this invention may be embodied in various ways and should not be construed as limited to only the embodiments set forth herein. Like reference numerals refer to like elements throughout the specification.

[0059] It will be understood that, although the terms first, second etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0060]It will be understood that when an element ...

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Abstract

The invention relates to a NAND memory and a preparing method thereof. The NAND memory comprises a plurality of NAND strings and a monocrystalline silicon layer formed on the plurality of NAND strings. The monocrystalline silicon layer is in contact connection with the NAND strings. Each of the said NAND strings comprises a plurality of conductors / insulator lamination layers, a semi-conductor channel which extends at the vertical direction and traverses through the plurality of conductors / insulator lamination layers; a tunnel layer formed between the plurality of conductors / insulator lamination layers and the semi-conductor channel; and a memory cell layer formed between the tunnel layer and the plurality of conductors / insulator lamination layers. The invention is advantageous in that through separating the preparation of array devices and peripheral devices, it can be prevented that the producing of one device will affect that of the other device; the problem of the prior art that thetemperature is limited due to the fact that the producing of the latter layer is affected by the producing of the former layer can be resolved; good peripheral device performance can be obtained; asthe array device is superposed on the peripheral device, high device density can be realized.

Description

technical field [0001] The invention relates to a NAND memory and a preparation method thereof, in particular to a NAND memory forming a 3D NAND flash memory and a preparation method thereof. Background technique [0002] With the continued emphasis on highly integrated electronics, there is a continuing need for semiconductor memory devices that operate at higher speeds and lower power and have increased device densities. To this end, devices with smaller dimensions and multilayer devices with transistor cells arranged in horizontal and vertical arrays have been developed. 3D NAND is an emerging type of flash memory developed by the industry. It solves the limitations of 2D or planar NAND flash memory by stacking memory particles together. [0003] The planar structure of NAND flash memory is approaching its actual expansion limit, which brings severe challenges to the semiconductor memory industry. The new 3D NAND technology stacks multiple layers of data storage cells v...

Claims

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Application Information

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IPC IPC(8): H01L27/11524H01L27/11551H01L27/11563H01L27/1157H01L27/11529
CPCH10B41/41H10B43/00H10B41/20H10B41/35H10B43/35
Inventor 胡禺石吕震宇陈俊朱继锋陶谦杨士宁杨伟毅
Owner YANGTZE MEMORY TECH CO LTD
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