Semiconductor device and manufacturing method thereof

A semiconductor and conductor technology, applied in the field of NAND memory forming 3D NAND flash memory and its preparation, can solve problems such as device performance degradation

Active Publication Date: 2019-05-14
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In this way, NAND devices need to use a source layer instead of the silicon substrate, resulting in degraded device performance

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0059] Embodiments of the invention will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, this invention may be embodied in various ways and should not be construed as limited to only the embodiments set forth herein. Like reference numerals refer to like elements throughout the specification.

[0060] It will be understood that, although the terms first, second etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0061] It will be understood that when an element...

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Abstract

The invention relates to a NAND memory and a preparation method thereof. The NAND memory comprises: a silicon substrate; a plurality of peripheral devices; a plurality of NAND strings formed above the peripheral devices; and a single crystal silicon formed above the plurality of NAND strings layer, the monocrystalline silicon layer is in contact with the plurality of NAND strings, and one or more first interconnection layers are formed between the plurality of peripheral devices and the plurality of NAND strings. The present invention separates the manufacture of the array device from the peripheral device, thereby avoiding the mutual influence of the two devices on each other's manufacturing process, thus solving the problem in the prior art that the manufacturing of the latter layer is limited by the temperature after the manufacturing of the former layer. Thus, good peripheral device performance is obtained. In addition, since the array devices are stacked on the peripheral devices, a high device density is realized.

Description

technical field [0001] The invention relates to a NAND memory and a preparation method thereof, in particular to a NAND memory forming a 3D NAND flash memory and a preparation method thereof. Background technique [0002] With the continued emphasis on highly integrated electronics, there is a continuing need for semiconductor memory devices that operate at higher speeds and lower power and have increased device densities. To this end, devices with smaller dimensions and multilayer devices with transistor cells arranged in horizontal and vertical arrays have been developed. 3D NAND is an emerging type of flash memory developed by the industry. It solves the limitations of 2D or planar NAND flash memory by stacking memory particles together. [0003] The planar structure of NAND flash memory is approaching its actual expansion limit, which brings severe challenges to the semiconductor memory industry. The new 3D NAND technology stacks multiple layers of data storage cells v...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11578H01L27/1157H01L27/11551H01L27/11524
CPCH10B41/35H10B41/20H10B43/35H10B43/20
Inventor 吕震宇陈俊朱继锋胡禺石陶谦杨士宁杨伟毅
Owner YANGTZE MEMORY TECH CO LTD
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