Substrate/multi-chip-integrated large port interconnection chip and realization method thereof

Abstract

The invention provides a multilayer wiring substrate/multi-chip integration-based large port interconnection chip interconnection construction and physical realization method and relates to a multi-chip interconnection structure, a multi-chip interconnection structure construction method, multi-chip layout, substrate pin array partitioning and distribution, distribution of high-speed differential signal pin pairs, effective partition of substrate wiring and a partition method of the substrate wiring as well as a corresponding multi-chip interconnection chip device which are applicable to substrate integration. According to the invention, large-port interconnection chips can be effectively and equivalently realized based on substrate encapsulation size. Compared with a corresponding single-chip integration implementation method, the method of the invention can support multiple kinds of interconnection structures, and is compatible with interconnection sub-chips be of a variety of micro-system structures, can effectively utilize the characteristics of different functional interconnection sub-chips, and has better performance in implementation cost of the chips, scalability, flexibility, compatibility and the like; and at the same time, the method of the invention has lower requirements for manufacturing technology for realizing a required integrated circuit and can provide interconnection chips having different specifications and different number of ports, and can more flexibly adapt to market demands.

Description

technical field [0001] The present invention relates to a construction and physical realization method of a large-port interconnection chip using multi-layer wiring substrate and multi-chip integration technology, and relates to a multi-chip interconnection network system structure and construction method suitable for substrate integration, and a corresponding substrate Physical implementation methods such as internal multi-chip interconnection structure, multi-chip layout, substrate metal pin array division, high-speed differential signal pair pin assignment, substrate wiring area division, and corresponding multi-chip interconnection chip devices based on substrate integration. Background technique [0002] The interconnection network structure and interconnection chips play an important role in high-performance computer systems, and are one of the key factors that determine the overall performance, scalability, and cost of the system. In order to build a large-scale compu...

AI Technical Summary

Problems solved by technology

[0014] In order to solve the scalability of the above-mentioned single-chip integrated large-port interconnection chips, which are limited by chip area, chip power consumption, chip cost, and integrated circuit manufacturing capabilities, the present invention proposes a multi-chip integration based on multi-layer wiring substrates. , large-port interconnect chip interconnection construction and physical implementation method

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