107 results about "Row-major order" patented technology

The present invention involves the dynamic loading and unloading of relatively small text-string vocabularies within a speech recognition system. In one embodiment, sub-databases of high likelihood text strings are created and prioritized such that those text strings are made available within definable portions of computer-transcribed dictations as a first-pass vocabulary for text matches. Failing a match within the first-pass vocabulary, the voice recognition software attempts to match the speech input to text strings within a more general vocabulary. In another embodiment, the first-pass text string vocabularies are organized and prioritized and loaded in relation to specific fields within an electronic form, specific users of the system and/or other general context-based, interrelationships of the data that provide a higher probability of text string matches then those otherwise provided by commercially available speech recognition systems and their general vocabulary databases.

A method of reducing spatial noise in an image. Low-pass (smoothing) filters are calculated simultaneously from three successive image rows. Three blocks (m1, m2, m3) are associated with the three successive image rows, and the blocks are processed in row-major order. This implementation is applicable to both luminance and chrominance. The number of smoothing parameters is reduced to one. The technique is applicable to both luminance and chrominance. Directional mapping is used. Extension of the technique to spatial filtering using a 5×5 neighborhood (using five successive image rows) is described. Embodiments of the method using the MMX instruction set are described.

A memory device and techniques for its operation are presented. After operating on power received from a host, the memory device determines that it is no longer receiving host power and, in response, activates a power source on the memory device itself. Using this reserve power, the memory device can then perform data management operations. The techniques can also be applied to a digital appliance having a non-volatile memory. The memory device or digital appliance can prioritize its memory management operation during the host/user operating window based on the ability to perform these operations outside of the host/user operating window. Additionally, in a data write operations, where the memory device receives data from a host, stores the data in volatile memory, and then writes the data into the non-volatile memory, the memory device sends the host an acknowledgment of the data having been written into the non-volatile memory after it has been store in the volatile memory, but before the write into the non-volatile memory is complete.

To assure the multiprocessing performance of CPU on a microprocessor, the invention provides a method of memory mapping for multiple concurrent processes, thus minimizing cache thrashing. An OS maintains a management (mapping) table for controlling the cache occupancy status. When a process is activated, the OS receives from the process the positional information for a specific part (principal part) to be executed most frequently in the process and coordinates addressing of a storage area where the process is loaded by referring to the management table, ensuring that the cache address assigned for the principal part of the process differs from that for any other existing process. Taking cache memory capacity, configuration scheme, and process execution priority into account when executing the above coordination, a computer system is designed such that a highest priority process can have a first priority in using the cache.

The present invention provides a system, computer program product and a computer implemented method for prioritizing code fragments based on the use of a software oracle and on a correlation between the executed code fragments and the output they produce. Also described is a computer-implemented method generates additional user inputs based on execution information associated with path constraints and based on information from the oracle. Advantageously, the embodiment is useful in a test generation tool that generated many similar inputs when a failure-inducing input is found, in order to enhance fault localization. Further, described is a computer-implemented flow for extending the existing idea of concolic testing to applications that interact with persistent state.

A replication priority queuing system prioritizes replication requests in accordance with a predetermined scheme. An exemplary system includes a Replication Priority Queue Manager that receives update requests and assigns a priority based upon business rules and stores the requests in associated storage means. A Replication Decision Engine retrieves the requests from storage and determines a destination for the update based upon predetermined replication rules, and sends the update to the destination.

A system is configured to modify a website to optimize the website for an organic search of a topic. The system includes a data management module configured to receive search terms for the topic, receive related terms to the search terms for the topic, and receive website input data. The system also includes a scanning module configured to scan and index web pages and web objects in the website and identify a subset of web pages and web objects associated with the search terms and the related terms. The system also includes an optimizing module configured to process the subset of web pages and web objects from the website by prioritizing the subset of web pages and web objects or measuring a metric with respect to the subset of web pages and web objects. The search terms and related terms are deployed into the subset of web pages and web objects on the website based on the processing.

A development and runtime framework for applications that execute in real-time operating systems. Application development is enhanced through simple instructions that allow a programmer to declare functions and sets of functions as tasks and supertasks, respectively, and manage the execution of functions, tasks and supertasks with priorities. A compiler or pre-processor provides tools for generating the code for tasks and supertasks, and the management code for managing execution. Function calls may be made directly to functions within supertasks via respective entrypoints, and the tasks are managed based on the functions being invoked. Within a supertask, a higher priority function may be runnable while a lower priority function of that supertask is suspended. A cookie is used to recognize when a register update for a supertask may be omitted, enabling more efficient context switching.

A system and method for searching the Internet is presented wherein the search results are ordered and selected using one or more preference tools. One such tool consists of the user defining a reference index number that is employed to prioritize and re-rank at least some of the sites obtained by the search, comparing each site's parameters to the reference index number. Each index number includes several parameters in a preset order, each parameter being assigned a quantized relevance based on particular search criteria. Another tool makes use of at least one bundle of websites having particular user-settings designating credibility or trustworthiness. Websites from the search results are then accepted or ordered based on the contents of the bundles. Other tools adjust search criteria based on a desired number of search results and separate browser cookies into (1) those personally trusted and (2) all other cookies that are routinely purged.

The present invention is directed toward methods and apparatus for packet transmission scheduling in a data communication network. In one aspect, received data packets are assigned to an appropriate one of a plurality of scheduling heap data structures. Each scheduling heap data structure is percolated to identify a most eligible data packet in each heap data structure. A highest-priority one of the most-eligible data packets is identifying by prioritizing among the most-eligible data packets. This is useful because the scheduling tasks may be distributed among the hierarchy of schedulers to efficiently handle data packet scheduling. Another aspect provides a technique for combining priority schemes, such as strict priority and weighted fair queuing. This is useful because packets may have equal priorities or no priorities, such as in the case of certain legacy equipment.

In an automated library, data cartridges, such as magnetic tape cartridges, are stored in storage cells and accessed by data storage drives. An accessor with a gripper transports cartridges between storage cells and storage drives. Cartridges are prioritized according to their relative importance. A processor manages the placement of the cartridges in cells by having higher priority cartridges stored closer to the front of multi-cartridge cells than cartridges with a lower priority. Cartridges with a higher priority may also be stored closer to a storage drive than cartridges with a lower priority. A pusher may be used to push cartridges towards the front of multi-cartridge cells with an empty position to enable the gripper to reach the front cartridge.

A register in the control unit of the CPU that is used to keep track of the address of the current or next instruction is called a program counter. In an SMT system having two threads, the CPU has program counters for both threads and means for alternately selecting between program counters to determine which thread supplies an instruction to the instruction fetch unit (IFU). The software for the SMT assigns a priority to threads entering the code stream. Instructions from the threads are read from the instruction queues pseudo-randomly and proportional to their execution priorities in the normal power mode. If both threads have a lowest priority, a low power mode is set generating a gated select time every N clock cycles of a clock when valid instructions are loaded. N may be adjusted to vary the amount of power savings and the gated select time.

Systems and methods for use with a mark reader that reduce the trigger-to-decode response time by prioritizing images to be decoded based on the likelihood of a successful decode are provided. A reader attempts to decode a priority image(s) first to avoid attempting to decode images that are less likely than other images to be successfully decoded. Images are rated based on feature attributes, and then prioritized for decoding. Image feature attributes are correlated with parameter groups, and the parameter groups are prioritized for use in subsequent image acquisitions.

Techniques are disclosed for converting data into a format tailored for efficient multidimensional fast Fourier transforms (FFTS) on single instruction, multiple data (SIMD) multi-core processor architectures. The technique includes converting data from a multidimensional array stored in a conventional row-major order into SIMD format. Converted data in SIMD format consists of a sequence of blocks, where each block interleaves s rows such that SIMD vector processors may operate on s rows simultaneously. As a result, the converted data in SIMD format enables smaller-sized 1D FFTs to be optimized in SIMD multi-core processor architectures.

Described herein is a method for scheduling memory usage of a workload, the method comprising: receiving the workload, wherein the workload includes a plurality of jobs; determining a memory requirement to execute each of the plurality of jobs; arranging the plurality of jobs in an order of the memory requirements of the plurality of jobs such that the job with the largest memory requirement is at one end of the order and the job with the smallest memory requirement is at the other end of the order; assigning in order a unique priority to each of the plurality of jobs in accordance with the arranged order such that the job with the largest memory requirement is assigned the highest priority for execution and the job with the smallest memory requirement is assigned the lowest priority for execution; and executing the workload by concurrently executing the jobs in the workload in accordance with the arranged order of the plurality of jobs and the unique priority assigned to each of the plurality of jobs.