193results about How to "Lower thermal budget" patented technology

A die bonding apparatus and a die bonding method are provided, which are capable of simultaneously bonding a plurality of dies from a first placement area onto a substrate disposed on a second placement area. The die bonding apparatus includes a die sucking device which is movably located above the first placement area and a second placement area. The die sucking device includes a plurality of nozzles. The nozzles can suck the dies disposed on the first placement area, and then simultaneously bond the dies onto the substrate.

The invention provides a semiconductor structure with a channel stress layer and a forming method thereof. The semiconductor structure comprises a substrate, a grid dielectric layer formed on the substrate, a grid formed on the grid dielectric layer, a source and a drain which are formed in the substrate and positioned on two sides of the grid, one or more side walls formed on the grid dielectric layer and two sides of the grid, and an embedded stress layer which is formed below the grid and is positioned in the substrate. Due to the embedded stress layer which is arranged in a channel below the grid, the mobility of a carrier can be effectively improved; therefore, the driving current of a transistor is improved. In addition, lower thermal budget is present in the process flow of forming the embedded stress layer; therefore, the semiconductor structure contributes to keeping a higher stress level in the channel area. Moreover, besides advantage of stress, the embedded stress layer in the channel can reduce boron (B) diffusion / intrusion in heavy-doped source and drain regions.

A method for depositing an amorphous carbon layer on a substrate includes the steps of positioning a substrate in a chamber, introducing a hydrocarbon source into the processing chamber, introducing a heavy noble gas into the processing chamber, and generating a plasma in the processing chamber. The heavy noble gas is selected from the group consisting of argon, krypton, xenon, and combinations thereof and the molar flow rate of the noble gas is greater than the molar flow rate of the hydrocarbon source. A post-deposition termination step may be included, wherein the flow of the hydrocarbon source and the noble gas is stopped and a plasma is maintained in the chamber for a period of time to remove particles therefrom.

A method for forming a thick bottom oxide in the bottom of a trench used in a vertical MOSFET. Initially, an n-type substrate has an n-type epitaxial layer grown thereon. A top portion of the n-type epitaxial layer is implanted with p-type dopants to provide a p-layer. A trench is then etched into the p- and n-type epitaxial layer. A high density plasma chemical vapor deposition (HDPCVD) process is used to either partially or fully fill the trench. Any oxide on the top surface of the p-layer is then removed, such as by using a chemical mechanical polishing step. Then, an isotropic etching step, such as a wet etch, is used to remove the silicon dioxide from the trench, while leaving a thick bottom oxide at the bottom of the trench. The HDPCVD process utilizes minimal thermal budget to form the thick bottom oxide.

The invention discloses a laser annealing device and an annealing method thereof. The laser annealing device comprises a laser light source system, a laser adjustment system, a temperature monitoring system and a central control system, and is characterized in that the laser adjustment system is connected with the laser light source system and located above a silicon wafer, the temperature monitoring system is located above the silicon wafer and performs real-time measurement on the temperature of a light spot at the surface of the silicon wafer, and the central control system is connected with the laser light source system, the laser adjustment system, the temperature monitoring system and a slide holder. The laser annealing device provides laser light with different wavelengths through setting a plurality of independent lasers so as to perform joint annealing on the silicon wafer and performs annealing on the silicon wafer through selecting optimal process parameter sets, and the laser light with different wavelengths are complementary, thereby not only achieving an optimal annealing temperature, but also well suppressing an image effect at the surface of the silicon wafer; and the laser annealing device improves the uniformity and controllability of annealing through a feedback mechanism of the temperature monitoring system and an adjustment mechanism of the central control system, thereby reducing the heat budget, reducing heat diffusion and improving the process adaptability of the annealing device.