Self-aligning metal silicide technology
A metal silicide, self-aligned technology, used in electrical components, semiconductor/solid-state device manufacturing, circuits, etc.
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[0029] Please refer to FIG. 3 to FIG. 5. FIG. 3 to FIG. 5 are process schematic diagrams of applying the salicide process of the present invention to MOS transistors. As shown in FIG. 3, first, a substrate 100, such as a wafer or SOI substrate, is provided, and the surface of the substrate 100 has at least one silicon composed of monocrystalline silicon, polycrystalline silicon or epitaxial silicon. Conductive layer (not shown). Wherein, the silicon conductive layer can include gate, source / drain regions, word lines or resistors for different product requirements and process designs. In the preferred embodiment of the present invention, MOS The gate structure 102 and source / drain regions 112 of the transistor are described. As shown in FIG. 3, the gate structure 102 includes a gate dielectric layer 102 and a gate 104. The gate dielectric layer 102 is made of a dielectric material such as silicon dioxide, and the gate 104 is doped It is made of conductive materials such as doped po...
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