Supply voltage based analog pre-distortion (APD) circuit for power amplifier

Abstract

A supply voltage based analog pre-distortion (APD) circuit for a power amplifier is disclosed. In an exemplary aspect, a power amplifier is in a front-end module (FEM) of a radio frequency (RF) transceiver. The APD circuit operates within the amplifier chain to normalize a distortion profile of the amplifier chain based on the supply voltage. A baseband processor (BBP) performs digital pre-distortion (DPD) on a signal transmitted from the BBP to the FEM. As a result of the APD circuit, the DPD may take a normalized profile of FEM, allowing for simplification of the DPD despite the amplifier chain introducing many possible distortions based on the supply voltage.

Description

[0001] Priority application

[0002] This application is related to U.S. Provisional Patent Application No. 63 / 385,343, filed on November 29, 2022, entitled “SUPPLY VOLTAGE BASED ANALOG PREDISTORTION (APD) CIRCUIT FOR POWER AMPLIFIER”, the contents of which are incorporated herein by reference in their entirety.

[0003] This application is related to U.S. Provisional Patent Application No. 63 / 354,279, filed on June 22, 2022, entitled “FEMs WITH VCC DETECTION-BASED ANALOG-ASSISTED LINEARIZATION FOR DYNAMIC APT”, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0004] The techniques of this disclosure generally relate to providing linear operation for a power amplifier in a transmitter chain. Background Art

[0005] In modern society, computing devices abound, and more specifically, mobile communication devices are becoming increasingly common. The popularity of these mobile communication devices is driven in part by the many features currently enabled on such devices. The increase in processing power in such devices has meant that mobile communication devices have evolved from pure communication tools to complex mobile entertainment centers, enabling an enhanced user experience. With the advent of a variety of features available for such devices, pressure has increased to find ways to increase the communication bandwidth available for supplying data to mobile communication devices. This pressure has led to a trend towards higher frequencies in evolving cellular standards. These higher frequencies put additional pressure on power amplifiers within mobile communication devices to maintain linear operation over a wide frequency range. Therefore, there is an opportunity for innovation in helping power amplifiers improve linear operation, especially at high frequencies. Summary of the invention

[0006] Various aspects disclosed in the specific embodiments include a supply voltage based analog predistortion (APD) circuit for a power amplifier. In an exemplary aspect, the power amplifier is in a front end module (FEM) of a radio frequency (RF) transceiver. The APD circuit operates within an amplifier chain to normalize the distortion distribution curve of the amplifier chain based on the supply voltage. A baseband processor (BBP) performs digital predistortion (DPD) on a signal sent from the BBP to the FEM. As a result of the APD circuit, the DPD can assume the normalized distribution curve of the FEM, thereby allowing simplification of the DPD despite the fact that the amplifier chain introduces many possible distortions based on the supply voltage.

[0007] In this regard, in one aspect, a transmission chain is disclosed. The transmission chain includes a power amplifier that applies distortion to a signal to be transmitted based on a supply voltage provided to the power amplifier. The transmission chain also includes an APD circuit coupled to the power amplifier. The APD circuit is configured to normalize the distortion applied by the power amplifier on the signal.

[0008] In another aspect, a method for providing predistortion to a power amplifier is disclosed. The method includes receiving a signal to be transmitted at the power amplifier. The method also includes providing an APD to the power amplifier based on a supply voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 is a block diagram of a power amplifier within a transmitter chain, the power amplifier experiencing variable distortion depending on the supply voltage;

[0010] Figure 2 is a graph of the distortion range of a power amplifier for different supply voltages over a range of input powers (Pin), highlighting the need for pre-distortion;

[0011] Figure 3 is based on Figure 2 A graph showing the tightening distortion range of power amplifiers of different mobile terminals of the system after analog pre-distortion (APD) relative to Pin;

[0012] Figure 4 is a block diagram of an APD system for a power amplifier, showing supply voltage detection and APD correction;

[0013] Figure 5 is similar to Figure 4 A block diagram of an APD system of the type shown in FIG. 1 , but with multiple look-up tables (LUTs) to assist in pre-distortion;

[0014] Figure 6 is similar to Figure 4Block diagram of an APD system based on the APD system of FIG. 1 , but with an equation-driven APD controller to avoid the use of a LUT.

[0015] Figure 7 is a block diagram illustrating a varactor for assisting in applying an APD in a transmitter chain in an exemplary aspect of the present disclosure;

[0016] Figure 8 is a block diagram showing how APDs may be diffused across stages within a power amplifier, particularly across hybrid complementary metal oxide semiconductor (CMOS) stages and bipolar material portion amplifiers;

[0017] Fig. 9 is a block diagram of an alternative exemplary aspect in which all adjustments are calculated in the CMOS portion of the hybrid amplifier, but adjustments are made in both the CMOS portion and the bipolar material portion using two supply voltage detectors;

[0018] Fig.10 is a block diagram of an alternative exemplary aspect in which gain distortion is addressed along with phase distortion;

[0019] Fig.11 is a block diagram of the transmitter chain with additional details on how the sampling of the supply voltage is performed to provide measurements of the APD;

[0020] Fig.12 Shows the Fig.13 The transmitter chain identifies two write signals of the sampling trigger;

[0021] Fig.13 is used Fig.12 The transmitter chain of the sampling trigger;

[0022] Fig.14 is a transmitter chain that uses additional information from a baseband processor (BBP) to evaluate the supply voltage when determining the APD to apply; and

[0023] Fig.15 is a block diagram of a mobile terminal, which may include a Figure 2-14 Pre-distortion system. DETAILED DESCRIPTION

[0024] The embodiments set forth below represent information necessary to enable those skilled in the art to practice the embodiments and to illustrate the best mode for practicing the embodiments. After reading the following description with reference to the accompanying drawings, a person of ordinary skill in the art will understand the concepts of the present disclosure and will appreciate the applications of these concepts not specifically set forth herein. It should be understood that these concepts and applications are within the scope of the present disclosure and the appended claims.

[0025] It will be appreciated that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish different elements. For example, without departing from the scope of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. As used herein, the term "and / or" includes any and all combinations of one or more items in the associated listed items.

[0026] It should be understood that when an element such as a layer, region or substrate is referred to as "on another element" or "extending to" another element, it can be directly on another element or directly extend to another element, or there can also be an intermediate element. On the contrary, when an element is referred to as "directly on another element" or "directly extending to another element", there is no intermediate element. Similarly, it should be understood that when an element such as a layer, region or substrate is referred to as "above another element" or "extending above another element", it can be directly above another element or directly extend above another element, or there can also be an intermediate element. On the contrary, when an element is referred to as "directly above another element" or "directly above another element" extends, there is no intermediate element. It will also be understood that when an element is referred to as "connected" or "coupled" to another element, it can be directly connected or coupled to another element, or there can be an intermediate element. On the contrary, when an element is referred to as "directly connected" or "directly coupled" to another element, there is no intermediate element.

[0027] Relative terms such as "below" or "above" or "up" or "lower" or "horizontal" or "vertical" may be used herein to describe one element, layer or region's relationship to another element, layer or region as illustrated in the figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

[0028] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a", "an", and "the" are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that when used herein, the terms "comprises", "comprising", "includes", and / or "including" specify the presence of the features, integers, steps, operations, elements, and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups thereof.

[0029] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It will be further understood that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and relevant prior art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0030] Various aspects disclosed in the specific embodiments include a supply voltage based analog predistortion (APD) circuit for a power amplifier. In an exemplary aspect, the power amplifier is in a front end module (FEM) of a radio frequency (RF) transceiver. The APD circuit operates within an amplifier chain to normalize the distortion distribution curve of the amplifier chain based on the supply voltage. A baseband processor (BBP) performs digital predistortion (DPD) on a signal sent from the BBP to the FEM. As a result of the APD circuit, the DPD can assume the normalized distribution curve of the FEM, thereby allowing simplification of the DPD despite the fact that the amplifier chain introduces many possible distortions based on the supply voltage.

[0031] Before discussing exemplary aspects of the present disclosure, reference is made to Figure 1 and 2 A brief overview of some of the challenges encountered by conventional devices is provided. Figure 3 A discussion of exemplary aspects of the disclosure begins.

[0032] In this regard, Figure 1 1 is an exemplary power amplifier stage 100 that may be present in a transmission chain. More specifically, the power amplifier stage 100 may have an input 102 having a direct current (DC) blocking capacitor 104. The signal reaches the input of the power amplifier 106 through the DC blocking capacitor 104. The power amplifier 106 may include a bipolar transistor (shown) or a complementary metal oxide semiconductor (CMOS) transistor (not shown). The power amplifier 106 may also receive a bias signal at the input through a bias resistor 108. The output of the power amplifier 106 may be coupled to an acoustic filter 110 and a power supply voltage (VCC) 112. The acoustic filter 110 may have a varying impedance that varies with power level. The capacitor 114 is effectively formed between the base and collector of the transistor within the power amplifier 106. The capacitance of this capacitor 114 may vary with the power supply voltage 112. Such variations will cause distortion of the output signal variations. Additional distortion may be caused by impedance fluctuations of the acoustic filter 110. This distortion will be primarily in the phase of the output signal, but some distortion may occur in the amplitude of the output signal.

[0033] The distortion varies not only with the supply voltage, but also with the input power (ie, the power present at the input 102), as Figure 2, where graph 200 shows phase distortion for three different supply voltages (VCC1-VCC3) in three curves 202(1)-202(3). Specifically, the y-axis 204 is distortion and the x-axis 206 is input power (Pin) at the input 102.

[0034] In general, distortion caused by power variation is addressed by providing digital pre-distortion (DPD) in the baseband processor (BBP). When the supply voltage is constant, a relatively small number of DPD coefficients may be required. However, when the supply voltage is constant, it must be set high enough to accommodate any power peaks, which results in inefficiency at lower power levels. This inefficiency leads to the introduction of fast average power tracking (APT) circuits, which can vary the supply voltage in each time slot and / or even the supply voltage for each symbol. However, each supply voltage will require its own set of DPD coefficients. As the granularity of the supply voltage increases, the burden on the memory on the BBP increases. This burden means increased cost, increased space consumption, and possible increased delays.

[0035] Exemplary aspects of the present disclosure help relieve the burden of the BBP by adding an APD circuit to the power amplifier stage in the transmitter, which normalizes the distortion caused by the varying supply voltage. When the distortion profile caused by the varying supply voltage is normalized, the BBP can provide a DPD that matches the normalized profile, thereby avoiding the need for numerous sets of DPD coefficients in the BBP, such as Figure 3 300. Specifically, graph 300 shows curves 202(1) and 202(3) being distorted by the APD circuit to more closely approximate curve 202(2), thereby allowing the BBP to have only a DPD coefficient for the general shape of curve 202(2).

[0036] Although the distortion is primarily phase distortion, both phase distortion and gain distortion can be corrected with the APD circuits of the present disclosure. In addition, the APD circuits of the present disclosure can be extended across multiple stages (e.g., driver stage and output stage) or across technologies (e.g., bipolar transistor portion and CMOS transistor portion). The APD circuits can adjust bias signals or otherwise utilize modulation operations such as varactors. Similarly, knowledge of the supply voltage can be obtained through various sensors, signals from the BBP, and / or at certain timing intervals. All of these aspects are discussed in more detail below.

[0037] In this regard, Figure 4A transmit chain 400 is shown that includes a BBP 402 and an amplifier chain 404. The BBP 402 includes a DPD circuit 406 having a memory 408 associated therewith that stores DPD coefficients. The memory 408 can be relatively small because the BBP 402 can use a small set of DPD coefficients. The BBP 402 generates a signal 410 to be transmitted and a control signal 412 for a power tracking circuit 414 in the amplifier chain 404. In an exemplary aspect, the power tracking circuit 414 can be an APT circuit and can be referred to as a fast APT, a dynamic APT, a symbol tracking circuit, or even a sub-symbol tracking circuit. The power tracking circuit 414 uses a known voltage level, such as Vbat, and converts this voltage level to a desired supply voltage (VCC) based on the control signal 412. The supply voltage is provided to an output 418 of a power amplifier 420 through an impedance 416. The output 418 is coupled to an antenna (not shown) through a filter 422, which can be an acoustic filter.

[0038] The amplifier chain 404 may have a plurality of amplifier stages, including a power amplifier 420 (which may be an output stage amplifier) ​​and a driver stage amplifier 424. A blocking capacitor 426 may separate the amplifiers 420, 424. Additional transmit circuitry (e.g., up-conversion circuitry, switches, filters, etc.) 428 may also be present in the amplifier chain 404. Further, the amplifier chain 404 may include a digital input / output (I / O) 430 that receives additional signals or information from the BBP 402, such as mode information, channel information, etc. The digital I / O 430 may also be associated with a control circuit 432. Alternatively, the control circuit 432 may be incorporated into the digital I / O 430.

[0039] As yet another option, the control circuit 432 may be incorporated into the APD circuit 434. The APD circuit 434 receives signals from one or more supply voltage detectors 436(1)-436(N) and generates control signals that may modify the operation of one or more of the amplifiers 420, 424 to apply distortion to normalize the overall distortion of the amplifier chain 404 to one of several (e.g., one) predetermined distortion distribution curves.

[0040] Figure 5 A transmit chain 500 is shown highlighting one way in which the APD circuit 434 can determine what control signal to generate. Specifically, the APD circuit 434 can have an associated memory 502 storing a lookup table (LUT) 504 having a plurality of pages thereon corresponding to the power levels and detected supply voltages. Based on these inputs and optionally inputs from the control circuit 432, the appropriate entry in the LUT 504 is selected and used.

[0041] Alternatively, if Figure 6 As shown, the transmit chain 600 may have an APD circuit 434 that includes an equation-based control circuit 602 that calculates an appropriate signal for each detected supply voltage. This approach may avoid large LUTs, but may require additional computational circuitry.

[0042] Although transmit chain 400 relies on supply voltage detectors 436(1)-436(N) and transmit chains 500, 600 rely on supply voltage detector 436, Figure 7 Amplifier chain 404 of transmit chain 700 in may also receive supply voltage information from the BBP in signal 702 passing through digital I / O 430. In some aspects, the information in signal 702 may match the information in control signal 412. In addition, Figure 7 It is shown that the signal generated by the APD circuit 434 can adjust the varactor 704 which can operate with the interstage circuit 706 to provide the desired APD. Note that the varactor 704 can be a set of parallel capacitors where selected capacitors are switched in and out to provide the desired capacitance or other variable capacitor structure.

[0043] Figure 8 800 . More details on possible implementations are provided in , where the transmit chain 800 is implemented between different technologies. Specifically, the front end portion 802 of the amplifier chain 404 is implemented in CMOS and can operate in the digital domain. The back end portion 804 can be implemented in a bipolar material (e.g., gallium arsenide (GaAs)) and can operate in the analog domain. The APD circuit 434 can use a digital-to-analog converter (DAC) 806 to convert the digital signal into an analog signal to control the varactor 704. Similarly, a varactor 808 can be implemented in the back end portion 804. The varactor 808 can be controlled by a regulator 810, which in turn receives an analog signal from a DAC 812 coupled to the APD circuit 434. The varactor 808 can be coupled to a node 814 at the input of the power amplifier 420 (e.g., at the base of a bipolar transistor within the power amplifier 420).

[0044] Alternatively, the supply voltage detectors 436(1)-436(N) may be split across technologies, e.g. Fig. 9 900 in FIG. 1 . More specifically, supply voltage detector 436(1) may be implemented in CMOS and provide a digital signal to APD circuit 434, which controls varactor 704 as previously described. Alternatively, supply voltage detector 436(2) may be implemented in bipolar technology and use APD circuit 902 to control varactor 808.

[0045] The above discussion does not specify which types of distortion are corrected. It should be understood that the APD of the present disclosure can correct phase distortion (i.e., so-called amplitude modulation (AM) to phase modulation (PM) (AM-PM) distortion) or gain distortion (i.e., so-called AM to AM (AM-AM) distortion) or both. Fig.10 A transmit chain 1000 is shown that explicitly illustrates the latter possibility. Specifically, the APD circuit 434 may include an AM-PM circuit 1002 that controls the varactor 704 via the DAC 806. The APD circuit 434 may also include an AM-AM circuit 1004 that controls the gain of the driver amplifier 424. Likewise, the APD circuit 902 may include an AM-PM circuit 1006 that controls the varactor 808 and an AM-AM circuit 1008 that controls the gain of the power amplifier 420. Although both APD circuits 434, 902 are shown with both AM-PM and AM-AM circuits, it should be appreciated that one APD circuit 434, 902 may correct for phase while the other APD circuit corrects for gain, or one APD circuit 434, 902 may correct for both phase and gain while the other corrects only for phase (or only for gain). Likewise, although shown as two separate APD circuits 434, 902, it should be appreciated that in some aspects there may be a single APD circuit implemented only in CMOS or only in bipolar technology. Likewise, the APD circuit 434, 902 may use a LUT or equations as needed or desired.

[0046] Thus far, the present disclosure has remained silent on the manner in which the supply voltage detectors 436(1)-436(N) operate. While the supply voltage detectors 436(1)-436(N) may be continuous, it is more likely that the supply voltage detectors 436(1)-436(N) will sample periodically, such as once per time slot or once per symbol, potentially depending on how often the supply voltage changes (i.e., how quickly the power tracking circuit 414 changes VCC may determine how often VCC needs to be sampled). Fig.11 One possibility for a transmit chain 1100 is shown with a sampling circuit 1102 that uses information from an edge detector 1104 and a delay circuit (not shown) to trigger the supply voltage detector 436. Although shown before the driver amplifier 424, the edge detector 1104 may be positioned between the amplifiers 420, 424.

[0047] Fig.12 Signals 1202 and 1204 are shown with per-slot and per-symbol triggering edges, respectively. Signals 1202, 1204 would be signals generated by power tracking circuit 414 (sometimes also referred to as a power management integrated circuit (PMIC)), and the edges would be what is detected by supply voltage detector 436.

[0048] When signals 1202, 1204 are combined with transmit chain 1100, Fig.13 The result is shown in transmit chain 1300 in FIG. 13. Note that the flip-flops may also be provided directly from BBP 402.

[0049] Note that the information in signal 702 may also be compared to information from supply voltage detector 436 to see if power tracking circuit 414 is undershooting or overshooting relative to the instructions from BBP 402, such as Fig.14 As shown, the transmission chain 1400 includes a comparison circuit 1402 that compares the decoded target supply voltage with the measured supply voltage.

[0050] It should be noted that aspects of the present disclosure may be mixed and matched, as many elements are not mutually exclusive. For example, supply voltage detectors 436(1)-436(N) may all be CMOS detectors or all be bipolar detectors. Other variations not shown or specifically described are still within the scope of the present disclosure.

[0051] refer to Fig.15 , the concepts described above can be implemented in various types of user elements 1500 such as mobile terminals, smart watches, tablet computers, computers, navigation devices, access points, and similar wireless communication devices that support wireless communications such as cellular, wireless local area network (WLAN), Bluetooth, and near field communications. The user element 1500 will generally include a control system 1502, a BBP 1504, a transmit circuit 1506 (which may include any of the transmit chains 400, 500, 600, 700, 800, 900, 1000, 1100, 1300, or 1400 described above), a receive circuit 1508, an antenna switching circuit 1510, a plurality of antennas 1512, and a user interface circuit 1514. In a non-limiting example, as an example, the control system 1502 may be a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). In this regard, the control system 1502 may include at least a microprocessor, an embedded memory circuit, and a communication bus interface. Receive circuitry 1508 receives radio frequency (RF) signals from one or more base stations via antenna 1512 and through antenna switching circuitry 1510. The low noise amplifiers and filters of receive circuitry 1508 cooperate to amplify and remove broadband interference from the received signals for processing. Down-conversion and digitization circuitry (not shown) then down-converts the filtered received signals to intermediate or baseband frequency signals, which are then digitized into one or more digital streams using an analog-to-digital converter (ADC).

[0052] The BBP 1504 processes the digitized received signal to extract the information or data bits transmitted in the received signal. Such processing typically includes demodulation, decoding, and error correction operations, which will be discussed in more detail below. The BBP 1504 is typically implemented in one or more digital signal processors (DSPs) and ASICs.

[0053] For transmission, the BBP 1504 receives digitized data, which may represent voice, data, or control information, from the control system 1502, and the BBP encodes the digitized data for transmission. The encoded data is output to the transmit circuit 1506, where the DAC converts the digital encoded data to an analog signal, and the modulator modulates the analog signal onto a carrier signal at one or more desired transmit frequencies. The power amplifier amplifies the modulated carrier signal to a level suitable for transmission and delivers the modulated carrier signal to the antenna 1512 through the antenna switching circuit 1510. Multiple antennas 1512 and duplicate transmit circuits 1506 and receive circuits 1508 can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0054] It should also be noted that the operation steps described in any of the exemplary aspects herein are described in order to provide examples and discussions. The described operations can be performed in a large number of different orders other than the order shown. In addition, the operations described in a single operation step can actually be performed in many different steps. In addition, one or more operation steps discussed in the exemplary aspects can be combined. It should be understood that it will be readily apparent to those skilled in the art that the operation steps illustrated in the flow chart can be subject to a variety of different modifications. Those skilled in the art will also understand that any of a variety of different technologies and techniques can be used to represent information and signals. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.

[0055] The previous description of the disclosure is provided so that any person skilled in the art can make or use the disclosure. Various modifications to the disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations. Therefore, the disclosure is not intended to be limited to the examples and designs described herein, but should be given the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A transmission chain, comprising: a power amplifier that applies distortion to a signal to be transmitted based on a power supply voltage supplied to the power amplifier; as well as An analog predistortion (APD) circuit is coupled to the power amplifier, the APD circuit being configured to normalize the distortion imposed on the signal by the power amplifier.

2. The transmission chain according to claim 1, wherein: The APD circuit includes a varactor coupled to the power amplifier.

3. The transmit chain of claim 1 , further comprising a supply voltage detector coupled to an output of the power amplifier. 4 . The transmit chain of claim 1 , further comprising a second power amplifier serially coupled to the power amplifier.

5. The transmission chain according to claim 4, wherein: The APD circuit is also configured to pre-distort the second power amplifier to offset variations based on the supply voltage.

6. The transmit chain of claim 1, further comprising a power tracking circuit configured to set the supply voltage in response to a control signal from a baseband processor (BBP).

7. The transmission chain according to claim 6, wherein: The power tracking circuit is configured to set the supply voltage on a per time slot basis.

8. The transmission chain according to claim 6, wherein: The power tracking circuit is configured to set the supply voltage on a per-symbol basis.

9. The transmission chain according to claim 3, wherein: The supply voltage detector is configured to sample a voltage level on a per time slot basis.

10. The transmission chain according to claim 3, wherein: The supply voltage detector is configured to sample a voltage level on a per-symbol basis.

11. The transmit chain of claim 1 , further comprising a baseband processor (BBP) coupled to the power amplifier and configured to provide the signal to be transmitted.

12. The transmission chain according to claim 11, wherein: The BBP includes a digital predistortion (DPD) circuit configured to provide predistortion to shift a normalized distortion profile of the power amplifier.

13. The transmission chain of claim 1 , wherein: The power amplifier includes a bipolar transistor.

14. The transmission chain of claim 1, wherein: The APD circuit is configured to provide a phase distortion APD.

15. The transmission chain of claim 1, wherein: The APD circuit is configured to provide a gain-distortion APD.

16. The transmission chain of claim 3, wherein: The power supply voltage detector is configured to continuously detect a voltage level.

17. A method for providing predistortion to a power amplifier, comprising: receiving a signal to be transmitted at a power amplifier; as well as Analog predistortion (APD) is provided to the power amplifier based on a supply voltage.

18. The method of claim 17, further comprising providing digital pre-distortion (DPD) to the signal to be transmitted at a baseband processor (BBP) prior to reception at the power amplifier.

19. The method according to claim 17, wherein: Providing the APD includes providing phase distortion to the signal to be transmitted.

20. The method according to claim 17, wherein: Providing the APD includes providing gain distortion to the signal to be transmitted.

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