32 results about "Harmonic mitigation" patented technology

The application discloses a five-phase permanent magnet synchronous motor harmonic suppression control method based on machine learning, which comprises the following steps: S1, constructing a mathematical model of a five-phase permanent magnet synchronous motor driving system in a rotating coordinate system, and designing a five-phase permanent magnet synchronous motor control system based on a deep neural network; S2, deeply integrating motor physical prior information into a training process to enhance the generalization ability of the model, and proposing a hybrid optimization strategy to improve the fitting precision of a predicted network voltage and an actual working voltage, suppress fluctuations in the prediction process, and make the predicted value more suitable for actual operation requirements. The application overcomes the limitations of the existing double-plane current control method, and fully utilizes the technical advantages.

The application discloses a hybrid system network converter long-time domain prediction control and non-disturbance switching method, and belongs to the technical field of power system control. In view of the problems of poor dynamic performance of a hybrid system of a network construction / following network converter under high proportion of new energy grid connection and easy impact of mode switching, the method is as follows: a long-time domain model is constructed to predict current control, a traditional PI current inner ring is replaced, a dq coordinate system is discretized to model, double-step length prediction is compensated to delay, a Lagrange extrapolation is used to update a reference current, current tracking accuracy and harmonic suppression capability are improved; a non-disturbance switching strategy is designed, an alpha-beta coordinate system and a current control ring are unified, a switching angle is locked and an initial value of an integrator is synchronized, a reference voltage is dynamically adjusted to guarantee variable continuity; the two strategies are integrated into a hybrid framework, stable operation and smooth switching under strong / weak power grid and transition working conditions are realized. The application reduces grid-connected current total harmonic distortion rate to below 0.85%, has no voltage and current impact in switching, and has the advantages of enhancing power system stability and flexibility.

The present application relates to the technical field of harmonic suppression, and discloses a current harmonic suppression method, device, equipment and medium, the method comprises the following steps: determining a target group according to the current operating frequency of a motor; outputting a pre-calculated coefficient group corresponding to the target group to a quasi-resonance controller; obtaining a quasi-resonance adjustment amount output by the quasi-resonance controller based on the input coefficient group; and obtaining a target control amount by combining the quasi-resonance adjustment amount and a proportional integral adjustment amount output by a proportional integral controller, wherein the present application does not require a large number of coefficient calculation processes in the control process, can greatly reduce the calculation amount, avoids a large amount of calculation from occupying the FOC interruption execution time, and can be implemented on a low-cost controller, thereby reducing the control cost.

This application provides a dual-constraint active control strategy for voltage harmonic mitigation in photovoltaic converters, comprising: constructing an overshoot constraint current based on dynamic response; constructing a thermal constraint current considering operating conditions; determining a harmonic compensation current based on the overshoot constraint current and the thermal constraint current; and determining a harmonic modulation wave based on the harmonic compensation current. The strategy proposed in this application suppresses system transient overshoot and limits device thermal stress during harmonic mitigation, achieving adaptive control of harmonic compensation capability.

This invention proposes a harmonic suppression method for voltage-controlled DG-Grid interface converters based on a two-step virtual impedance. This method utilizes a two-step virtual impedance control structure to actively suppress DG output current harmonics by reconstructing the harmonic voltage reference command. The effectiveness of the method is visually verified through the output voltage and current waveforms. Theoretical and simulation results show that this method not only effectively improves the DG output current quality under different harmonic severity levels but also possesses advantages such as simple structure and ease of integration, providing an effective harmonic mitigation solution for high-standard grid-connected operation of distributed generation systems.

This invention relates to the field of transformer technology and discloses a method and apparatus for harmonic suppression in a transformer for AI computing power supply and energy storage devices. The method involves: acquiring the current on the primary side of the transformer and calculating the characteristic harmonic amplitude data injected into the primary side of the transformer and the phase angle difference parameters of the multi-split windings when the GPU server switching power supply is running in parallel; introducing inter-winding phase angle differences for each split winding and arranging the turns ratio so that the low-order characteristic harmonic currents cancel each other out when superimposed on the primary side by each split winding, and obtaining the residual harmonic current after mutual cancellation; extracting high-order harmonic components through an active harmonic compensation unit integrated within the transformer, and injecting a first compensation current with equal amplitude and opposite phase to the high-order harmonic components into the common node of the transformer windings. This invention achieves stable suppression of the total distortion rate of transformer-side harmonic currents under all operating conditions of AI computing power.

This application relates to a method, apparatus, and computer equipment for harmonic mitigation in distribution networks. The method includes: first, for each node in the distribution network, obtaining a risk factor characterizing the degree of harmonic exceedance risk at each node, calculating a risk weighting value; based on this risk weighting value, the worst-case node risk penalty term, and the fixed investment cost of voltage-sensing active power filters at rated capacity and the operation and maintenance cost corresponding to the actual compensation capacity, constructing a comprehensive objective function while setting constraints; using the virtual harmonic conductance of each voltage-sensing active power filter at each node of the distribution network as optimization variables, iteratively solving the constructed comprehensive objective function using an improved sine and cosine algorithm to obtain the optimal values ​​of each virtual harmonic conductance of the voltage-sensing active power filter; and finally, configuring the harmonic conductance parameters of the voltage-sensing active power filters in the distribution network based on these optimal values. This method can accurately and efficiently achieve harmonic suppression and safe and stable operation of the distribution network.

This invention belongs to the field of power electronics technology, specifically relating to a high-voltage direct-connected multi-source energy system and a frequency domain harmonic separation and suppression method. The method first acquires grid voltage, grid-connected current, and submodule capacitor voltage; then, it uses an adaptive variational mode decomposition algorithm to perform frequency domain separation of the signals; based on instantaneous frequency, volatility, and energy concentration, it dynamically classifies the mode functions and calculates their confidence levels; based on the classification results, it generates targeted harmonic suppression commands, which are then combined with the fundamental frequency command to form a total voltage reference command; in carrier phase-shift modulation, the carrier phase is dynamically adjusted according to the submodule capacitor voltage deviation to achieve voltage balance; finally, based on the grid-connected current harmonic distortion rate, DC voltage ripple, and voltage imbalance, the control parameters are adaptively optimized online. This invention solves the conflict between broadband harmonic suppression and module voltage stability in high-voltage direct-connected systems, improving power quality and operational reliability under all operating conditions.

This invention, based on VMD-SST, is a method for diagnosing weak inter-turn short-circuit faults in dual-phase three-phase motors under varying operating conditions. It belongs to the field of motor fault diagnosis technology. The invention addresses the problems of traditional methods' difficulty in accurately tracking time-varying fault characteristics under varying operating conditions, the difficulty in extracting weak fault signals due to the harmonic suppression characteristics of dual-phase three-phase motors, and the easy submersion of single-turn short-circuit faults by noise under low signal-to-noise ratio. This invention establishes a fault mathematical model, deriving the mechanism that a fault will generate 4th and 6th times the electrical frequency harmonic components in the fifth harmonic space. Based on this, the d-axis and / or q-axis currents in the fifth harmonic space are selected as characteristic signals. Variational mode decomposition is performed on the characteristic signals to select the target mode from multiple mode components. Synchronous compressed wavelet transform is performed on the target mode to obtain a time-frequency diagram. Time-frequency ridges are extracted; if the ridge frequency is 4th and / or 6th times the electrical frequency, an inter-turn short-circuit fault is determined, and the ridge start time is taken as the fault occurrence time.

The application discloses a multi-harmonic suppression method for a dual three-phase permanent magnet synchronous motor, and comprises the following steps: S1, a model of a dual three-phase permanent magnet synchronous motor driving system is established; a six-dimensional voltage vector is constructed through a switching state generated by a voltage source inverter, and a stator voltage vector is decomposed by adopting a vector space decomposition method to establish a voltage equation; S2, multi-source harmonic distortion characteristics are analyzed; current harmonic components caused by phase group asymmetry, non-sinusoidal distribution of counter electromotive force and nonlinearity of the inverter are respectively identified and analyzed; S3, a harmonic suppression controller based on an online neural network assisted linear extended state observer (ONN-assisted LESO) is designed; a super-local model is constructed to describe stator current dynamics; an auxiliary neural network compensator is introduced; a weight adaptive law is designed in combination with Lyapunov stability analysis, a forward Euler method is adopted to realize discretization control, and a voltage reference value is generated to realize real-time suppression of multi-harmonics. The application can effectively realize multi-harmonic suppression under different operating conditions, and meanwhile, fast dynamic response and robust current performance are maintained.

This invention discloses a method and system for suppressing harmonic currents in a cascaded submodule-connected diode bridge controllable rectifier, relating to the field of harmonic suppression technology for power electronic converters. The controllable rectifier comprises cascaded submodule units, a transformer, and a diode rectifier unit. This invention obtains the amplitude and phase angle of harmonic current components in the AC line through Fourier decomposition. The amplitude of the harmonic current components is used for negative feedback PI control to generate a compensated harmonic voltage amplitude. The phase angle of the harmonic current components is increased by 90 degrees to obtain the compensated harmonic voltage phase angle. The compensated harmonic voltage component is subtracted from the modulation wave of the cascaded submodules to generate a corresponding harmonic current component that cancels out the original harmonic current components in the AC line. This invention achieves harmonic current filtering without requiring additional filtering equipment for the diode rectifier unit, has a simple control strategy, and effectively filters out harmonic current components in the AC line.

The present application relates to the field of wind power converter compensation control, and provides a wind power converter grid-connected point harmonic adaptive compensation control method and system, which realizes zero-intrusion online identification of grid harmonic impedance by coordinate transformation and target harmonic component extraction on grid-connected point voltage and current signals; based on this, the identified grid harmonic impedance estimation value is used to adaptively calculate the proportional and integral gains of harmonic compensation in combination with the preset system target dynamic performance; finally, the adaptive gains are used to generate and superimpose harmonic compensation instructions to adjust the output voltage of the converter. In this way, the wind power converter can dynamically adjust its parameters when facing complex and variable grid impedance, thereby effectively avoiding the problem of compensation effect deterioration or even resonance caused by grid impedance changes, greatly improving the robustness and stability of harmonic suppression, and ensuring the power quality of the wind power grid-connected system under various operating conditions.

The application is suitable for the technical field of multi-level topology harmonic suppression and four-quadrant feedback control, and provides a multi-level topology harmonic suppression and four-quadrant feedback integrated control system and method, which comprises the following steps: S1, system initialization, input parameters, and loading preset parameters; S2, real-time calculation of output voltage harmonic distortion rate THD through fast Fourier transform, harmonic analysis, if the harmonic analysis is greater than 5%, the adaptive harmonic elimination algorithm is activated, and a compensation voltage waveform is generated; S3, separation of active / reactive components through Park transformation, judgment of energy flow direction, and four-quadrant mode switching; S4, the compensation voltage is superimposed on the modulation wave through the improved SVPWM, and then four-quadrant feedback control is carried out; S5, IGBT junction temperature, DC bus ripple, and harmonic spectrum are collected, power grid voltage fluctuation is predicted based on LSTM, and the carrier frequency is dynamically adjusted. The scheme has good harmonic suppression effect, high energy efficiency improvement, fast dynamic response, low maintenance cost, and strong environmental adaptability.

This invention discloses a harmonic-suppressible solid-state transformer, relating to the field of transformer technology. It includes a main housing, an upper conductive partition, a lower conductive partition, a power conversion assembly, a high-frequency transformer assembly, and a harmonic filtering component. The upper and lower conductive partitions divide the main housing into three independent chambers. During operation, the power conversion assembly first performs high-frequency power conversion, followed by voltage transformation and transmission by the high-frequency transformer assembly. Finally, the harmonic filtering component filters out current noise and outputs clean electrical energy. During this process, the electromagnetic radiation and leakage magnetic field harmonics generated by each component are blocked by the physical barriers constructed by the upper and lower conductive partitions. This invention filters harmonics and electromagnetic noise in the current through the harmonic filtering component, thus avoiding harmonic crosstalk.

The utility model discloses a C wave band low harmonic power amplifier relates to the field of amplifier, and the amplifier includes the phase -locked loop frequency source module, and its output is connected pre -inhibit harmonic filter, adjustable gain forestage amplifier, interstage dynamic harmonic suppression module and double power divider microstrip circuit in proper order. Two output ends of double power divider microstrip circuit are connected first, second final stage power amplifier respectively, and its output is synthesized through double -way power synthesizer microstrip circuit again, and finally by radio frequency port output, while access feedback detection module, under the control of control module, through interstage dynamic harmonic suppression module to harmonic real -time regulation and control, combine the closed -loop feedback mechanism of feedback detection module, and the harmonic distortion caused by temperature drift, device aging is effectively suppressed, and the stability of harmonic suppression performance is significantly improved while guaranteeing high -power output.

The VMD-SST-based variable working condition dual three-phase motor weak inter-turn short circuit fault diagnosis method belongs to the motor fault diagnosis technical field, and aims to solve the problems that the traditional method is difficult to accurately track time-varying fault characteristics under variable working condition, the dual three-phase motor harmonic suppression characteristics result in that the weak fault signal is difficult to extract, and the single-turn short circuit fault is easily submerged by noise under low signal-to-noise ratio. The mechanism that the fault generates 4 times and 6 times electric frequency harmonic components in the fifth harmonic space is deduced by establishing a fault mathematical model, and accordingly, the fifth harmonic space d-axis and / or q-axis current is selected as a characteristic signal; the characteristic signal is subjected to variational mode decomposition, and a target mode is selected from multiple mode components; the target mode is subjected to synchronous compression wavelet transform to obtain a time-frequency diagram; a time-frequency ridge line is extracted, if the ridge line frequency is 4 times and / or 6 times electric frequency, then it is judged that an inter-turn short circuit fault occurs, and the starting time of the ridge line is taken as a fault occurrence time.

The present application relates to the field of power electronics, in particular to a grid-connected inverter device with adaptive impedance matching. It comprises hardware module, sensing module, prediction module and coordination module; the hardware module comprises a composite branch connected in parallel with the grid bus, the composite branch contains resistance elements, capacitance elements and inductance elements with adjustable parameters; the resistance elements are connected with the adjustable resistance path through three-phase full-bridge switches, the adjustable resistance path includes main path and standby path; the inverter and the grid bus form a grid-connected loop. Through the sensing module to calculate data, the prediction module to determine the reference, the coordination module to control the path and parameters, it not only adapts to the grid impedance in real time, but also accurately treats harmonics by frequency domain decomposition, solves the problem of impedance matching destroying harmonic suppression conditions and weakening the harmonic suppression ability of the inverter, and can also resist interference, reduce loss and improve energy efficiency.

This invention discloses a method for measuring the lead-lag average power of a three-phase asynchronous motor using phase-shift sampling, belonging to the field of motor power measurement technology. The method includes: signal conditioning processing, converting the three-phase voltage and current signals into levels suitable for ADC sampling; dual-state machine time-division sampling and power pre-calculation, cyclically acquiring voltage and current signals through T0 and T1 states and calculating the total three-phase power at adjacent sampling times; lead-lag averaging processing, performing an arithmetic average of adjacent pre-calculated power values; error compensation processing, calculating a compensation coefficient based on the sampling phase difference and correcting the power value; and periodic averaging filtering processing, achieving full-cycle power averaging based on the positive zero-crossing point detection of phase A voltage. This method achieves equivalent synchronous sampling based on a single energy meter, resulting in low hardware cost, system error control within ±0.1%, strong harmonic suppression capability, good load and frequency adaptability, a simple and efficient algorithm, and ease of embedded implementation.

The application discloses a kind of compatible single-phase open-circuit fault's double three-phase permanent magnet synchronous motor's diagnosis-free sensorless control method, first, using second-order generalized integrator, based on frequency difference, harmonic subspace current is separated into fundamental component and 5, 7 harmonic components.5, 7 harmonic components are used as current loop feedback, and harmonic suppression voltage is generated by regulator;Fundamental component is input to the fault model observer considering voltage constraint, and feedforward compensation voltage is estimated.The above-mentioned two parts of compensation voltage are superimposed on harmonic subspace, finally, corrected command voltage is used as the input of sensorless algorithm, combined with back-EMF observer and phase-locked loop, the accurate estimation of rotor position and speed is realized.The method does not need to rely on fault diagnosis, can realize unified control structure under healthy operation and a variety of single-phase open-circuit fault conditions, avoid the complexity brought by traditional method when switching control strategy before and after fault.

The application relates to a harmonic suppression method of a multi-port modular multilevel converter. The method comprises the following steps: acquiring current output values of a modular multilevel converter (MMC) at different sampling moments in a current sampling period and current reference values at corresponding sampling moments; determining a total harmonic distortion rate of the MMC in the current sampling period according to current differences between the current output values and the corresponding current reference values; and adjusting the number of converter sub-modules in the MMC according to the relationship between the current output values of the MMC and the number of the converter sub-modules, so as to reduce the total harmonic distortion rate of the MMC in a next sampling period. The method can reduce the total harmonic distortion rate of the output current of the MMC.

This invention provides a method for multi-dimensional performance improvement of grid-connected inverters based on variable gain feedback phase-locked loops (PLLs), comprising: Step S1: Setting a variable gain module in the feedback loop of the inverter's PLL to construct a novel PLL model based on variable gain feedback; wherein, the variable gain module includes a high-pass filter and a band-stop filter; the high-pass filter is used to extract harmonic components from the angular frequency information output by the PLL; the band-stop filter is used to reduce the gain on both sides of the fundamental frequency, increase the mid-frequency gain, and reduce the high-frequency gain, thereby improving the characteristics of the PLL, achieving lower gain at both the fundamental and high frequencies, demonstrating better harmonic suppression, and providing ample bandwidth in the absence of harmonic amplification. Step S2: Based on the constructed novel PLL model based on variable gain feedback, the harmonics on both sides of the fundamental frequency are weakened, high-frequency harmonics are suppressed, the harmonic suppression capability is improved, the mid-frequency bandwidth is maintained, and the dynamic characteristics are improved.

This utility model discloses a busbar mechanical fixing device for harmonic mitigation in low-impedance areas, relating to the fields of power electronics and power transmission and distribution technology. It includes several mounting frames arranged in sequence, each mounting frame comprising a horizontally positioned support plate and a limiting plate vertically positioned at the end of the support plate. The upper parts of the mounting frames collectively support two electromagnetic shielding baffles for electromagnetic shielding protection of the busbar. Each of the two electromagnetic shielding baffles has a heat dissipation groove on its opposite surface, arranged axially and with open ends. This utility model not only provides effective electromagnetic shielding protection for the busbar, effectively reducing magnetic field interference between adjacent busbars, lowering impedance and temperature rise, but also effectively improves the vibration resistance and stability of the busbar.

In an example, an amplifier is provided. The comprises a first pair of transistors comprising a first transistor and a second transistor. The amplifier also comprises a first trace connected to a drain of the first transistor, and a second trace connected to a drain of the second transistor. The amplifier also comprises a harmonic reduction first circuit comprising a harmonic reduction first subcircuit and a harmonic reduction second subcircuit. The harmonic reduction first subcircuit comprises a first inductor and a first capacitor. The first inductor and the first capacitor are connected between a first node and a first reference voltage. The harmonic reduction first subcircuit also comprises a second inductor. The second inductor and one of the first capacitor and a second capacitor are connected between a second node and the first reference voltage. The harmonic reduction second subcircuit comprises a third inductor and a third capacitor. The third inductor and the third capacitor are connected between the first node and the first reference voltage. The harmonic reduction second subcircuit also comprises a fourth inductor. The fourth inductor and one of the third capacitor and a fourth capacitor are connected between the second node and the first reference voltage. The amplifier further comprises a third trace connected to the first node. At least part of the third trace is adjacent and substantially parallel to a first at least part of the first trace. The amplifier further comprises a fourth trace connected to the second node. At least part of the fourth trace is adjacent and substantially parallel to a first at least part of the second trace.

The embodiment of the invention discloses a new energy grid-connected harmonic suppression regulation and control method and device, electronic equipment and a medium. A specific embodiment of the method comprises the following steps: performing variable window Fourier transform on a power instantaneous value sequence set, and then performing impedance compensation to obtain a compensated power harmonic spectrum diagram set; performing critical point identification on the new energy grid-connected power region to obtain a harmonic resonance critical point set; performing early warning grade division on the harmonic resonance critical point set to obtain an early warning grade critical point set; performing harmonic time sequence prediction on the compensated power harmonic spectrogram and the inverter power information to obtain a harmonic prediction amplitude oscillogram; and performing harmonic suppression control on the early warning grade critical point to obtain grid-connected harmonic regulation and control information, and performing equipment regulation and control processing on the power equipment. According to the embodiment, the early warning accuracy of the harmonic resonance risk and the efficiency of suppressing the harmonic resonance can be improved, the equipment delay is reduced, the safety of the new energy grid-connected equipment is improved, and the power loss is reduced.

This invention discloses a method and system for motor parameter identification based on a multiple synchronous rotating coordinate transformation filter. The method includes: using the motor's voltage and current along the αβ axis, along with position estimation information from a quadrature phase-locked loop (PLL), as inputs to a sliding mode observer to obtain back electromotive force (EMF) observations. The sliding mode algorithm employs a switching function to suppress high-frequency chattering in the back EMF. Furthermore, the harmonic disturbances in the back EMF are filtered out using a multiple synchronous rotating coordinate transformation filter. The fundamental component of the back EMF is then passed through the PLL to obtain the rotor's estimated speed and position information. The proposed multiple synchronous rotating coordinate transformation filter can be applied to sensorless motor control systems, eliminating the fifth and seventh harmonics in the estimated back EMF and exhibiting excellent harmonic suppression. This enables real-time and accurate acquisition of motor position information, improving the control performance of the motor drive system.

This invention relates to the field of power electronic converter control technology, and discloses a harmonic suppression control system and method for a grid-type converter. The method includes: maintaining an internal synchronization phase angle and extracting the complex vectors of each harmonic based on this angle; subsequently calculating the harmonic phase-locked equivalent quantity including a superlinear weighting factor to characterize the pulling strength of the harmonic components on the synchronization phase angle. The control logic generates voltage suppression commands based on the harmonic complex vectors to improve the output waveform, and injects the filtered harmonic phase-locked equivalent quantity as negative feedback into the frequency control loop to achieve frequency decoupling. This invention effectively decouples the interference mechanism between harmonic regulation and fundamental synchronization, suppressing grid voltage distortion while eliminating low-frequency slow-motion oscillations, ensuring stable operation of the grid-type converter in weak grid and high background harmonic environments.

This application discloses a PMSM harmonic suppression method and system based on union vector projection reconstruction, relating to the field of harmonic current suppression technology. The method includes: acquiring the multi-phase stator current of the target motor and performing harmonic separation based on coordinate transformation to obtain the harmonic current vector corresponding to each target subharmonic; constructing a union reference axis and projecting the harmonic current vector onto the union reference axis to obtain the active current component and reactive current component, which are then input into the corresponding proportional resonant controller to obtain the active compensation voltage component and reactive compensation voltage component; generating a harmonic compensation voltage vector and superimposing it with the fundamental control voltage vector to obtain a synthetic voltage reference vector; and performing harmonic suppression of the target motor based on the synthetic voltage reference vector. This method solves the technical problems of high computational resource consumption and coupling interference between harmonic components in existing multi-target subharmonic independent control, leading to a decrease in suppression accuracy.

The application provides a harmonic suppression control method, device and motor controller. The harmonic suppression control method comprises: performing coordinate transformation on three-phase currents of a motor to obtain a direct current component of a preset order d-axis harmonic current and a direct current component of a preset order q-axis harmonic current; obtaining a preset order d-axis harmonic compensation voltage and a preset order q-axis harmonic compensation voltage according to the direct current component of the preset order d-axis harmonic current, the direct current component of the preset order q-axis harmonic current and a proportional integral (PI) regulator; performing harmonic compensation adjustment on an accumulated value of the preset order d-axis harmonic compensation voltage to obtain a d-axis final harmonic compensation voltage, and performing harmonic compensation adjustment on an accumulated value of the preset order q-axis harmonic compensation voltage to obtain a q-axis final harmonic compensation voltage. The application can realize harmonic suppression control and is suitable for a permanent magnet synchronous motor of a pure electric vehicle.

The present application relates to a kind of high-speed motor harmonic suppression system based on virtual even fractional order repetitive controller, the definition of virtual fundamental frequency is proposed, and even harmonic repetitive controller is designed, only the control of even harmonic of virtual fundamental frequency can improve control frequency, enhance dynamic performance;Fractional order delay link based on second-order Lagrange interpolation is used, the decimal part of delay coefficient is fitted, the deviation of system resonance frequency and actual harmonic frequency is reduced, and the accuracy of harmonic suppression is improved;Secondly, low-pass filter with linear phase is used, and low-pass filter is removed from the inner mode of repetitive control, the phase of lag can be accurately compensated, and the tracking error of current harmonic in high frequency band is reduced.The present application can speed up the dynamic response of harmonic suppression, improve the accuracy of harmonic suppression and enhance the robustness of system, so as to effectively reduce motor loss.The system can not only be used for conventional speed motor, but also be more suitable for high-speed and super-speed motor harmonic suppression.