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32results about How to "Good harmonic suppression" patented technology

Signal filtering

A signal filter (100) comprises a first transferred impedance filter, TIF, (TIFA) having four differential signal paths (PA,1, PA,2, PA,3, PA,4) and a second TIF (TIFB) having four differential signal paths (PB,1, PB,2, PB,3, PB,4)- A first differential signal port of the first TIF (32A) is coupled to a first differential signal port of the second TIF (32B). A first clock generator (12A) is arranged to provide first-TIF clock signals (CLKA,I+, CLKA,Q+, CLKA,I−, CLKA,Q−) having four non-overlapping phases for selecting the respective first-TIF differential signal paths (PA,1, PA,2, PA,3, PA,4), and a second clock generator (12B) is arranged to provide second-TIF clock signals (CLKB,I+, CLKB,Q+, CLKB,J−, CLKB,Q−) having four non-overlapping phases for selecting the respective second-TIF differential signal paths (PB,1, PB,2, PB,3, PB,4). The phases of the second-TIF clock signals (CLKB,I+, CLKB,Q+, CLKB,I−, CLKB,Q−) are equal to the phases of the first-TIF clock signals (CLKA,I+, CLKA,Q+, CLKA,I−, CLKA,Q−) delayed by 45 degrees. The first-TIF first, second, third and fourth clock signals (CLKA,I+, CLKA,Q+, CLKA,I−, CLKAQ−) and the second-TIF first, second, third and fourth clock signals (CLKB,I+, CLKB,Q+, CLKB,I−, CLKB,Q−) have a duty cycle in the range 16.75% to 25%.
Owner:TELEFON AB LM ERICSSON (PUBL)

4.0-5.0 GHz 8W GaN monolithic power amplifier and design method

The invention discloses a 4.0-5.0 GHz 8W GaN monolithic power amplifier and a design method. The amplifier comprises an input matching network, an inter-stage matching network, an output matching network and pHEMT transistors; the input matching network is connected with the inter-stage matching network through one pHEMT transistor; the inter-stage matching network is connected with the output matching network through four pHEMT transistors; a gate bias power source is connected with the input matching network and the inter-stage matching network; and a drain bias power source is connected with the inter-stage matching network and the output matching network. According to the 4.0-5.0 GHz 8W GaN monolithic power amplifier and the design method of the invention, the design difficulty of a modular circuit is simplified, the size of the modular circuit is reduced significantly compared with the size of a traditional hybrid integrated circuit; the optimal load impedance and optimal source impedance of the transistors are determined; the circuit schematic diagrams of the input matching network, the output matching network and the inter-stage matching network are designed; indexes such as a stabilization coefficient, an input and output standing wave system, gain, power, efficiency and harmonic suppression are optimized; and the layout of the monolithic microwave power amplifier is designed.
Owner:成都泰格微电子研究所有限责任公司

Signal Filtering

ActiveUS20150016492A1Good harmonic rejectionImprove harmonic rejectionNetwork topologiesNetworks with variable switch closing timeClock generatorEngineering
A signal filter (100) comprises a first transferred impedance filter, TIF, (TIFA) having four differential signal paths (PA,1, PA,2, PA,3, PA,4) and a second TIF (TIFB) having four differential signal paths (PB,1, PB,2, PB,3, PB,4)−. A first differential signal port of the first TIF (32A) is coupled to a first differential signal port of the second TIF (32B). A first clock generator (12A) is arranged to provide first-TIF clock signals (CLKA,I+, CLKA,Q+, CLKA,I−, CLKA,Q−) having four non-overlapping phases for selecting the respective first-TIF differential signal paths (PA,1, PA,2, PA,3, PA,4), and a second clock generator (12B) is arranged to provide second-TIF clock signals (CLKB,I+, CLKB,Q+, CLKB,J−, CLKB,Q−) having four non-overlapping phases for selecting the respective second-TIF differential signal paths (PB,1, PB,2, PB,3, PB,4). The phases of the second-TIF clock signals (CLKB,I+, CLKB,Q+, CLKB,Q−) are equal to the phases of the first-TIF clock signals (CLKA,I+, CLKA,Q+, CLKA,I−, CLKA,Q−) delayed by 45 degrees. The first-TIF first, second, third and fourth clock signals (CLKA,I+, CLKA,Q+, CLKA,I−L, CLKAQ−) and the second-TIF first, second, third and fourth clock signals (CLKB,I+, CLKB,Q+, CLKB,I−, CLKB,Q−) have a duty cycle in the range 16.75% to 25%.
Owner:TELEFON AB LM ERICSSON (PUBL)

TE01 mixing cavity filter device

The invention relates to a TE01 mixing cavity filter device and provides an implementation method for a TE01 dielectric resonator and coaxial metal resonator mixing cavity filter. According to a mixed structure which integrates the advantages, such as high Qvalue and stable temperature coefficient of TE01 dielectric resonators as well as relatively far distance between higher-order modes and main modes of coaxial metal resonators, the TE01 dielectric resonators and the coaxial metal resonators are arranged in a mutually crossed manner, the TE01 dielectric resonators are assembled on the side surface of a cavity body, and the space between each coaxial metal resonator and each TE01 dielectric resonator is changed by moving a tuning plate so as to realize the purpose of tuning the frequencies of the TE01 dielectric resonators. The TE01 mixing cavity filter device disclosed by the invention is applicable to metal resonant cavity devices, such as a metal resonant cavity filter, a duplexer and a combiner which can satisfy out-of-band rejection, but cannot realize insertion loss under a condition of limited volume, and can be applicable to devices, such as a TE01 dielectric resonant cavity filter, a duplexer and a combiner which can satisfy out-of-band rejection and insertion loss, but cannot meet a coupling coefficient required by larger relative bandwidth.
Owner:WUHAN HONGXIN TELECOMM TECH CO LTD

4.0-5.0ghz 8W GaN Monolithic Power Amplifier and Design Method

Disclosed are a 4.0-5.0 GHz 8W GaN monolithic power amplifier and a design method thereof. The amplifier comprises an input matching network, an interstage matching network, an output matching network, and a set of pHEMT transistors. The input matching network is connected to the interstage matching network by means of one pHEMT transistor. The interstage matching network is connected to the output matching network by means of four pHEMT transistors. A gate bias power supply is respectively connected to the input matching network and the interstage matching network. An interstage gate matching bias power supply is respectively connected to the interstage matching network and the output matching network. The invention addresses the difficulties of designing a modular circuit, is much smaller than a conventional hybrid integrated circuit, determines an optimal load impedance and an optimal source impedance of a chip, provides a circuit diagram associated with the input, output and interstage matching networks, optimizes parameters, including a stability coefficient, an input and output standing wave system, a gain, a power, efficiency and harmonic suppression, and provides a layout for a monolithic microwave power amplifier.
Owner:成都泰格微电子研究所有限责任公司

A te01 hybrid cavity filter device

The invention relates to a TE01 mixing cavity filter device and provides an implementation method for a TE01 dielectric resonator and coaxial metal resonator mixing cavity filter. According to a mixed structure which integrates the advantages, such as high Qvalue and stable temperature coefficient of TE01 dielectric resonators as well as relatively far distance between higher-order modes and main modes of coaxial metal resonators, the TE01 dielectric resonators and the coaxial metal resonators are arranged in a mutually crossed manner, the TE01 dielectric resonators are assembled on the side surface of a cavity body, and the space between each coaxial metal resonator and each TE01 dielectric resonator is changed by moving a tuning plate so as to realize the purpose of tuning the frequencies of the TE01 dielectric resonators. The TE01 mixing cavity filter device disclosed by the invention is applicable to metal resonant cavity devices, such as a metal resonant cavity filter, a duplexer and a combiner which can satisfy out-of-band rejection, but cannot realize insertion loss under a condition of limited volume, and can be applicable to devices, such as a TE01 dielectric resonant cavity filter, a duplexer and a combiner which can satisfy out-of-band rejection and insertion loss, but cannot meet a coupling coefficient required by larger relative bandwidth.
Owner:WUHAN HONGXIN TELECOMM TECH CO LTD

Ultra-wideband microstrip filter

The invention relates to an ultra-wideband microstrip filter which comprises a first metal layer. The metal pattern of the first metal layer comprises symmetrical left and right metal patterns, wherein the left and right metal patterns respectively comprise an input / output port, a first order stepped impedance circuit cut line, a second order stepped impedance circuit cut line and an interdigital coupling line section, and the input / output port, the first order stepped impedance circuit cut line, the second order stepped impedance circuit cut line and the interdigital coupling line section are connected in sequence. The first order stepped impedance circuit cut line, the second order stepped impedance circuit cut line and the interdigital coupling line section form a circular structure as a resonance unit of the filter. The interdigital coupling line section comprises a first sub-line section and a second sub-line section, wherein the first sub-line section and the second sub-line section are parallel to each other and are coupled with each other, the first sub-line section is connected with the tail end of the second order stepped impedance circuit cut line, and the second sub-line section is connected with the initial end of the first order stepped impedance circuit cut line. The intersection of the first and second order stepped impedance circuit cut lines is provided with a metalized through hole which penetrates through the first metal layer and a dielectric layer and forms a path together with a second metal layer.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

GaAs technology K wave band frequency converter structure chip

InactiveCN112928994ARealize frequency doubling functionGood power flatnessMulti-frequency-changing modulation transferenceLow noiseLocal oscillator signal
The invention provides a GaAs process K wave band frequency converter structure chip, the working frequency is 17.7 GHz-23.4 GH, the fundamental wave signal input frequency is 8.85 GHz-11.7 GHz, an input signal is amplified through a fundamental wave amplifier, the amplified signal drives a frequency doubler to work, the signal is subjected to secondary frequency doubling, and clutters are further filtered out through a filter. The frequency multiplication function from the X wave band to the K wave band is achieved, the output power of 16 dBm is achieved, the power flatness is good, and the harmonic suppression degree of each order is good and reaches 55 dBc. An amplified local oscillator signal is divided into two paths of signals with the phase difference of 90 degrees through a local oscillator I / Q bridge, the two paths of signals enter a frequency mixer and a double-balanced frequency mixer respectively to be mixed with an input intermediate frequency I signal and an input intermediate frequency Q signal respectively, the mixed signals enter a radio frequency I / Q bridge to be synthesized, mirror image signals are effectively suppressed, and the suppression degree reaches 50 dBc. The radio-frequency signal finally enters the low-noise radio-frequency amplifier, the output power is larger than 17 dBm, the noise is smaller than 10 dB, and 0.05 W radio-frequency power output is achieved.
Owner:HEFEI IC VALLEY MICROELECTRONICS CO LTD
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