49results about "Networks with variable switch closing time" patented technology

A switchable bandwidth optical receiver is implemented in a front-end of the receiver in at least one of three ways. A switchable impedance may be provided at the input to a preamplifier of the front end, the preamplifier of the front-end may have a switchable impedance therein, and/or a switchable filter may be provided at an output of the preamplifier.

A multi-tap direct sub-sampling mixing system for wireless receivers is provided with a dynamically configurable passive switched capacitor filter. A front end amplifier is connected to receive a signal. The passive switched capacitor filter is connected to receive the amplified signal and has an output for providing a filtered signal. The switched capacitor filter has at least two sections that are each operable as a pole, wherein a first section of the at least two sections has sets of at least two stacked capacitors interconnected with a set of switches operable to amplify in input voltage provided to an input of the first section in response to operation of the set of switches; and a back end section connected to the output of the switched capacitor filter to receive the filtered signal.

The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (τ), with the RC time constant (τ) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy between the RC time constant (τ) of the RC element (1) and a nominal value.

A reconfigurable baseband filter for use in a multimode communication system is disclosed. One or more filter elements can each be configured as a plurality of sub-elements. The value of each of the filter elements can be varied by switching between at least two of the plurality of sub-elements. Switching noise within a desired passband can be reduced by switching at a rate that is greater than the desired passband. The switching noise in the passband can be further reduced by pseudo-randomly switching between the sub-elements. The filter can use a delta-sigma modulator to generate a pseudo-random switching signal.

Phase-locked loop circuitry to generate an output signal, the phase-locked loop circuitry comprising oscillator circuitry, switched resistor loop filter, coupled to the input of the oscillator circuitry (which, in one embodiment, includes a voltage-controlled oscillator), including a switched resistor network including at least one resistor and at least one capacitor, wherein an effective resistance of the switched resistor network is responsive to and increases as a function of one or more pulsing properties of a control signal (wherein pulse width and frequency (or period) are pulsing properties of the control signal), phase detector circuitry, having an output which is coupled to the switched resistor loop filter, to generate the control signal (which may be periodic or non-periodic). The phase-locked loop circuitry may also include frequency detection circuitry to provide a lock condition of the phase-locked loop circuitry. The frequency detection circuitry includes (i) circuitry to generate a signal which is representative of the frequency of the output signal of the phase-locked loop circuitry, (ii) comparison circuitry to compare the signal which is representative of the frequency of the output signal of the phase-locked loop circuitry to a reference input to the phase-locked loop circuitry, and (iii) a switched capacitor network including at least one capacitor.

An apparatus, having as an input an analog signal, is provided. The apparatus comprises a first circuit comprising an impedance transferring circuit configured to band pass filter the input signal, obtaining a filtered signal; the impedance transferring circuit comprising: a transconductance amplifier (1102), and a switching arrangement (1106, 1108) and an impedance circuit (404) connected in series, the switching arrangement being configured to switch the impedance of the impedance circuit of the impedance transferring circuit from base band to the frequency of the input signal. The apparatus further comprises a second circuit (1112) configured to perform down mixing to the filtered signal obtaining a base band signal and a feedback loop connecting the base band signal to the switching arrangement (1114, 1116) and the impedance circuit, the signal of the feedback loop configured to control the properties of the first circuit.

A filtering method, a transceiver and a transmitter are provided. The transmitter comprises a power amplifier amplifying an RF signal and having multiple stages, and a local oscillator, the power amplifier comprising between at least two stages of the power amplifier an impedance circuitry for forming an impedance at a frequency related to the frequency of the local oscillator, and a switch for switching the impedance of the impedance circuitry means to RF frequency.

The present invention provides a method for using transferred-impedance filtering in RF (radio frequency) receivers (e.g., inside of a mobile communication device), wherein said filtering can be done with MOS-switches transferring impedance of a regular RC or RCL circuit to RF frequency filtering inside an RFIC (radio frequency integrated circuit).

A frequency translation filter includes a baseband filter circuit, a clock generator, and a switching circuit. The baseband filter circuit is operable to provide a baseband filter response. The clock generator is operable to generate multiple-phase clock signals at a desired frequency. The switching circuit is operable to frequency translate the baseband filter response of the baseband filter circuit to a high frequency filter response in accordance with the multiple-phase clock signals.

A method of providing an input signal to a mixer circuit comprises coupling an output signal from a low-noise amplifier circuit to a mixer input of the mixer circuit via an AC coupling circuit, comprising an inductive of capacitive coupling circuit. For capacitive coupling configurations, a coupling capacitor is configured to have a capacitance value determined as a function of a transconductance sensitivity of the mixer circuit. For balanced output configurations of the low-noise amplifier circuit, matched coupling capacitors are used for coupling the balanced output signals to respective inputs of the mixer circuit. In one embodiment, the mixer circuit comprises a quadrature mixer circuit, which may be in a balanced or double-balanced configuration. In another embodiment, the mixer circuit comprises a four-phase mixer circuit, which may be configured as a balanced four-phase mixer circuit coupled to the low-noise amplifier circuit via inductive or capactive embodiments of the coupling circuit.

The invention discloses a design method of a time-varying separable non-downsampled filter bank based on iterative calculation. The method comprises the steps of: firstly, based on the properties of atwo-dimensional separable filter, designing an analysis filter bank with a frequency response; and finally, converting the reconstruction problem of the output signal of an integrated filter bank toa global least squares problem, converting the global least squares problem into a local least squares problem, and performing solution through an iteration mode. The iteration calculation method is low in iteration times, the designed time-varying separable non-downsampled filter bank has the complete reconstruction feature and the better denoising performance, and the analysis filter has frequency response.

An active filter circuit includes an inductance-capacitance (LC) circuit (110) for wireless frequency input, a bi-directional mixer (120) and a filter impedance (130) series-coupled across at least part of the LC circuit (110), and another mixer (420) coupled to at least some portion of the LC circuit. Other circuits, processes, receivers, transmitters and transceivers are disclosed.

Provided is a device for controlling a frequency response by scaling an impedance. The device includes a filter and a duty ratio controller. The filter generates an output signal after removing a frequency from an input signal, and comprises a first impedance component and a switch. The switch, which is serially connected to the first impedance component, is switched on or off in response to a duty-controlled clock signal. The duty ratio controller receives a clock signal, controls a duty ratio of the clock signal, and generates the duty-controlled clock signal. The duty ratio controller comprises a flip-flop, which has a clock terminal that receives the clock signal, and a reset terminal, which receives a delayed signal obtained after delaying the clock signal by a time delay. The duty ratio controller further comprises a delay component that receives the clock signal, generates the delayed signal, and controls the time delay in response to a duty control signal.

A tunable transformer providing switched inductance includes a primary winding and a secondary winding. A switch is connected to the secondary winding of the transformer. At least one capacitor is also connected to the secondary winding of the transformer with the switch.

A SAW-less receiver includes an FEM interface module, an RF to IF receiver section, and a receiver IF to baseband section. The RF to IF receiver section includes an RF frequency translated bandpass filter (FTBPF), an LNA, and a mixing section. The RF FTBPF frequency translates a baseband filter response to an RF filter response and filters an inbound RF signal in accordance with the RF filter response, wherein the inbound RF signal includes a loss error due to switching loss and/or inductor loss. The RF FTBPF also compensates the loss error based on a negative resistance. The LNA amplifies the compensated inbound RF signal and the mixing section mixes the amplified inbound RF signal with a local oscillation to produce an inbound IF signal. The receiver IF to baseband section converts the inbound IF signal into one or more inbound symbol streams.

An apparatus and method suppress unwanted signal components in receiving signals during wireless communication. A first circuitry is arranged to process a first signal, a second circuitry is arranged to apply transferred impedance filtering on a second signal according to a filter clock frequency, a signal branching circuitry is arranged to branch an input signal into the first circuitry and the second circuitry, and a signal combining circuitry is arranged to combine the processed first signal and the filtered second signal such that signal components of the first signal processed in the first circuitry and the filtered second signal are in-phase for signal frequencies equal to the filter clock frequency.

An integrated circuit for a radio receiver comprising a radio-frequency amplifier and a radio-frequency filter is described. The amplifier receives radio-frequency signals from an antenna, the filter is connected to the amplifier output, and the output of the filter is provided to a processing stage of the receiver. The amplifier comprises an amplifying stage controlled by a radio-frequency input signal and a signal fed back from the filter. The amplifier input impedance is substantially matched to the antenna impedance at a frequency band of interest. The signal fed back from the filter providing attenuation of signals outside the frequency band of interest at the amplifier input. The filter comprises one or more filter components. A filter component comprises a first input and a second input for receiving the amplifier output, a first switch arranged to selectively connect the first input to a first impedance, a second switch arranged to selectively connect the first input to a second impedance, a third switch arranged to selectively connect the second input to the first impedance, and a fourth switch arranged to selectively connect the second input to the second impedance. The first and fourth switches are controlled by a first oscillator signal and the second and third switches are controlled by a second oscillator signal that is 180° out of phase with the first oscillator signal.

A noise filter for an integrated circuit is proposed. The noise filter comprises a CMOS inverter and two capacitors. The input of the CMOS inverter is coupled with an input pad of the integrated circuit and the output of the CMOS inverter is coupled with an input buffer. The first capacitor is inserted between the output of the CMOS inverter and a first voltage source and the second capacitor is inserted between the output of the CMOS inverter and a second voltage source. A transfer gate may be in stead of the CMOS inverter.

A receiving method, a transceiver and a receiver are provided. The receiver comprises an antenna for receiving a radio frequency signal, a local oscillator, an amplifier for amplifying the received signal, a phase shifter connected between the antenna and the amplifier, the phase shifter converting a high impedance at one end of the phase shifter to a low impedance at the other end, and vice versa. The receiver further comprises a filter, the frequency response of the filter being determined on a frequency related to the frequency of the local oscillator, the filter comprising a switching arrangement which converts the frequency response to radio frequency.