151results about "Network simulating reactances" patented technology

Methods and apparatus are provided for programmable active inductance. The disclosed active inductor devices provide a tunable bandwidth with improved linearity. The disclosed active inductors have a variable frequency response corresponding to a variable inductance of the active inductor. The active inductor comprises a variable resistive circuit having an effective resistance, wherein the variable resistive circuit is comprised of at least one resistor that can be selectively bypassed in the variable resistive circuit to vary the effective resistive. The active inductor has an inductance that can be varied by varying the effective resistance.

An active inductor circuit implemented in sub-micron CMOS semiconductor technology is usable at gigaHertz frequencies and includes an input node, a non-inverting transconductor circuit comprising a differential pair of NMOS transistors connected to the input node, an inverting transconductor circuit comprising an NMOS transistor connected to an output node of the non-inverting transconductor circuit and connected to the input node in a gyrator feedback configuration. Varactors coupled to the transconductor circuits tune the frequency and Q of the active inductor circuit.

Input conversion noises of a filter circuit are reduced. The circuit has plural element circuits obtained by dividing the filter circuit so as to include at least one voltage controlled current source, at least one element circuit is an amplification element circuit having an amplifying function for amplifying an input signal to the filter circuit at a set amplification factor. The amplification element circuit has: a loop circuit constructed by plural intra-loop voltage controlled current sources in which mutual conductance values have a predetermined corresponding relation; and a corresponding capacitor connected to a contact in the loop circuit and having a capacitance depending on the corresponding relation so as to set a potential at the contact to a predetermined potential corresponding to the amplification factor, and amplification element circuit has an electric nature which is independent on the amplification factor when seeing from the input side of the filter circuit.

A negative capacitance converter is used in combination with a buffer circuit to form an electrical shunt circuit. The negative capacitance converter and the buffer circuit, together, minimize or eliminate oscillations of a negative impedance generated by the electrical shunt circuit. Additionally, a specific configuration of the negative capacitance converter is used to provide optimum stability. The buffer circuit includes a Riordan-type circuit, with the negative capacitance converter being substituted for one of the impedance elements of the Riordan-type circuit. Resistors are used to replace the other impedance elements of the Riordan-type circuit. An additional capacitor is placed across one of the operational amplifiers of the Riordan-type circuit, in order to provide additional stability.

The invention discloses an active inductance parallel peaking structure which is characterized by comprising a load impedance circuit and a load impedance current control circuit, wherein the load impedance circuit is used for converting current from a transconductance circuit into circuit output voltage; the load impedance current control circuit is used for carrying out time domain delay and frequency domain low-pass filtering processing on the voltage of an output end of the load impedance circuit and electric potential translational and additional processing; the output end of the load impedance circuit is connected with an input end of the load impedance current control circuit; and an output end of the load impedance current control circuit is connected with an input end of the load impedance circuit.

An active inductance circuit comprising a signal terminal (OUT) and having voltage and current characteristics, as viewed from this terminal, which are identical to those of a circuit comprising an inductance, this active inductance circuit having a structure in which the drain terminal of a first MOS transistor M1 and the gate terminal of a second MOS transistor M2 different in conductivity type from the first MOS transistor are connected to the signal terminal, the gate terminal of the first MOS transistor is connected to the source terminal of the second MOS transistor, a capacitor and a current source are connected to the source terminal of the second transistor, the source terminal of the first MOS transistor and the drain terminal of the second MOS transistor are connected to a power source and other terminals of the capacitor and current source are connected to another power source.

This invention discloses a realization method for multiple capacitors, which multiples the value of a capacitor by a capacitance multiple circuit and integrates the equivalent capacitors into an IC.

A gyrator includes shunt or feedback nodal capacitors and shunt lossy inductors without shunt load resistors. The effective nodal capacitance is reduced by the introduction of the shunt lossy inductors. The inductors act to discriminate against injected power supply noise, resulting in improved oscillator phase noise. The inductors produces less drop dc voltage than the resistive load, so that larger linear oscillation is obtained with improved oscillator phase noise.

A method and system for bandwidth enhancement using hybrid inductors are disclosed and may include providing an electrical impedance that increases with frequency via hybrid inductors comprising a transistor, a capacitor, an inductor, and a resistor. A first terminal of the hybrid inductors may comprise a first terminal of the transistor. A second terminal of the transistor may be coupled to a first terminal of the resistor and a first terminal of the capacitor. A second terminal of the resistor may comprise a second terminal of the hybrid inductors. A third terminal of the transistor may be coupled to a first terminal of an inductor, and a second terminal of the inductor may be coupled to a second terminal of the capacitor. The hybrid inductors may be configured by varying transconductance, resistance, and/or capacitance and may be utilized as an amplifier load.

A differential circuit topology that produces a tunable floating negative inductance, negative capacitance, negative resistance/conductance, or a combination of the three. These circuits are commonly referred to as “non-Foster circuits.” The disclosed embodiments of the circuits comprises two differential pairs of transistors that are cross-coupled, a load immittance, multiple current sources, two Common-Mode FeedBack (CMFB) networks, at least one tunable (variable) resistance, and two terminals across which the desired immittance is present. The disclosed embodiments of the circuits may be configured as either a Negative Impedance Inverter (NII) or a Negative Impedance Converter (NIC) and as either Open-Circuit-Stable (OCS) and Short-Circuit-Stable (SCS).

A programmable passive inductor includes two inductors or coils, each having a self-inductance, magnetically coupled together and having a mutual inductance proportional to a magnetic coupling factor. The relative magnitude of the currents through the two inductors can be dynamically varied, which changes the effective inductance.

An active inductor includes bipolar transistors T1, T2, T3 and TD (TD being arranged in diode), where T1's emitter is connected to an output port and to T2's collector. T2's base is connected to a first voltage line and between two connected capacitors. T2's emitter is connected to T3's collecter. An end of one capacitor is connected to T1's base and to a second voltage line. An end of the other capacitor is connected to T3's emitter and to a third voltage line. T1's collector is connected to a fourth voltage line and to TM's collecter, which is connected to TM's base. TM's emitter is electrically connected to T3's base. Preferably, the transistors T1–T3 and TD are Silicon based, and the active inductor is fabricated on a single substrate comprising Silicon. The active inductor is incorporated into adaptive oscillators and amplifiers and an improved transceiver.

A variable simulated inductor comprises an integrator connected to receive the voltage across the input to the circuit. The output of the inductor is connected to a control terminal of a transconductor connected across the input of the circuit. The gain of the transconductor is electronically controllable in order to control the inductance of the circuit. An oscillator using a variable simulated inductor and a piezoelectric resonator connected in parallel is also provided.

The invention discloses a broadband active inductor with high Q values and a coarsely tunable and finely tunable inductance value. The broadband active inductor comprises a first transconductance unit (1), a modulation unit (2), a second transconductance unit (3), a third transconductance unit (4), a fourth transconductance unit (5), a first tunable bias circuit (6), a second tunable bias circuit (7), a third tunable bias circuit (8) and a fourth tunable bias circuit (9). The modulation unit is connected with the first transconductance unit and is used for increasing the Q values and bandwidth of the active inductor. The first transconductance unit, the modulation unit and the second transconductance unit form a master circuit. The third transconductance unit and the fourth transconductance unit form a slave circuit. The master circuit and the slave circuit are connected in parallel. The equivalent capacitance for synthesizing the inductance in the whole circuit is increased, so the inductance value of the active inductor is improved. According to the active inductor, the high Q peaks of the active inductor under different frequencies are realized, the Q peaks can be tuned, and the inductance value of the active inductor is coarsely tuned and finely tuned.