15 results about "Impedance inverter" patented technology

The invention provides a power amplifier, a radio frequency chip and a base station, and relates to the technical field of power amplifiers. The problem that the complexity of a power amplifier circuit is aggravated is solved. The power amplifier comprises a mean value tube, a first peak value tube and a second peak value tube, a first impedance inverter circuit is arranged between the output end of the mean value tube and the output end of the first peak value tube, and a second impedance inverter circuit is arranged between the output end of the first peak value tube and the output end of the second peak value tube. The first impedance inverter circuit and the second impedance inverter circuit are opposite in phase and identical in phase compensation angle.

Disclosed herein is a wideband Doherty Power Amplifier (DPA) circuit. The wideband DPA circuit comprises a main PA, an auxiliary PA, and an input power splitter configured to split input power into main PA and auxiliary PA. Further, the circuit comprises a multi-phasing block component to provide phase difference between the main PA and the auxiliary PA. Furthermore, the circuit comprises a parasitic compensator & impedance inverter connected to the main PA to compensate a parasitic load on the main PA and modulate load in the DPA. Also, the circuit comprises a parasitic canceller connected to the auxiliary PA to compensate for the parasitic load on the auxiliary PA and avoid leakage of current from the main PA to the auxiliary PA, when the auxiliary PA is in an ‘OFF’ state. Additionally, the circuit comprises an output impedance transformer connected to the main PA and the auxiliary PA.

A Doherty power amplifier includes a first amplifier with a first output capacitance, a second amplifier with a second output capacitance, a reconfigurable impedance inverter, and a variable output impedance transformer. The reconfigurable impedance inverter includes a combining node and first, second, and third variable networks. The first variable network and the first amplifier output capacitance establish a first amplifier effective output capacitance that is less than the first output capacitance. The second variable network provides a series inductance between the first amplifier output and the combining node. The third variable network and the second amplifier output capacitance establish a second amplifier effective output capacitance that is less than the second output capacitance. The output impedance transformer includes a fourth variable network that establishes a combining node impedance. The first, second, and third variable networks and the output impedance transformer may be reconfigured based on traffic loading conditions.

The invention relates to a Doherty power amplifier with a harmonic frequency resonant circuit. A Doherty power amplifier includes a combining node that combines amplified output signals from first and second amplifiers. A reconfigurable impedance inverter circuit is coupled between a first amplifier and the combining node. The impedance inverter circuit includes an inductive element coupled between a first node and a second node, and a switching circuit coupled between the first node and the second node. A fundamental frequency tuning circuit and a harmonic frequency resonant circuit are coupled between the switching circuit and a ground reference node. When the switching circuit is configured to be in a first state, the fundamental frequency tuning circuit and the harmonic frequency resonant circuit are electrically coupled to a first node and a second node through the switching circuit. When the switching circuit is configured to be in a second state, the fundamental frequency tuning circuit and the harmonic frequency resonance circuit are electrically disconnected from the first node and the second node.

The present disclosure relates to a diplexer with an impedance inverter. The diplexer can be used to isolate a transmitter and a receiver that share a common antenna. The diplexer is balanced by using an impedance gradient that provides an impedance that causes a balun of the diplexer to cut off access to the common antenna rather than replicate the antenna impedance. Such a cut off can have lower insertion loss than a diplexer that replicates the antenna impedance only to separate differential signals and common mode signals of the receiver and transmitter.

Doherty power amplifiers with an inductor-capacitor (LC) lattice for impedance inversion are disclosed. In certain embodiments, a Doherty power amplifier includes a carrier amplifier, a peaking amplifier, and an LC lattice that serves as an impedance inverter for combining a differential carrier signal from the carrier amplifier with a differential peaking signal from the peaking amplifier. The LC lattice can include series inductors and cross capacitors connected to form a lattice, or series capacitors and cross inductors connected to form the lattice.

The present application relates to the technical field of power amplifiers. Provided are a power amplifier, a radio frequency chip and a base station. The present application aims to solve the problem of escalating complexity of a power amplifier circuit. The power amplifier comprises: a mean tube, a fist peak tube and a second peak tube, wherein a first impedance inverter circuit is provided between an output end of the mean tube and an output end of the first peak tube, and a second impedance inverter circuit is provided between the output end of the first peak tube and an output end of the second peak tube, the first impedance inverter circuit and the second impedance inverter circuit having opposite phases and the same phase compensation angle.

The invention provides a load modulation push-pull type power amplifier based on a Marchand balun and a design method thereof. The load modulation push-pull type power amplifier comprises a quadrature coupler, an auxiliary power amplifier circuit and a push-pull type main power amplifier circuit. Wherein the quadrature coupler is responsible for dividing a radio frequency input signal into two paths of signals with the same amplitude and a 90-degree phase difference, and respectively inputting the two paths of signals into the auxiliary power amplifier circuit and the push-pull type main power amplifier circuit. And the auxiliary power amplifier circuit comprises an input and output matching network and an auxiliary power amplifier transistor working in a C-type mode. The push-pull power synthesis main power amplifier circuit comprises a first Marchand balun, a first main power amplifier, a second main power amplifier and a second Marchand balun, wherein a first main power amplifier transistor and a second main power amplifier transistor are biased in a deep AB type mode. The second Marchand balun of the push-pull type power synthesis main power amplifier has a load modulation function, and the auxiliary power amplifier carries out load modulation on the push-pull type power synthesis main power amplifier through the second Marchand balun. Compared with the existing Doherty load modulation technology, the push-pull load modulation architecture adopted by the invention is not limited by an impedance inverter and a post-matching network, and the bandwidth of the push-pull load modulation architecture only depends on the bandwidth limitation of the first Marchand balun and the second Marchand balun. Compared with an existing load modulation type balanced power amplifier, the main power amplifier adopts a push-pull working mode and has higher anti-interference capability.

A Doherty power amplifier includes a combining node that combines amplified output signals from first and second amplifiers. A reconfigurable impedance inverter circuit is coupled between the first amplifier and the combining node. The impedance inverter circuit includes an inductive element coupled between a first node and a second node, and a switching circuit coupled between the first node and the second node. A fundamental frequency tuning circuit and a harmonic frequency resonance circuit are coupled between the switching circuit and a ground reference node. When the switching circuit is configured in a first state, the fundamental frequency tuning circuit and the harmonic frequency resonance circuit are electrically coupled through the switching circuit to the first and second nodes. When the switching circuit is configured in a second state, the fundamental frequency tuning circuit and the harmonic frequency resonance circuit are electrically disconnected from the first and second nodes.

An acoustic impedance inverter is provided. In an embodiment, the acoustic impedance inverter can be coupled to an acoustic filter to provide needed impedance inversion at, for example, a series resonance frequency of the acoustic filter. In contrast to a conventional impedance inverter, which typically involves negatively coupled transformers, the acoustic impedance inverter utilizes a pair of acoustically coupled interdigital transducers (IDTs) to provide the needed impedance inversion at a tunable frequency. As a result, the acoustic impedance inverter can be implemented with a lower insertion loss and on a smaller footprint compared to the conventional impedance inventor.

The invention relates to a Doherty power amplifier with a reconfigurable output circuit. A Doherty power amplifier includes a first amplifier having a first output capacitance, a second amplifier having a second output capacitance, a reconfigurable impedance inverter, and a variable output impedance converter. A reconfigurable impedance inverter includes a combining node and first, second, and third variable networks. The first variable network and the first amplifier output capacitance establish a first amplifier effective output capacitance that is less than the first output capacitance. A second variable network provides a series inductance between the first amplifier output and the combining node. A third variable network and the second amplifier output capacitance establish a second amplifier effective output capacitance that is less than the second output capacitance. The output impedance transformer includes a fourth variable network that establishes a combined node impedance. The first, second and third variable networks and the output impedance transformer may be reconfigured based on traffic loading conditions.

Technologies are disclosed that implement impedance inversion using a combination of transmission lines and lump elements to provide a targeted transformation or inversion. These impedance inverters or transformers use a hybrid approach, combining transmission lines with lump elements, where the transmission lines provide a first fraction of a targeted overall phase shift and the lump elements provide a second fraction of the targeted overall phase shift so that the combination of the elements provides the targeted overall phase shift. The first fraction can be less than 50% and the second fraction can be greater than 50% so that the phase shift is not evenly divided between the components of the hybrid impedance inverters.

A time delay circuit includes a first port, a second port, a reference path coupled between the first and second ports, a delay path coupled between the first and second ports, and a control circuit configured to activate one of the reference path and the delay path. The reference path includes a series transistor and a first inductor connected in parallel with the series transistor. The delay path includes a first shunt transistor, a second inductor connected in parallel with the first shunt transistor, and a first impedance inverter coupled between the first port and the first shunt transistor.

The invention discloses a compact low-cost multi-chip Doherty power amplifier. The compact low-cost multi-chip Doherty power amplifier comprises a power divider, a carrier input matching network, a carrier transistor, a peak phase compensation input matching network, a peak transistor, a carrier impedance inversion output matching network and a peak output matching network. Wherein the power divider, the carrier input matching network, the carrier transistor, the peak phase compensation input matching network and the peak transistor form an amplification integrated circuit chip, and the high-mobility gallium nitride transistor can provide higher output power; the carrier impedance inversion output matching network and the peak value output matching network form a matching integrated circuit chip, and the matching integrated circuit chip preferably adopts a gallium arsenide thick gold process or a ceramic thick gold process, so that the cost can be reduced, and the function integration level can be improved. According to the invention, the reliability and consistency of the amplifier are enhanced, and a one-stop high-performance radio frequency microwave amplification solution can be provided for consumer electronics and communication equipment.

A multi-path amplifier (e.g., a Doherty amplifier) includes a first transistor (e.g., a main amplifier FET), a second transistor (e.g., a peak amplifier FET), a combining node, and a shunt inductive circuit. The first and second amplifiers and the combining node structure are formed integral with a semiconductor die, and the shunt inductive circuit is integrated with the die. Outputs of the first and second transistors are electrically coupled to the combining node structure. The shunt inductive circuit is electrically coupled between the combining node structure and a ground reference node. The shunt inductive circuit includes a shunt inductance (e.g., including one or more wire bonds and / or one or more spiral inductors) integrated with the semiconductor die. The multi-path amplifier can also include an integrated phase shifter / impedance inverter coupled between the outputs of the first and second transistors, and the integrated phase shifter / impedance inverter is configured to apply a 90 degree phase delay between intrinsic drains of the first and second transistors.