517 results about "Power processing" patented technology

Disclosed herein is a controller architecture that pairs a controller with a NVM (non-volatile memory) storage system over a high-level, high speed interface such as PCIe. In one embodiment, the NVM storage system includes a bridge that communicates with the controller via the high-level interface, and controls the NVM via an interface (e.g., ONFI). The controller is provided a rich set of physical level of controls over individual elements of the NVM. In one embodiment, the controller is implemented in a higher powered processor that supports advanced functions such as mapping, garbage collection, wear leveling, etc. In one embodiment, the bridge is implemented in a lower powered processor and performs basic signal processing, channel management, basic error correction functions, etc. This labor division provides the controller physical control of the NVM over a fast, high-level interface, resulting in the controller managing the NVM at both the page and block level.

A controller for a power processing circuit and a related method of operating the same. In one embodiment, the controller includes a multiplier configured to produce a product of an input current and an input voltage of the power processing circuit. The controller also includes a low-pass filter configured to produce an input power estimate of an input power to the power processing circuit as a function of the product of the input current and the input voltage. In another embodiment, the controller is a power-factor controller and includes a voltage loop compensator configured to produce a voltage compensation signal as a function of an output voltage of the power processing circuit. The controller also includes an input power estimator configured to produce an input power estimate of an input power to the power processing circuit as a function of the voltage compensation signal.

An arrangement (900) and method (1000) for providing power line communication from an AC power source (910) to a circuit (900) for supplying power to a load (960), as well as electronic ballasts (20,30,40,70,80) that operate according to the method (1000). Method (1000) includes the steps of: providing (1010) an AC power source (910) that includes hot, neutral, and ground wires (10,12,14) and a control station (914) for generating a power line carrier control signal; providing (1020) a power supply circuit (920) having an EMI filter (930), power processing circuitry (940), and a power line communication (PLC) circuit (950); setting (1030) a fundamental frequency of the power line carrier control signal to be about equal to either an effective common-mode resonant frequency of the EMI filter (930) or a harmonic thereof; injecting (1040) a power line carrier control signal between the neutral and ground wires (12,14) of the AC power source (910); detecting (1050) the power line carrier control signal by monitoring a current flowing from the ground wire (14) to a circuit ground (90); and directing (1060) the power processing circuitry (940) to control load power in dependence on the detected power line carrier control signal. Specific preferred embodiments are directed to electronic ballasts (20,30,40,70,80) that include various PLC circuits (300,400,500,700).

A photovoltaic module-mounted AC inverter circuit uses one or more integrated circuits, several switches, solid dielectric capacitors for filtering and energy storage, inductors for power conversion and ancillary components to support the above elements in operation. The integrated circuit includes all monitoring, control, and communications circuitry needed to operate the inverter. The integrated circuit controls the switches in both an input boost converter and a single-phase or multi-phase output buck converter. The integrated circuit also monitors all power processing voltages and currents of the inverter and can take appropriate action to limit power dissipation in the inverter, maximize the available power from the associated PV module and shut down the inverter output if the grid conditions so warrant. The integrated circuit implements power line communications by monitoring the AC wiring for signals and generating communications signals via the same pulse-width modulation system used to generate the AC power.

A power and control architecture employing circuitry that sequentially regulate power flows from independent solar-array sources or a mixture of power sources providing power to a common load. The device may be used on a satellite with solar-array sources; however it may also be used on ground based systems. Stiff bus voltage regulation is obtained by tightly controlling the most recently activated power-processing channel while keeping the previously activated power-processing channels in the Maximum Power Tracking mode to supply maximum power to a common load. The remaining power-processing channels are turned off or operated in stand-by mode. In an alternative system, with primary design goal of uniform power sharing among solar-array sources, all solar array sources are activated with uniform power sharing at light load and, as load demand increases, sequentially controlled to operate in the Maximum Power Tracking mode one solar array source at a time as necessary.