2results about How to "Compact form" patented technology

This invention discloses a thin-film solar cell with synergistic passivation and field-effect modulation functions, and its fabrication method, belonging to the field of solar cell technology. The core of this invention lies in introducing an ultrathin barium titanate (BaTiO3) interlayer between the back electrode and the CZTSSe absorber layer. This interlayer not only passively blocks electron backflow and suppresses interfacial recombination by utilizing its large conduction band offset with CZTSSe, but more importantly, it can induce BaTiO3 absorption during high-temperature selenization. 2+ Cu in CZTSSe + Non-equivalent cation migration and exchange occur, thereby actively constructing a directionally favorable cation migration and exchange-induced built-in electric field (CME-field) within the quasi-neutral region of the absorber layer, synergistically promoting the collection of photogenerated holes. This invention achieves a synergistic effect of "passive blocking" and "active driving," significantly improving battery performance and increasing the photoelectric conversion efficiency of battery devices to 14.00%.

A semiconductor structure and a method of forming the same, the method comprising: providing a substrate, the substrate having formed thereon a channel structure comprising one or more stacked channel layers, each channel layer comprising a first sacrificial layer and a channel layer on the first sacrificial layer, and a dummy gate structure across the channel structure, the dummy gate structure covering part of the sidewalls and part of the top of the channel structure, the substrate comprising a first device region and a second device region adjacent to each other; forming isolation sidewalls standing on the substrate between adjacent channel structures at the interface between the first device region and the second device region on both sides of the dummy gate structure; and forming source / drain doping layers in the channel structures on both sides of the dummy gate structure after forming the isolation sidewalls, the source / drain doping layers adjacent to each other at the interface between the first device region and the second device region being separated by the isolation sidewalls. Subsequent gate structures surround each surface of the channel layers, increasing the area of the channel layers used as channels.