A method to fabricate an
integrated circuit (IC) that includes a plurality of MOSFETs including at least one
common gate FinFET device and at least one split gate FinFET device. A substrate having a
semiconductor surface is provided. A plurality of fins are formed from the
semiconductor surface including at least one taller fin of a first height and at least one shorter fin of a second height, wherein the first height is at least 10% greater than the second height. Gate slacks are formed on the taller and shorter fins such that a gate
electrode for the taller fin is a split gate
electrode and a gate
electrode for the shorter fin is a
common gate electrode. Fabrication of the IC is completed, wherein the split gate FinFET includes the split gate electrode and the
common gate FinFET device includes the common gate electrode. An IC includes a substrate having a
semiconductor surface, a plurality of semiconductor fins including at least one taller fin of a first height and at least one shorter fin of a second height, wherein the first height is at least 10% greater than the second height, and at least one common gate FinFET device formed from the shorter fin and at least one split gate FinFET device providing a parallel gate
transistor pair comprising a first and a second
transistor formed from the taller fin.