186results about How to "Reduce stray capacitance" patented technology

A touch sensor panel is disclosed having an array of co-planar single-layer touch sensors fabricated on a single side of a substrate. The sense (or drive) lines can be fabricated in a single strip as columnar or zig-zag patterns in a first orientation, and the drive (or sense) lines can be fabricated as rows of polygonal (e.g. brick-shaped or pentagonal) conductive areas in a second orientation. Each sense (or drive) line in the first orientation can be coupled to a separate metal trace in the border area of the touch sensor panel, and each polygonal area in the second orientation can also be coupled to a metal trace in the border area of the touch sensor panel. The metal traces can allow both the row and column lines to be routed to the same edge of the substrate for flex circuit attachment.

A powered dispenser for dispensing individual sheet segments from a continuous roll of sheet material provided with spaced tear lines comprises a powered feed mechanism, a releasable, powered drive mechanism, a powered transfer mechanism, a pair of web sensing sensors, a capacitive sensing system providing automatic sensitivity adjustment, and control circuitry. A dual power supply system provides a mechanical lock-out functionality, and the control system is protected from electrostatic build-up on the surface of the feed roller. The web sensor, and an antenna plate of the capacitive sensing system, are provided on respective printed circuit boards mounted in overlying relation. Utilizing signals received from the pair of web sensors and the capacitive sensing system, the control circuitry senses the presence of a user to activate the powered drive mechanism, and prevents further dispensing of the sheet material until a previously dispensed segment is separated from the roll. The web sensors detection of a leading edge of the sheet material initiates a predetermined interval of sheet material advancement providing a proper placement of successive tear lines. Various approaches may be utilized to accommodate inadvertent sheet “tabbing” scenarios. The web sensors, together with the control circuitry, are also used to detect the depletion, or absence, of a working roll of sheet material, whereupon the control circuitry controls the powered transfer mechanism to automatically transfer the web feed supply from a depleted working roll to a reserve roll. The powered transfer mechanism may include a motor driven transfer bar, or provide motor driven release of a spring biased transfer bar. Another arrangement allows for ready release of a roll core, and drop of the same into an open dispenser cover for removal.

A powered dispenser for dispensing individual sheet segments from a continuous roll of sheet material provided with spaced tear lines comprises a powered feed mechanism, a releasable, powered drive mechanism, a powered transfer mechanism, a pair of web sensing sensors, a capacitive sensing system providing automatic sensitivity adjustment, and control circuitry. A dual power supply system provides a mechanical lock-out functionality, and the control system is protected from electrostatic build-up on the surface of the feed roller. The web sensor, and an antenna plate of the capacitive sensing system, are provided on respective printed circuit boards mounted in overlying relation. Utilizing signals received from the pair of web sensors and the capacitive sensing system, the control circuitry senses the presence of a user to activate the powered drive mechanism, and prevents further dispensing of the sheet material until a previously dispensed segment is separated from the roll. The web sensors detection of a leading edge of the sheet material initiates a predetermined interval of sheet material advancement providing a proper placement of successive tear lines. Various approaches may be utilized to accommodate inadvertent sheet “tabbing” scenarios. The web sensors, together with the control circuitry, are also used to detect the depletion, or absence, of a working roll of sheet material, whereupon the control circuitry controls the powered transfer mechanism to automatically transfer the web feed supply from a depleted working roll to a reserve roll. The powered transfer mechanism may include a motor driven transfer bar, or provide motor driven release of a spring biased transfer bar. Another arrangement allows for ready release of a roll core, and drop of the same into an open dispenser cover for removal.

A transformer that improves the DC superposition characteristic without incurring eddy-current losses. In the transformer, a part of a plate-like core opposing a top face of a flange of a drum core is formed with a first opposing portion opposing none of input and output terminals and a second opposing portion opposing the input and output terminals. A first gap is formed between the top face and the first opposing portion by a spacer. A second gap greater than the first gap is formed by a recess of the plate-like core provided so as to correspond to the second opposing portion. This allows magnetic fluxes to pass between the top face and the first opposing portion where the gap is formed and inhibits them from passing between the plate-like core and the input and output terminals where the second gap greater than the first gap is formed.

A robust, easily deployable, covert, passive intrusion detection system uses one or more E-field sensors to detect the presence of a moving individual and to provide an indication of the presence of the individual adjacent the sensor based on E-field distortion produced by the individual. Single-ended and differential E-field sensors with noise canceling and a guarding circuit provide sufficient sensitivity, with filtering from 0.5 Hz to 8.0 Hz selecting only human intruders. Either visible or invisible flashing light sources at the sensor indicate the presence of a moving individual at the sensor, thus to provide intruder location without the necessity of providing a geolocation system.

An electrostatic capacitance detection circuit 10 comprises an AC voltage generator 11, an operational amplifier 14 of which non-inverting input terminal is connected to specific potential (a ground in this example), an impedance converter 16, a resistance (R1) 12 connected between the AC voltage generator 11 and an inverting input terminal of the operational amplifier 14, a resistance (R2) 13 connected between the inverting input terminal of the operational amplifier 14 and an output terminal of the impedance converter 16, and an impedance element (a capacitor) 15 connected between an output terminal of the operational amplifier 14 and an input terminal of the impedance converter 16, and a capacitor to be detected 17 is connected between the input terminal of the impedance converter 16 and specific potential. The electrostatic capacitance detection circuit 10 and the capacitor 17 are located adjacently.

An antenna array may include an antenna element configured to receive an RF signal. A PIN diode may selectively couple the antenna element to an RF source. Biasing the PIN diode may cancel the received RF signal at a stub coupled to the diode thereby reducing stray capacitance of the PIN diode. A method for switching antenna elements is also disclosed. A PIN diode coupled to an antenna element is biased thereby reflecting the received RF signal out-of-phase within a stub such that the signal is canceling and stray capacitance of the PIN diode is reduced.

Data transfer speed is increased in a semiconductor storage device in which the core unit and the interface unit are separate chips. The device has a plurality of core chips through in which a memory cell is formed, and an interface chip in which a peripheral circuit is formed for the memory cell. The plurality of core chips through have latch circuit units through for temporarily storing data to be outputted by the memory cell, and latch circuit units through for temporarily storing data to be inputted to the memory cell, respectively, and these latch circuit units through and latch circuit units through are connected in a cascade to the interface chip. Since the plurality of latch circuit units connected in a cascade can thereby perform a pipeline operation, it becomes possible to achieve high-speed data transfer.

A coil component includes a first coil block and a second coil block that are sandwiched between magnetic substrates so as to form a chip body, and external electrodes that are attached to the chip body. The first coil block includes a coil body and an insulating body. The coil body includes an outer coil portion and an inner coil portion. The outer coil portion includes a first pattern group and a second pattern group, which are connected helically vertically in an alternating fashion. The inner coil portion includes a first spiral pattern and a second spiral pattern, which are connected to each other in series. In other words, low stray capacitance is achieved by the outer coil portion, while high inductance is achieved by the inner coil portion.

There is provided a light emitting device having a small area for mounting. The light emitting device of the invention includes a light emitting element having an electric signal terminal, that is driven to emit light by an electric signal given to the electric signal terminal from outside, and a semiconductor chip for driving the light emitting element, having a light emitting element drive circuit that is made of a semiconductor, outputs and applies the electric signal to the electric signal terminal. The light emitting elements are mounted on the surface of the semiconductor chip for driving the light emitting element, and a conductive path is provided for mutually connecting a plurality of light emitting elements on the surface of the semiconductor chip for driving the light emitting element.

A capacitance tomography sensor is provided in the invention, wherein a sensor framework is added to the capacitance tomography sensor. A measurement electrode is arranged on an inner wall of the sensor framework to prevent direct contact between the measurement electrode and a to-be-test fluid. A shield electrode group is disposed on an outer side surface of the sensor framework to achieve electrical insulation from the measurement electrodes. By means of the structure, installation of the measurement electrode and the shield electrode group is more flexible.

The invention provides a ceramic electronic component having the low dielectric constant of a ceramic sintered body and excellent impedance properties in a GHz zone and capable of obtaining high impedance properties in a wide frequency range, and its manufacturing method. This ceramic electronic component is formed by forming a green compact which includes an electrode therein with a ceramic compound comprising a ceramic raw material, a binder and a spherical or granular combustible material having adhesiveness to the binder. The green compact is fired to form the ceramic sintered compact including the electrode and containing about 35 to 80 volume percent pores. The pores of the ceramic sintered compact are filled with resin or glass.

Systems and methods for generating a high voltage pulse. A series of voltage cells are connected such that charging capacitors can be charged in parallel and discharged in series. Each cell includes a main switch and a return switch. When the main switches are turned on, the capacitors in the cells are in series and discharge. When the main switches are turned off and the return switches are turned on, the capacitors charge in parallel. One or more of the cells can be inactive without preventing a pulse from being generated. The amplitude, duration, rise time, and fall time can be controlled with the voltage cells. Each voltage cell also includes a balance network to match the stray capacitance seen by each voltage cell.

A structure for protecting an integrated circuit against electrostatic discharges, including a device for removing overvoltages between first and second power supply rails; and a protection cell connected to a pad of the circuit including a diode having an electrode, connected to a region of a first conductivity type, connected to the second power supply rail and having an electrode, connected to a region of a second conductivity type, connected to the pad and, in parallel with the diode, a thyristor having an electrode, connected to a region of the first conductivity type, connected to the pad and having a gate, connected to a region of the second conductivity type, connected to the first rail, the first and second conductivity types being such that, in normal operation, when the circuit is powered, the diode is non-conductive.

A micromechanical component having a conductive substrate, a first conductive layer provided above the substrate and that forms, above a cavity provided in the substrate, an elastically deflectable diaphragm region of monocrystalline silicon and an adjacent peripheral region, a circuit trace level provided above the first conductive layer in a manner that is electrically insulated from the first conductive layer, the circuit trace level having above the diaphragm region a first electrode region and having above the peripheral region a first connection region electrically connected to the same, and a second conductive layer that is provided above the circuit trace level, the second conductive layer having above the diaphragm region a second electrode region that is electrically insulated from the first electrode region, and having above the peripheral region a second connection region electrically insulated from the second electrode region and electrically connected to the first connection region. Also provided is a suitable production method.

A liquid crystal display capable of reducing the stray capacitance of a non-display region and a method of manufacturing the same. The liquid crystal display includes a first substrate, gate lines and data lines intersecting each other on the first substrate to define pixels, a second substrate arranged opposite to the first substrate, a common electrode formed in a display area of the second substrate in which an image is displayed, and a floating electrode formed in a non-display region of the second substrate in which no image is displayed.

A noise filter includes a capacitor having a hot side input terminal, a hot side output terminal, a ground side input terminal, and a ground side output terminal. A circuit board includes a hot side input electrode connected to the hot side input terminal, a hot side output electrode connected to the hot side output terminal, a ground side input electrode connected to the ground side input terminal, and a ground side output electrode connected to the ground side output terminal. The impedance of the ground side input terminal seen from the ground side output electrode is larger than both the impedance of the ground side output terminal seen from the ground side output electrode and the impedance of the hot side output terminal seen from the ground side output electrode. For this purpose, a stray capacitance formed between the ground side input electrode and the ground side output electrode is reduced by increasing a gap therebetween. Accordingly, excellent noise-reducing characteristics are provided.

A touch sensor panel is disclosed having an array of co-planar single-layer touch sensors fabricated on a single side of a substrate. The sense (or drive) lines can be fabricated in a single strip as columnar or zig-zag patterns in a first orientation, and the drive (or sense) lines can be fabricated as rows of polygonal (e.g. brick-shaped or pentagonal) conductive areas in a second orientation. Each sense (or drive) line in the first orientation can be coupled to a separate metal trace in the border area of the touch sensor panel, and each polygonal area in the second orientation can also be coupled to a metal trace in the border area of the touch sensor panel. The metal traces can allow both the row and column lines to be routed to the same edge of the substrate for flex circuit attachment.

There is provided a semiconductor device including a first conductive layer, an insulating layer, a second conductive layer, a channel layer, a passivation layer and a third conductive layer. The insulating layer covers the first conductive layer. The second conductive layer is formed on the insulating layer and has an inner opening. The channel layer is formed on the inner opening of the second conductive layer to fully cover the inner opening. The passivation layer is formed upon the channel layer to cover the channel layer and has a contact hole inside the inner opening of the second conductive layer. The third conductive layer is formed in the contact hole.

Systems and methods for generating a high voltage pulse. A series of voltage cells are connected such that charging capacitors can be charged in parallel and discharged in series. Each cell includes a main switch and a return switch. When the main switches are turned on, the capacitors in the cells are in series and discharge. When the main switches are turned off and the return switches are turned on, the capacitors charge in parallel. One or more of the cells can be inactive without preventing a pulse from being generated. The amplitude, duration, rise time, and fall time can be controlled with the voltage cells. Each voltage cell may also includes a balance network to match the stray capacitance seen by each voltage cell. Droop compensation is also enabled.

The invention comprises a manufacturing method of an evanescent wave coupling high-speed high-power photoelectric detector. The method comprises a, sequentially growing an InP stress buffering layer, ten cycle-alternating InP / InGaAsP diluted waveguide layers, two InGaAsP light matching layers, three InGaAs absorbing layers, an InP diffusion barrier layer and an InGaAs contact layer; b, doping the InGaAs contact layer through a Zn3As2 source; c, fabricating a P electrode; d, defining an active area; e, defining an optical fiber input waveguide area; f, defining a coupling waveguide area; g, fabricating an N electrode; h, guaranteeing good ohmic contact between the P electrode and the N electrode through a rapid annealing method; i, planarizing the whole table board through benzocylobutene materials to the same plane with the P electrode; j, fabricating coplanar waveguide electrodes; k, thinning epitaxial wafers to 110 mu m and cleaving the epitaxial wafers to strip array chips; l, coating film on the waveguide end surfaces of the strip array chips; m, cleaving the array chips into unit chips.

Data transfer speed is increased in a semiconductor storage device in which the core unit and the interface unit are separate chips. The device has a plurality of core chips through in which a memory cell is formed, and an interface chip in which a peripheral circuit is formed for the memory cell. The plurality of core chips through have latch circuit units through for temporarily storing data to be outputted by the memory cell, and latch circuit units through for temporarily storing data to be inputted to the memory cell, respectively, and these latch circuit units through and latch circuit units through are connected in a cascade to the interface chip. Since the plurality of latch circuit units connected in a cascade can thereby perform a pipeline operation, it becomes possible to achieve high-speed data transfer.

A coil component includes a first coil block and a second coil block that are sandwiched between magnetic substrates so as to form a chip body, and external electrodes that are attached to the chip body. The first coil block includes a coil body and an insulating body. The coil body includes an outer coil portion and an inner coil portion. The outer coil portion includes a first pattern group and a second pattern group, which are connected helically vertically in an alternating fashion. The inner coil portion includes a first spiral pattern and a second spiral pattern, which are connected to each other in series. In other words, low stray capacitance is achieved by the outer coil portion, while high inductance is achieved by the inner coil portion.

Systems and methods for generating a high voltage pulse. A series of voltage cells are connected such that charging capacitors can be charged in parallel and discharged in series. Each cell includes a main switch and a return switch. When the main switches are turned on, the capacitors in the cells are in series and discharge. When the main switches are turned off and the return switches are turned on, the capacitors charge in parallel. One or more of the cells can be inactive without preventing a pulse from being generated. The amplitude, duration, rise time, and fall time can be controlled with the voltage cells. Each voltage cell may also include a balance network to match the stray capacitance seen by each voltage cell. Droop compensation is also enabled. Isolation diodes ensure that a discharge current can bypass inoperable voltage cells.

The invention provides a pixel circuit of a CMOS (complementary metal oxide semiconductor) image sensor, which is characterized by using at least two transferring transistors for respectively transferring the accumulated optical signals of corresponding photodetectors to a first node, using a resetting transistor for resetting the voltage of the first node as the preset resetting voltage of a second node, and using a source follower for buffering the integrated optical signals. In the embodiment of the invention, a capacitor is connected between the first node and the second node, so as to reduce the impact of the effective capacitance comprising the capacitance in the floating diffusion areas and the stray capacitance in the photodetectors and transferring transistors.

The invention discloses a pixel array of liquid crystal display devices, comprising M data lines, N scan lines and a plurality of pixel structures electrically connected with the data lines and the scan lines and arranged in an array, wherein each pixel structure comprises a switch component, at least one main pixel electrode, at least one pixel electrode, a first capacity coupling electrode pattern and a second coupling electrode pattern, the switch component is electrically connected with the first scan line and the first data line, at least one main pixel electrode and at least one pixel electrode are electrically connected with the switch component, the first and the second capacitor coupling electrode patterns are electrically connected with at least one main pixel electrode and are coupled with at least one pixel electrode in a capacitor type, the first capacitor coupling electrode pattern is adjacent to the first data line and the second capacitor coupling electrode pattern is adjacent to the second data line.