A junctionless field effect transistor
A field effect transistor, junctionless technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as poor stability
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Embodiment 1
[0040] Please refer to figure 1 , Is a schematic structural diagram of a junctionless field effect transistor provided by an embodiment of the present invention, such as figure 1 As shown, the junctionless field effect transistor includes a channel region 1, a source region 3, a drain region 4, a gate electrode 6, a source electrode 8 and a drain electrode 9.
[0041] Among them, the source region 3 and the drain region 4 are centered symmetrically on both sides of the channel region 1, so that the carriers in the channel region 1 can travel from the source region 3 to the drain region 4 or from the drain region 4 to the source region 3. The direction in which the source region 3 and the drain region 4 are arranged can be understood as the channel direction to indicate the direction of carrier transport; in an exemplary embodiment, the source region 3 and the channel region 1 can also be An extension area 2 is provided, and an extension area 2 can also be provided between the drai...
Embodiment 2
[0065] On the basis of Example 1, please refer to figure 1 with Figure 5 , Is a schematic structural diagram of a tri-gate junctionless field effect transistor provided by an embodiment of the present invention. Such as Figure 5 As shown, the junctionless field effect transistor includes a channel region 1, an extension region 2, a source region 3, and a drain region 4; wherein, the channel region 1, the extension region 2, the source region 3 and the drain region 4 all include top Surface and two side surfaces, and the channel region 1, the extension region 2, the source region 3 and the drain region 4 are all arranged on the substrate 12, which can be a silicon substrate, etc., which is not limited in the embodiment of the present invention; The gate dielectric layer covers the top surface and all sides of the channel region 1, and the gate electrode 6 covers the gate dielectric layer to form a three-gate structure, thereby enhancing the control ability of the gate electrode...
Embodiment 3
[0068] On the basis of Example 1, please refer to figure 1 with Image 6 , Is a schematic diagram of the structure of a ring-gate junctionless field effect transistor provided by an embodiment of the present invention, such as Image 6 As shown, the junctionless field effect transistor includes a channel region, an extension region, a source region, and a drain region; wherein the channel region, the extension region, the source region and the drain region are all cylindrical structures; the gate dielectric layer is arranged around On the outer circumference of the channel region, the gate electrode 6 is further arranged around the outer circumference of the gate dielectric layer to form a ring-gate structure; the isolation dielectric layer 7 is arranged around the outer circumference of the extension area, thereby realizing the gap between the source electrode 8 and the gate electrode 6, And the isolation between the drain electrode 9 and the gate electrode 6; the source diele...
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