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2results about How to "Increase the on-state current" patented technology

Transistor and preparation method thereof, semiconductor device and electronic equipment

The invention discloses a transistor, a preparation method thereof, a semiconductor device and electronic equipment. The transistor includes a channel, a gate structure, a first pole assembly, and a second pole assembly. The gate structure includes a gate electrode. The first pole assembly and the second pole assembly are located on the two sides of the gate structure in the first direction respectively and connected with the channel. The orthographic projection of at least one of the first pole assembly and the second pole assembly on the substrate is overlapped with the orthographic projection of the channel on the first plane; or, the orthographic projection of the first pole assembly and the orthographic projection of the second pole assembly on the first plane are not overlapped with the orthographic projection of the channel on the first plane, and the two ends of the gate structure in the first direction are correspondingly flush with the two ends of the channel in the first direction. According to the transistor and the preparation method thereof, the semiconductor device and the electronic equipment, the distance between the gate electrode and the source / drain electrode can be reduced, and the electrical property of the transistor can be improved.
Owner:BEIJING SUPERSTRING ACAD OF MEMORY TECH

Semiconductor device and method of manufacturing the same, electronic device

PendingCN122269703Aincrease the areaIncrease gate control areaBit lineDevice material
The application provides a semiconductor device and a manufacturing method thereof, and an electronic device. The manufacturing method of the semiconductor device comprises the following steps: manufacturing a plurality of bit lines, the plurality of bit lines are sequentially distributed along a second direction; manufacturing a first dielectric layer covering the plurality of bit lines; sequentially manufacturing a sacrificial layer and a second dielectric layer covering the first dielectric layer; forming a plurality of first through holes penetrating through the second dielectric layer, the sacrificial layer and the first dielectric layer and being arrayed and distributed; the bottom of the first through hole is exposed to the bit line; removing part of the second dielectric layer and part of the first dielectric layer arranged around the periphery of the first through hole to form a first channel; manufacturing a plurality of semiconductor columns; the semiconductor columns correspond to fill the first through hole and the first channel arranged around the periphery of the first through hole; replacing the sacrificial layer with a plurality of gate insulating layers and a plurality of gates arranged around the periphery of the plurality of semiconductor columns to obtain a plurality of transistors. The application realizes the improvement of the gate control area and the gate control ability, effectively increases the on-state current, and improves the on-off ratio of the device.
Owner:BEIJING SUPERSTRING ACAD OF MEMORY TECH