98 results about "Turn off time" patented technology

The invention discloses a power modulation method and system for an all-solid-state power supply, and belongs to the technical field of pulse power. The method comprises the following steps: converting a target waveform into a multi-level discrete waveform, and segmenting the multi-level discrete waveform into a plurality of continuous sub-waveforms according to polarity; for each sub-waveform, identifying all level switching moments, obtaining a time-level number corresponding relation, and generating a corresponding switching action time sequence matrix; the row index of the switching action time sequence matrix corresponds to the level number, the odd-numbered columns store the turn-on time parameters of the switching devices under the corresponding level number, and the even-numbered columns store the turn-off time parameters of the corresponding switching devices; and converting the switching action time sequence matrix into period counting based on an FPGA main clock, and generating a corresponding driving pulse signal by the FPGA according to time sequence data so as to control a switching device in the all-solid-state power supply and carry out power modulation. High-real-time and high-precision control on the switch of the solid-state power supply is realized, and the effect of arbitrary waveform power modulation is realized.

The invention discloses a load transient detection circuit of a COT Buck, a corresponding COT Buck and a switching power supply. The load transient detection circuit comprises an input end, three resistors connected in series, two comparators and a switched capacitor sampling hold circuit, wherein the input end is grounded after passing through the three resistors in sequence. A node between the input end and the first resistor and a node between the second resistor and the third resistor are connected to the input ends of the first comparator and the second comparator through a switched capacitor sampling hold circuit structure. Valley voltage information and peak voltage information of inductive current are obtained through the switched capacitor sampling hold circuit, whether a load is transiently changed or not is judged by comparing inductive current ripples with a valley value and a peak value, and it is guaranteed that the switching power supply has appropriate transient detection trigger threshold voltage under any load. According to an output signal of the load transient detection circuit, the COT Buck can increase the turn-on or turn-off time so as to enhance the transient response speed.

The application relates to a critical conduction mode control method of a totem-pole PFC converter, which utilizes energy equivalence to determine the resonance process of inductor current at switching commutation, carries out totem-pole Boost inductor current value estimation, and on this basis, utilizes a current zero-crossing point prediction algorithm to calculate the turn-on and turn-off time to generate corresponding active tube-synchronous rectifier tube commutation dead time T d,f , synchronous rectification conduction time T SR , rectifier tube-active tube commutation dead time T d,r ; the PWM drive signals of high-speed switching tubes Q1 and Q2 are generated by T on , T d,f , T SR , T d,r ; the power frequency drive signals of low-speed switching tubes Q3 and Q4 are generated by comparing the input alternating voltage v ac with a hysteresis comparison loop and 0. The method can effectively get rid of the dependence on a current zero-crossing detection circuit and a current sensor, reduces the cost and improves the system stability.

This invention discloses a load transient detection circuit for a COT Buck converter, along with a corresponding COT Buck and a switching power supply. The load transient detection circuit includes an input terminal, three resistors connected in series, two comparators, and a switched-capacitor sample-and-hold circuit. The input terminal is grounded after passing through the three resistors. The nodes between the input terminal and the first resistor, and between the second and third resistors, are connected to the input terminals of the first and second comparators via the switched-capacitor sample-and-hold circuit. The valley and peak voltage information of the inductor current is obtained through the switched-capacitor sample-and-hold circuit. By comparing the inductor current ripple with the valley and peak values, a transient change in the load is determined, ensuring that the switching power supply has a suitable transient detection trigger threshold voltage under any load. The COT Buck of this invention increases the on or off time based on the output signal of the load transient detection circuit to enhance the transient response speed.

The utility model belongs to the field of static change-over switches, and provides a static change-over switch, which comprises a machine body provided with an external power supply connecting end, a load connecting end and a standby power supply connecting end, and the standby power supply connecting end is electrically connected with the load connecting end; and the mainboard and relay integration is arranged in the machine body and is electrically connected with the mainboard, the external power supply connecting end, the load connecting end and the standby power supply connecting end. Compared with the prior art, the static change-over switch has the advantages that the relay is integrally arranged in the machine body and matched with the main board, the relay is adopted as a turn-off element of the static change-over switch, the turn-off time can be shortened to about 10ms, the defect that a thyristor does not conform to safety regulations is overcome, and the defects that a contactor is low in turn-off speed and high in cost are overcome. According to the technical scheme, the static change-over switch is economical and low in manufacturing cost, the stability and reliability of the whole system are guaranteed, and rapid switching of the static change-over switch between the grid-connected mode and the off-grid mode can be achieved.

The application discloses a power modulation method and system of a full solid-state power supply, and belongs to the technical field of pulse power. The method comprises the following steps: converting a target waveform into a multi-level discrete waveform, and dividing the multi-level discrete waveform into a plurality of continuous sub-waveforms according to polarity; for each sub-waveform, identifying all level switching moments to obtain a time-level number corresponding relationship, and generating a corresponding switch action time sequence matrix; the row index of the switch action time sequence matrix corresponds to the level number, and the odd columns store the turn-on time parameters of the corresponding switch devices under the corresponding level number, and the even columns store the turn-off time parameters of the corresponding switch devices; the switch action time sequence matrix is converted into period counting based on the main clock of the FPGA, and the FPGA generates corresponding driving pulse signals according to the time sequence data, so as to control the switch devices in the full solid-state power supply and perform power modulation. The switch of the solid-state power supply is controlled with high real-time performance and high precision, and the effect of arbitrary waveform power modulation is realized.

The application discloses a dead time control circuit and electronic equipment, and belongs to the technical field of electronics. The dead time control circuit comprises an inductive element, a first field effect tube connected with the inductive element, a second field effect tube connected with the inductive element and the first field effect tube, a detection circuit for detecting a first switching state of the first field effect tube, a second switching state of the second field effect tube and a current flow direction of the inductive element, a logic judgment circuit for outputting an adjustment mode signal of a dead time, a first off time and a second off time according to the first switching state, the second switching state and the current flow direction, an operation circuit for outputting a dead time control signal according to the first off time and the second off time in an adjustment direction indicated by the adjustment mode signal, and a time delay circuit, wherein the dead time control signal is used for adjusting a time delay value of the time delay circuit to adjust the dead time of the first field effect tube and the second field effect tube.

The invention discloses a self-adaptive direct connection prevention double-N-type output driving circuit which comprises a first control circuit, a second control circuit, an output driving stage upper tube, an output driving stage lower tube, a diode D1, a resistor R1 and a resistor R2. The output driving stage upper tube MN1 and the output driving stage lower tube MN2 are NMOS (N-channel metal oxide semiconductor) tubes; the first control circuit is used for controlling the output driving stage upper tube to be conducted when a first time sequence signal CLK is valid; and the second control circuit is used for controlling the output driving stage lower tube to be switched on in a time delay manner when the first time sequence signal CLK is invalid. In the invention, the switch-on time and the switch-off time of the two channels can be respectively controlled by adjusting the resistor R1 and the resistor R2, and an NMOS tube with higher carrier mobility is used as a pull-up tube, so that the current pull-up capability is stronger; and self-adaptive conduction of the output driving stage upper tube and the output driving stage lower tube is formed, so that the high-speed GaN power tube driver can be suitable for a high-speed GaN power tube driver.

The circuits and methods of the present disclosure control the active off-time (high side switch on-time) to ensure the magnetization energy release and resonant capacitor energy release in an asymmetrical half-bridge (AHB) converter finish at the same time and all the stored energy is delivered to the output in each switching cycle. Multiple, parallel, techniques to control the high side switch on-time are illustrated. One is to track the volt-seconds applied during the storage cycle and allow the active release off-time to be limited to the same volt-seconds. A second option is to provide a high side switch on-time that is proportional to the on-time of the low side switch in that switching cycle. A third option is to provide a maximum high side switch on-time that can be programmed to ensure the high side on-time is equal to or smaller than half of the resonant period.

The objective is to provide a control device for a rotating electric machine that can prevent the generation of gate command signals that attempt to perform synchronous rectification during an abnormal period, even when the diode on-timing or diode off-timing cannot be correctly detected. [Solution] The control device 100 includes a synchronous rectification permission signal generation unit that generates synchronous rectification permission signals Swp and Swn based on the conduction state of the diodes; a switching signal generation unit 54 that generates switching signals Qp and Qn by setting the ON interval of the switching element within the range of the synchronous rectification permission intervals Tp and Tn indicated by the corresponding synchronous rectification permission signals Swp and Swn; an assumed permission interval setting unit that sets assumed permission intervals Tp* and Tn* of the synchronous rectification permission signals Swp and Swn based on the operating state of the rotating electric machine 1; and an abnormality determination unit 56 that determines whether or not there is an abnormality by comparing the synchronous rectification permission intervals Tp and Tn with the assumed permission intervals Tp* and Tn*.

A power switching circuit includes a driving signal part, a first switch element, a second switch element, a first driving circuit and a second driving circuit. The first driving circuit includes a first resistor and a first connection branch, which are connected between a positive driving signal terminal of the driving signal part and a first driving terminal of the first switch element, respectively. The second driving circuit includes a third resistor and a second connection branch, which are connected between the positive driving signal terminal and the second driving terminal of the second switch element, respectively. In a same switching cycle, the turn-on time of the first switch element is earlier than the turn-on time of the second switch element and the turn-off time of the first switch element is earlier than the turn-off time of the second switch element.

The application discloses a pumped storage full-power frequency converter power unit variable frequency control method and device, N power units are cascaded at an AC end to form a test valve, and M power units are cascaded at the AC end to form a test valve; the method is used for controlling the test valve to output several AC frequency target values, and the method comprises the following steps: pre-charging DC capacitors in the test valve and the test valve to target values; determining corresponding output current / power target values according to the AC frequency target values to be output; controlling the turn-on and turn-off time of the turn-off semiconductor of each power unit in the test valve and the test valve, so that the actual output current / power of the test valve is the output current / power target value, and the actual output frequency of the test valve is the AC frequency target value. The application can simulate the continuous speed regulation operation condition of the pumped storage full-power frequency converter power unit on the pumped storage unit.

This invention discloses an automatic switching system, method, and drive circuit for an uninterruptible power supply (UPS) in the field of power electronics. It includes a power module for providing electrical energy to the system; a relay switch unit for controlling the switching of mains power input; an accelerated turn-off unit for accelerating the turn-off of the relay switch unit; a circuit switching unit for switching a high-current drive circuit to a low-current drive circuit after a predetermined delay; and a control module for outputting a high-level signal to control the circuit switching unit to switch the high-current drive circuit to accelerate the closing of the relay switch unit, and outputting a low-level signal to control the accelerated turn-off unit to accelerate the turn-off of the relay switch unit. This invention employs a delayed switching drive design and an accelerated turn-off unit, which significantly simplifies the power supply hardware design, reduces the power requirements of the auxiliary power module, and significantly shortens the relay turn-off time, ensuring the stability and reliability of the UPS during the switching process.

Power conversion device (1) with a high-potential line (11H) and a low-potential line (11L), an upper branch semiconductor device (2H) connected to the high potential line, a sub-branch semiconductor device (2L) connected in series with the upper-branch semiconductor device (2H) and connected to the low-potential line, and a capacitor (3) which is connected between the high potential line and the low potential line, wherein from the upper branch semiconductor device and the lower branch semiconductor device connected in series, the upper branch semiconductor device forms a parallel circuit body (20) configured from two or more switching elements (2) connected in parallel to each other, and / or the lower branch semiconductor device forms a parallel circuit body (20) configured from two or more switching elements (2) connected in parallel to each other, in the upper branch semiconductor device and the Sub-branch semiconductor device connected in series, a return flow element (21) in the parallel circuit body is provided to allow current flow from a low-potential line side to a high-potential line side, The switching elements that form the parallel circuit body are controlled in such a way that the switching-off times are different from each other. a last-off element (22) that switches off last, and a non-last-off element (23) as the other element among the switching elements that form the parallel circuit body, an inductance of a closed last-off circuit (101) in which current flows through the last-off element, the return element in an opposite branch opposite to the last-off element, and the capacitor, is smaller than the inductance of a closed non-last-off circuit (102) in which current flows through the non-last-off element connected in parallel to the last-off element, the return element in an opposite branch opposite to the last-off element, and the capacitor, wherein the parallel body of the upper branch semiconductor device comprises the last-off element, the non-last-off element and the return element, and the parallel body of the lower branch semiconductor device comprises the last-off element, the non-last-off element and the return element, the last-off element, the non-last-off element and the reflux element in the upper-branch semiconductor device are mounted on a common upper-branch module (50H) as a single common semiconductor device, and the last-off element, the non-last-off element and the reflux element in the sub-branch semiconductor device are mounted on a common sub-branch module (50L) as a single common semiconductor device, the common upper branch module and the common lower branch module are each configured such that two power connections (551, 552) project from a module body (550), and the inductance of a wiring path in the module body that connects the power terminals via the last-off element is smaller than the inductance of a wiring path in the module body that connects the power terminals via the non-last-off element, wherein the common upper branch module and the common lower branch module are configured such that the two power terminals project from the module body in the same direction, and a center position (C) in a base section of the two power terminals is closer to the last-off element than to the non-last-off element in a direction in which the last-off element and the non-last-off element are arranged.

The invention discloses a vector switching method of a converter, which comprises the steps of detecting voltage values of a current voltage vector and a voltage vector to be switched, and executing voltage vector switching according to the voltage value of the current voltage vector and the voltage value of the voltage vector to be switched. The switching time sequence of the switching tube of the converter bridge arm is as follows: t Soff1 < = t Son2; when the target voltage vector is switched from the low voltage phase to the high voltage phase, the switching time sequence of the switching tube of the converter bridge arm is as follows: t Soff2 is less than or equal to t Son1; t Soff1 is the turn-off time of the switch tube, needing to be turned off, of the converter bridge arm, the source electrode of the switch tube faces the bridge arm intersection point, t Son2 is the turn-on time of the switch tube, needing to be turned on, of the converter bridge arm, the drain electrode of the switch tube faces the bridge arm intersection point, and t Soff2 is the turn-off time of the switch tube, needing to be turned off, of the drain electrode of the switch tube faces the bridge arm intersection point; t Son1 is the turn-on time of the switch tube, which needs to be turned on, of the converter bridge arm and of which the source electrode faces the bridge arm intersection point.

The application provides an active voltage regulation dynamic model test device and method, which comprises an active voltage regulator, a power grid disturbance device and a DC power transmission simulation system, wherein the power grid disturbance device is used to generate disturbance or simulate fault and apply the disturbance or fault on the DC power transmission simulation system; the active voltage regulator is used to adjust the winding voltage when the power grid disturbance device generates disturbance or simulates fault, and deliver the adjusted voltage to the DC power transmission simulation system for transmission; the DC power transmission simulation system comprises a thyristor cooling / heating system, which is used to control the temperature of the thyristor devices in the rectifier bridge and the inverter bridge in the DC power transmission simulation system, so as to simulate the turn-off time of the thyristor in the actual high-voltage DC power transmission system. Through the implementation of the application, the ability of the active voltage regulator to stably regulate voltage and quickly compensate for single-phase / two-phase / three-phase voltage drop fault in transient state is verified.

Headlight (SW), in particular for use in vehicles,- with at least one first LED (LED1) as a light source and- with an H-bridge (H) for controlling and supplying the first LED (LED1) with electrical energy,- wherein the headlight (SW) has a first operating mode (QDB) in which the first LED is used as a light source for illumination purposes and- wherein the headlight (SW) has a second operating mode (GPB) in which the first LED is used as a light source for generating light pulses (LP) in a function as a component of an optical data communication device and- wherein the H-bridge (H) is controlled by a control device (ST) and- wherein the H-bridge (H) can be operated by the control device (ST) in pulsed operation (GPB) in the second operating mode and in quasi-continuous operation (QDB) in the first operating mode and- wherein the control device (ST) is designed tothat in pulsed operation (GPB) a "PAn" state, in which a forward voltage in the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-on time (τpp) by the H-bridge (H), and- wherein the control device (ST) is designed such that in pulsed operation (GPB) a "PAus" state, in which a reverse voltage against the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-off time (τpn) by the H-bridge (H), and- wherein the turn-off time (τpn) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1), and- wherein the turn-on time (τpp) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1) is.,

The application discloses a full-bridge soft switching control method of a resonant converter, a charging pile and a chip, relates to the technical field of direct-current charging, and comprises the following steps: in a starting stage of the charging pile, performing PI algorithm processing on sampling data of the charging pile and preset given data to obtain loop output values of inner and outer loops of the charging pile; judging the size relationship between the loop output values and a preset threshold value to obtain a switching frequency of a driving switch tube; obtaining a period count value of the resonant converter in a period based on the switching frequency and a main clock frequency; performing timing sampling on a voltage of the driving switch tube of the resonant converter to obtain an off time of the driving switch tube; compensating the period count value based on the off time of the driving switch tube to generate a PWM driving signal; and performing full-bridge soft switching control on the resonant converter based on the PWM driving signal, so that the resonant converter is turned on in a zero-voltage state. The application can reduce the on-loss of the driving switch tube and improve the stability of the resonant converter.

The application discloses a control method and system for realizing totem pole PFC high-frequency bridge arm staggered parallel and full-range soft switching, and mainly solves the problem that the prior art cannot simultaneously realize stable staggered parallel of totem pole PFC and active tube soft switching of master and slave phases. The implementation scheme comprises the following steps: collecting input voltage, output voltage, inductance current of master and slave phases and circuit parameters of a bridgeless totem pole PFC parallel circuit; calculating PI voltage loop output power and input voltage polarity signal; calculating active tube conduction time parameter, active tube turn-off time parameter, synchronous tube conduction time parameter and synchronous tube turn-off time parameter for realizing ZVS; calculating compensated slave phase active tube turn-off time parameter and synchronous tube conduction time parameter; and controlling active tube and synchronous tube of master and slave phases of the totem pole PFC based on the time parameters. The application can realize soft switching of all high-frequency active tubes while realizing stable staggered parallel of the totem pole PFC high-frequency bridge arm, and can be used for various high-power power electronic circuits.

The invention provides a control circuit, a power circuit system and electronic equipment, and relates to the technical field of integrated circuits. According to the control circuit, a signal conversion module converts a difference value between a first voltage corresponding to turn-off time of a first switch and a second voltage corresponding to a time threshold value into a digital signal, the input end of a decoding module is coupled with the output end of the signal conversion module, and the number of the input ends of the decoding module is smaller than that of the output ends of the decoding module. The input end of the time adjusting module is coupled with the output end of the decoding module, and the time adjusting module is used for adjusting the conduction time of the first switch according to the output quantity of the decoding module, that is, the time adjusting module adjusts the conduction time of the first switch according to the difference value between the turn-off time of the first switch and a time threshold value; therefore, when the power conversion circuit is subjected to heavy load from a light load step, the conduction time of the first switch is increased, so that the undershoot voltage during heavy load from the light load step is reduced, and the response speed of the power conversion circuit is improved.

A control circuit for a boost converter includes a switching device for switching the boost converter to perform cycles, wherein each cycle includes an energy charging state in which an inductor stores energy supplied by an input voltage and an energy discharging state in which the inductor supplies energy to the output of the boost converter; a comparison device for determining whether the current at the inductor is higher than a predetermined maximum current; and a turn-off time signal generation device for generating a turn-off time signal based on whether the current at the inductor is higher than the predetermined maximum current, wherein the turn-off time signal is used to determine the duration of the discharge state of the next switching event, and the switching device is used to switch the boost converter based on the generated turn-off time signal.

The present disclosure addresses the problem of providing a converter device capable of controlling output power at a light load with high efficiency. A converter device (A1) comprises a rectifier (2), a first inverter (3), a first inductor (L1), a transformer (Tr1), a second inverter (4), a second inductor (L2), and a control circuit (5). The control circuit (5) controls the first inverter (3) and the second inverter (4) so that a first switching element (Q1) and a third switching element (Q3) perform switching operations at the same timing and a second switching element (Q2) and a fourth switching element (Q4) perform switching operations at the same timing. The control circuit (5) controls the ON periods or the OFF periods of the first switching element (Q1) and the second switching element (Q2) in accordance with the output voltage (Vo) of the second inverter (4).

An adaptive tuning apparatus and method for operational state of a controller are provided, wherein the apparatus comprises a sensing module, a processing module, and a controlling module, all of which are in data connection with each other. The sensing module acquires operating conditions of vehicle with the controller and sends them to the processing module at certain time intervals. The processing module uses data sets per-stored in its memory to analyze these operating conditions to determine whether the vehicle satisfies specific tuning criteria, and if the vehicle satisfies the specific tuning criteria, it retrieves processing parameters that match the current operating conditions and sends them to the controlling module. Based on the processing parameters, the controlling module adjusts PWM switching frequency and / or turn-on / off time of the vehicle' s controller to align the vehicle' s operational state with the current operating conditions. The operating conditions acquired by the sensing module include vehicle information and road information.

In a method for modifying a control deviation (RA) within the framework of a fixed-value control system of a controlled system (4) with integrating system behavior, a resting module (10) receives the vector control deviation (RA) as an input vector (EV) of input signals (E1-3) and maps this to an output vector (AV) of output signals (A1-3), wherein the resting module (10) is switchable as a system state (26) between a passive (PZ) and active state (AZ) and, in the passive state (PZ), outputs a zero signal as the output signal (A1-3) if the input signal (E1-3) lies within an assigned corridor (K1-3), and otherwise outputs the input signal (E1-3), and switches to the active state (AZ) if an input signal (E1-3) lies continuously within the corridor (K1-3) for a turn-on time (Tein), and the resting module (10) in the active state (AZ) from the input signal (E1-3) generates a test signal (P1-3) and outputs all output signals (A1-3) as zero signals,and switches to passive state (PZ) when a test signal (P1-3) continuously leaves its corridor (K1-3) for longer than a switch-off time (Taus). A rest module (10) with a computing unit (16) for executing the procedure contains an input (12) for the input vector (EV) and an output (14) for the output vector (AV). A control loop (2) with the controller (8) and a comparator (6) for outputting the control deviation (RA) contains the idle module (10) between comparator (6) and controller (8) and receives the control deviation (RA) from the comparator (6) and the controller (8) receives the output vector (AV) as modified control deviation (RM).

Headlights (SW), in particular for use in vehicles, - with at least one first LED (LED1) as a light source, - wherein the headlight (SW) has a first operating mode (QDB) in which the first LED (LED1) is used as a light source for illumination purposes, and - wherein the headlight (SW) has a second operating mode (GPB) in which the first LED (LED1) is used as a light source for generating light pulses (LP) in a function as a component of an optical measuring device, - with an H-bridge (H) for controlling and supplying the first LED (LED1) with electrical energy, - wherein the H-bridge (H) is controlled by a control device (ST), and - wherein the H-bridge (H) can be operated by the control device (ST) in pulsed operation (GPB) in the second operating mode and in quasi-continuous operation (QDB) in the first operating mode, and - wherein the control device (ST) is designed tothat in pulsed operation (GPB) a "PAn" state, in which a forward voltage in the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-on time (τpp) by the H-bridge (H), and- wherein the control device (ST) is designed such that in pulsed operation (GPB) a "PAus" state, in which a reverse voltage against the forward direction of the light-emitting diode (LED1) is applied to the light-emitting diode (LED1) through the H-bridge (H), is not maintained for longer than a turn-off time (τpn) by the H-bridge (H), and- wherein the turn-off time (τpn) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1), and- wherein the turn-on time (τpp) is less than the charge carrier lifetime (τ) in the PN junction of the light-emitting diode (LED1) is.,

The application belongs to the technical field of inverter switch control, and specifically discloses a three-level inverter switch frequency control method, device, medium and equipment. The method comprises the following steps: collecting the actual output current of the output end of the three-level inverter in real time; calculating the instantaneous error of the actual output current and the preset reference current; calculating the rising time and the falling time of the instantaneous error within the hysteresis width to obtain a natural switch period; comparing the actual output current of the output end of the three-level inverter with a set threshold to determine whether the three-level inverter enters an active frequency conversion adjustment mode; and when the active frequency conversion adjustment mode is entered, taking the natural switch period as a reference, dynamically setting the turn-on time and the turn-off time to generate a controlled switch period, so that the active adjustment of the switch frequency of the three-level inverter is realized. By adopting the segmented frequency conversion hysteresis control, the application can improve the operation reliability of the three-level inverter and prolong the service life of the power device.

The invention belongs to the technical field of inverter switching control, and particularly discloses a three-level inverter switching frequency control method and device, a medium and equipment, and the method comprises the steps: collecting the actual output current of the output end of a three-level inverter in real time; calculating an instantaneous error between the actual output current and a preset reference current; calculating rising time and falling time of the instantaneous error in the hysteresis width to obtain a natural switching period; the actual output current of the output end of the three-level inverter is compared with a set threshold value so as to judge whether the three-level inverter enters an active frequency conversion adjusting mode or not; and when the three-level inverter enters the active frequency conversion adjusting mode, the natural switching period is taken as a reference, and the turn-on time and the turn-off time are dynamically set, so that a controlled switching period is generated, and active adjustment of the switching frequency of the three-level inverter is realized. According to the three-level inverter, the operation reliability of the three-level inverter can be improved and the service life of a power device can be prolonged by adopting segmented variable-frequency hysteresis control.

Provided are a control device and a control method for an electric motor, which do not adversely affect the detection accuracy of a direct current estimation value even when a control mode of a power conversion unit is changed.　A control device for an electric motor comprises a power conversion unit 10 and a control unit 11 for controlling the power conversion unit, and further comprises: a control mode setting unit 30 that selectively sets a plurality of control modes for the power conversion unit 10; and a direct current estimation unit 32 that estimates the value of a direct current flowing through the power conversion unit, on the basis of the value of an alternative current flowing through the electric motor and an on-duty value of a PWM signal for controlling the power conversion unit. The direct current estimation unit 32 comprises an energization-time correction unit 40 that, when the polarity of the alternative current is on the negative side, adds a dead time ⊿t existing between on-timing and off-timing of an upper arm 12u and a lower arm 13u to an energization time of the upper arm. The energization-time correction unit obtains the dead time ⊿t corresponding to a currently-executed control mode among the plurality of control modes, and adds said dead time ⊿t to the energization time of the upper arm 12u.

This invention relates to the field of power transmission and distribution and control equipment manufacturing technology, and discloses a dynamic power collaborative allocation and control method for multiple constraints. The method includes: acquiring transient power distribution data of the internal shared DC bus and the power modulation switching sequence of high-power load units; identifying power off-time windows; extracting discrete transient power consumption command packets from low-power logic nodes; and shifting the trigger clock of the command packets to within the off-time window, generating a reconstructed power allocation timing sequence and sending scheduling commands, provided that the duration of the command packets is not greater than the off-time window. This invention eliminates the superposition of transient peak currents on the bus by offsetting the clock peaks of multiple units, reducing nonlinear parasitic heat dissipation in the system, and improving overall operational stability.

The invention provides a boost converter and a frequency control circuit thereof, the boost converter comprises a main switch tube and a rectifier tube which are connected, the common connection end of the main switch tube and the rectifier tube is a first node, and the boost converter comprises a sampling hold circuit which samples and holds the voltage of the first node during the turn-off period of the main switch tube to obtain a first sampling signal; the integral circuit is used for integrating a second sampling signal representing the first sampling signal along with time to obtain a first integral signal during the turn-off period of the main switching tube; and the first comparator is used for comparing the first integral signal with an input sampling signal, when the first integral signal reaches the input signal, the main switch tube is controlled to be switched on, and the input sampling signal is proportional to the input voltage of the boost converter. The switching frequency of the boost converter can be controlled to be constant by controlling the turn-off time of the main switching tube.