17 results about "Turn on time" patented technology

This application relates to a negative voltage control circuit, method, memory, and electronic device, belonging to the field of electronic circuits. The negative voltage control circuit includes: a voltage detection module and a control module; the voltage detection module is connected to the data line of the memory cell and is used to detect the voltage of the data line; the control module is connected to the voltage detection module and a negative voltage generating circuit, and the control module is used to control the negative voltage generating circuit to turn on when the voltage of the data line is lower than a preset voltage, so that the negative voltage generating circuit pulls down the voltage of the data line to a negative voltage, wherein the preset voltage is the voltage at which the memory cell can write data 0. This negative voltage control circuit can effectively detect the optimal turn-on time of the negative voltage generating circuit, effectively improving the write operation yield of the memory cell. Furthermore, the circuit structure is simple, the area is small, and costs are effectively saved.

A power controller and a control method for a power converter with soft turn-on and soft turn-off. The power converter includes an inductor element and a power switch for controlling an inductor current flowing through the inductor element. The power controller includes a voltage mode controller and a current mode controller. The voltage mode controller controls an on-time of the power switch based on a feedback signal and a sawtooth signal. The feedback signal is generated based on an output voltage of the power converter. The current mode controller controls the on-time based on a current limit signal and a current sense signal to limit the current sense signal. The current sense signal represents the inductor current. The current mode controller includes a limit signal generator for providing the current limit signal based on the feedback signal and a triangular wave signal and determining a soft turn-on time and a soft turn-off time. The limit signal generator increases the current limit signal over time during the soft turn-on time and decreases the current limit signal over time during the soft turn-off time.

An example includes: switching on and off a coil current at switch-on times and switch-off times specified by means of a clock signal; generating a PWM signal with a duty cycle representative of the inductance of the measuring coil with rising and falling PWM signal edges, triggered at the same time as the switching on or switching off of the coil current and triggered as soon as a value of the coil current reaches a specified trigger threshold, or both of which are triggered as soon as a value of the coil current reaches a specified trigger threshold; evaluating the PWM signal to determine the duty cycle and the inductance; detecting a steady-state maximum value of the coil current after switching on and before subsequently switching off the coil current; and specifying the trigger threshold depending on the detected steady-state maximum value of the coil current.

Various methods and circuital arrangements for reducing a turn ON time of a cascode amplifier are presented. According to one aspect, a configurable switching arrangement coupled to a cascode transistor of the amplifier shorts a gate of the cascode transistor to a reference ground during an inactive mode of operation of the amplifier. During an active mode of operation of the amplifier, the configurable switching arrangement couples a gate capacitor to the gate of the cascode transistor that is pre-charged to a voltage that is higher than a gate biasing voltage to the cascode transistor, which ensures that cascode transistor turns ON much quicker than the traditional method of grounding the cap, hence provide a final current flow through the cascode amplifier in a shorter time by not limiting the turn ON time of the input transistor. The gate biasing voltage is coupled to the gate capacitor via a resistor. A relationship between the pre-charged voltage, and minimum saturation voltages and threshold voltages of the transistors of the cascode amplifier is also provided.

In a method for modifying a control deviation (RA) within the framework of a fixed-value control system of a controlled system (4) with integrating system behavior, a resting module (10) receives the vector control deviation (RA) as an input vector (EV) of input signals (E1-3) and maps this to an output vector (AV) of output signals (A1-3), wherein the resting module (10) is switchable as a system state (26) between a passive (PZ) and active state (AZ) and, in the passive state (PZ), outputs a zero signal as the output signal (A1-3) if the input signal (E1-3) lies within an assigned corridor (K1-3), and otherwise outputs the input signal (E1-3), and switches to the active state (AZ) if an input signal (E1-3) lies continuously within the corridor (K1-3) for a turn-on time (Tein), and the resting module (10) in the active state (AZ) from the input signal (E1-3) generates a test signal (P1-3) and outputs all output signals (A1-3) as zero signals,and switches to passive state (PZ) when a test signal (P1-3) continuously leaves its corridor (K1-3) for longer than a switch-off time (Taus). A rest module (10) with a computing unit (16) for executing the procedure contains an input (12) for the input vector (EV) and an output (14) for the output vector (AV). A control loop (2) with the controller (8) and a comparator (6) for outputting the control deviation (RA) contains the idle module (10) between comparator (6) and controller (8) and receives the control deviation (RA) from the comparator (6) and the controller (8) receives the output vector (AV) as modified control deviation (RM).

A display panel (100), a driving method, and a display device. The display panel (100) comprises a plurality of sub-pixels (1), wherein each sub-pixel (1) receives a first light-emission control signal (EM, EM1, EM2, PAM_EM, PAM_EM1, PAM_EM2). The display panel (100) at least comprises a first time (a1) and a second time (a2), the first time (a1) being different from the second time (a2), wherein the first time (a1) and the second time (a2) are respectively light-emission durations of different sub-pixels (1); or the first time (a1) and the second time (a2) are respectively turn-on moments of first light-emission control signals (EM, EM1, EM2, PAM_EM, PAM_EM1, PAM_EM2) for different sub-pixels (1); or the first time (a1) and the second time (a2) are respectively light-emission durations of the same sub-pixel (1) in different states; or the first time (a1) and the second time (a2) are respectively turn-on moments of a first light-emission control signal (EM, EM1, EM2, PAM_EM, PAM_EM1, PAM_EM2) for the same sub-pixel (1) in different states. The display panel (100), the driving method, and the display device improve the display uniformity.

Embodiments of the present application provide a display panel and a driving method thereof, and a display device, and relate to the technical field of display, and are used for improving display uniformity of the display panel. The display panel comprises a plurality of sub-pixels; the sub-pixels receive a first light-emitting control signal; the display panel comprises at least a first time and a second time, and the first time is different from the second time; wherein, the first time and the second time are respectively light-emitting times of different sub-pixels; or, the first time and the second time are respectively turn-on times of the first light-emitting control signal of different sub-pixels; or, the first time and the second time are respectively light-emitting times of a same sub-pixel in different states; or, the first time and the second time are respectively turn-on times of the first light-emitting control signal of a same sub-pixel in different states.

The application is a digital-analog mixed synchronous rectification control method suitable for LLC resonant circuit. Firstly, the rising edge of the gate voltage of the main switch tube of the LLC main topology is detected in the state detection module. When the rising edge comes, the state of the counter in the state detection module is changed, so that the voltage sampling circuit detects the voltage across the synchronous rectification tube in the N main switch tube periods, N is 3 to 30, and the voltage after the integral operation processing of the output analog circuit is output. The voltage comparison module reads the output of the voltage sampling circuit and compares it with the initial value to adjust the duty cycle of the synchronous rectification tube in the next period. Finally, the adaptive synchronous rectification tube turn-off module turns off the rectification tube (SR2), and the turn-on time of the rectification tube is synchronized with the main switch tube (Q1) of the switching power supply. The technical problems of high component cost and low reliability existing in the existing LLC adaptive synchronous rectification scheme are solved.

A display device includes a display panel including a plurality of blocks, a data driver which provides data voltages to the display panel, and a controller which controls the data driver according to a temperature profile, stores a turn-off temperature profile of the display device, estimates a turn-on temperature profile at a turn-on time of the display device based on the turn-off temperature profile, a temperature change rate after a turn-off of the display device, and an elapsed time from a turn-off time of the display device to the turn-on time, and calculates the temperature profile based on the turn-on temperature profile and a temperature increase profile after a turn-on of the display device.

Circuit diagram, including: a memory field or array (104, 400) comprising a plurality of memory cells; a path (414, 417) configured to supply a voltage for biasing one memory cell (MC) of the plurality of memory cells, wherein the path comprises: a variable resistance circuit (416) configured to: before switching on the memory cell (MC), an associated resistor is set to a high resistance level; and in response to an end time of an initial power-on period, to adjust the associated resistance from a high resistance level to a low resistance level, wherein the initial power-on period extends from a power-on time (t2) to the end time (t3) which precedes a read result acquisition event of the read operation.

This invention discloses a PWM signal generation method, module, and related apparatus. The PWM signal generation method includes: sampling a comparison signal based on a sampling period; determining the magnitude relationship between the actual current and the commanded current of the motor based on the comparison signal; selecting either the upper or lower switching transistor of the driver based on the determination result; determining whether the current on-time of the selected switching transistor has reached the minimum on-time; if so, generating an upper transistor control signal and / or a lower transistor control signal based on the determination result; otherwise, re-sampling the comparison signal based on the sampling period. According to the PWM signal generation method, module, and related apparatus of this invention, only the actual current and the commanded current need to be compared, making analog circuit calibration easier. Furthermore, the determination of the switching transistor's on-time and dead time is introduced, which can ensure the safety of the switching devices.

The embodiment of the invention provides a synchronous rectification controller and a related control method, which are used for controlling a synchronous rectification switch. The synchronous rectification switch is provided with a control end and a detection end. The synchronous rectification controller comprises a starting time recorder and a differential driver. The turn-on time recorder is used for recording the previous turn-on time of the synchronous rectification switch according to a detection signal on the detection end and determining a first regulation and control time period and a second regulation and control time period. The first regulation and control period occurs before the second regulation and control period. According to the detection signal, the differential driver drives the control end to regulate the detection signal at a first target voltage and a second target voltage respectively in the first regulation time period and the second regulation time period. The first target voltage is different from the second target voltage.

The application discloses a switching power supply with constant current output and a method for controlling constant current of a switching power supply, wherein the switching power supply comprises a detection circuit and a logic control chip, and the detection circuit is configured to output a feedback voltage. The feedback voltage is a sum voltage of a first voltage and a second voltage, and the second voltage represents output current of the switching power supply. The logic control chip is configured to receive the feedback voltage and compare the feedback voltage with a reference voltage. When the output current changes, the logic control chip changes turn on time of the switching power supply based on comparison result to control the output current constant. The reference voltage set by a switching power supply with constant voltage output is very high, while operating current requirement of constant current drive is very small, and the reference voltage is too high relative to the second voltage, so the first voltage is introduced to bear part of the reference voltage, so that constant current reference is lowered, so as to take into account needs of constant current drive and power consumption.

A load control device may be configured to turn on lighting loads to obtain a fast turn-on time that may be substantially consistent across lighting loads that have different load voltages. The load control device may comprise a power converter circuit configured to produce a voltage across a capacitor, and a control circuit configured to control the power converter circuit to generate the voltage across the capacitor. The control circuit may determine a learned voltage from the magnitude of the voltage across the capacitor. For example, the control circuit may measure the magnitude of the voltage and store the measured voltage as the learned voltage. The control circuit may determine an operating parameter for the power converter circuit as a function of the learned voltage, and control the power converter circuit according to the operating parameter to charge the capacitor until the magnitude of the voltage exceeds a threshold.

The invention discloses a display device, electronic equipment and a temperature prediction method of the display device. The display device includes: a display panel divided into a plurality of blocks; a data driver supplying a data voltage to the display panel; and a controller that controls the data driver and stores a turn-off temperature distribution before the display device is turned off, and predicts a turn-on temperature distribution at a turn-on time point based on the turn-off temperature distribution, a post-turn-off temperature change rate, and an elapsed time from a turn-off time point of the display device to the turn-on time point, and calculating the temperature distribution based on the turn-on temperature distribution and the temperature rise distribution after the display device is turned on.

The present disclosure provides an LDO, a starting circuit thereof, a power supply chip and an electronic device, comprising a starting detection circuit and a starting control circuit, whether the drain voltage of the output power tube is greater than a preset voltage is detected through the starting detection circuit, when the drain voltage of the output power tube is less than or equal to the preset voltage, the output power tube is turned off through the starting control circuit, so as to control the LDO to stop working and limit the rising speed of the drain voltage of the output power tube, when the drain voltage of the output power tube is greater than the preset voltage, the LDO is controlled to work through the starting control circuit, so as to ensure that the output power tube is normally turned on, the starting time of the output power tube can be delayed in the power-on process and the hot plug process, so that the loop has enough time to respond, the overshoot of the output voltage can be inhibited, and damage to the load device can be avoided.

Embodiments of the present application provide a display panel and a driving method thereof, and a display device, and relate to the technical field of display, and are used for improving display uniformity of the display panel. The display panel comprises a plurality of sub-pixels; the sub-pixels receive a first light-emitting control signal; the display panel comprises at least a first time and a second time, and the first time is different from the second time; wherein, the first time and the second time are respectively light-emitting times of different sub-pixels; or, the first time and the second time are respectively turn-on times of the first light-emitting control signal of different sub-pixels; or, the first time and the second time are respectively light-emitting times of a same sub-pixel in different states; or, the first time and the second time are respectively turn-on times of the first light-emitting control signal of a same sub-pixel in different states.