2642 results about "Edge surface" patented technology

There is provided an acetabular shell liner, and particularly a constrained liner, having a variable rim surface geometry to improve the range of motion of a femoral component within the liner and decrease the incidence of dislocation and subluxation. There are also provided methods of making and using the acetabular shell liner. Prosthetic devices, and particularly hip joint prostheses, containing the acetabular shell liner having a variable rim surface geometry are also provided.

A MEMS microphone with a stacked PCB package is described. The MEMS package has at least one MEMS acoustic sensor device located on a PCB stack. A metal cap structure surrounds the at least one MEMS acoustic sensor device wherein an edge surface of the metal cap structure is attached and electrically connected to the PCB stack. In a first embodiment, a back chamber is formed underlying the at least one MEMS acoustic sensor device and within the PCB stack wherein an opening underlying the at least one MEMS acoustic sensor device accesses the back chamber. An opening in the metal cap structure not aligned with the at least one MEMS acoustic sensor device allows external fluid, acoustic energy or pressure to enter the at least one MEMS acoustic sensor device. In a second embodiment, a back chamber is formed in the space under the metal cap and over the first PCB. A hollow chamber is formed between the first PCB and the second PCB wherein an opening under the at least one MEMS acoustic sensor device accesses the hollow chamber. An opening in a bottom surface of the PCB stack not aligned with the at least one MEMS acoustic sensor device also accesses the hollow chamber and allows external fluid, acoustic energy or pressure to enter the at least one MEMS acoustic sensor device.

An apparatus having a light source, light pipe, and light conversion layer is disclosed. The light source includes a plurality of LED dies arranged in an array, each LED emitting light having an excitation wavelength, the light source emitting light within a cone of angles. The light pipe is positioned to receive the light within the cone of angles through an edge surface such that the light within the predetermined cone of angles is totally reflected from the top surface. The light pipe has features that redirect some of the light at angles such that some of the redirected light exits through the top surface. The light conversion layer overlies the top surface and converts light of the excitation wavelength to light in an output spectrum having wavelengths different from the excitation wavelength. A display layer can be placed such that it is illuminated by light from the light pipe.

A method for manufacturing an electrochromic element comprises providing a first substrate having first and second surfaces opposite one another and a first edge surface, providing a second substrate having third and fourth surfaces opposite one another and a second edge surface, wherein the third surfaces faces the second surface, and providing an electrochromic medium located between the first and second substrates, wherein the electrochromic medium has a light transmittance that is variable upon the application of electric field thereto. The method further complies applying a conductive layer on at least a portion of at least a select one of a first, second, third, and fourth surfaces and the first and second edge surfaces, wherein applying the conductive layer is accomplished at substantially atmospheric pressure and including applying at least a select one of metallic particles, an organometallic, a metallo-organic, and combinations thereof, and wherein the conductive layer has a bulk resistivity of less than or equal to 150 μΩ·cm. Other aspects of this invention comprise applying the conductive layer via ink jetting, ultrasonic spraying, auger pumping and jet pumping.

An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and semiconductor circuitry formed over the first generally planar surface, at least one chip scale packaging layer formed over the semiconductor circuitry and the first generally planar surface, an insulation layer formed over the second generally planar surface and the edge surfaces and at least one electrical conductor formed directly on the insulation layer overlying the second generally planar surface, the at least one electrical conductor being connected to the circuitry by at least one pad formed directly on the first generally planar surface.