151results about How to "Reduce surface recombination" patented technology

Methods are disclosed for producing highly doped semiconductor materials. Using the invention, one can achieve doping densities that exceed traditional, established carrier saturation limits without deleterious side effects. Additionally, highly doped semiconductor materials are disclosed, as well as improved electronic and optoelectronic devices/components using said materials. The innovative materials and processes enabled by the invention yield significant performance improvements and/or cost reductions for a wide variety of semiconductor-based microelectronic and optoelectronic devices/systems. Materials are grown in an anion-rich environment, which, in the preferred embodiment, are produced by moderate substrate temperatures during growth in an oxygen-poor environment. The materials exhibit fewer non-radiative recombination centers at higher doping concentrations than prior art materials, and the highly doped state of matter can exhibit a minority carrier lifetime dominated by radiative recombination at higher doping levels and higher majority carrier concentrations than achieved in prior art materials. Important applications enabled by these novel materials include high performance electronic or optoelectronic devices, which can be smaller and faster, yet still capture or emit light efficiently, and high performance electronics, such as transistors, which can be smaller and faster, yet cooler.

The invention provides a method for preparing an N-type crystalline silicon solar cell with aluminum-based local emitters on the back side. The method comprises the following steps: firstly, selecting N-type silicon wafers to carry out the surface-textured etching process; further forming a front surface field through phosphorous diffusion; depositing a passivating film on the front surface after the phosphorosilicate glass is formed during the removal of diffused phosphorous; carrying out the back-side chemical polishing process on the silicon wafers to remove the N+ layer formed on the back side during the phosphorous diffusion; then, sequentially printing an aluminum layer or a silver-aluminum layer through the passivating film deposited on the back side, local holes or grooves on the back side and screens on the back side; then, printing silver paste on the front surface; and finally, carrying out the one-step sintering process to form a local P+ layer on the back side and allowing the P+ layer to coming into ohmic contact with the electrodes on the front and back surfaces. By using the N-type substrate, forming local aluminum-based P-N junctions on the back side and further using the back-side chemical polishing process to remove the edge junctions, the invention can substitute for the conventional stacking-type plasma etching process, simplify the technological procedures and further bring a series of performance improvement to cells.

The invention discloses a method for passivating the back of a crystal silicon solar cell. The method comprises the following steps of: depositing a SiN* anti-reflection film on the front of the solar cell, corroding the back of the solar cell in heated alkali liquor by using the SiN* anti-reflection film as a mask to obtain a polished surface required by passivation, then depositing double film passivation layers on the polished surface to form a back passivation layer, forming an electrode window on the back passivation layer by adopting laser etching or screen printing of corrosive slurry, and finally forming a local contact back electrode on the electrode window by adopting a screen printing or sputtering method. The method greatly improves the long wave response of the solar cell and improves the conversion efficiency of the solar cell; moreover, a full-aluminum back field structure is canceled, so the method reduces the bending of the solar cell and is more adaptive to the thinning tendency of the solar cell.

The invention discloses an inverted pyramid structure of a polysilicon surface and a fabrication method of the inverted pyramid structure. The method comprises the following steps: preparing black silicon by different methods; rinsing a sample in a mixed liquid of hydrogen peroxide and ethanol amine; and carrying out retreatment on the washed black silicon in a mixed liquid of hydrogen peroxide, hydrofluoric acid, metaphosphoric acid and ammonium fluoride, so as to form the inverted pyramid structure of the polysilicon surface. A wet-chemical method which is different from acid and alkaline corrosion is adopted. According to the method, the effects of anisotropy can be reduced to the maximal extent; and the black silicon with different nano-structures can be corroded into a nano textured structure with a regular inverted pyramid structure through oxidation. Compared with the traditional polycrystalline silicon texture, the polysilicon inverted pyramid light-trapping structure disclosed by the invention is relatively high in light utilization rate and relatively low in reflectivity, so that the polysilicon inverted pyramid light-trapping structure has the characteristics of the inverted pyramid structure; compared with the traditional high surface recombination of a small and dense structure of the black silicon, the surface recombination is obviously reduced; and the efficiency of a solar cell is higher.

The invention discloses front and back surface electrodes of a screen printing crystalline silicon solar cell and a manufacturing method thereof; array points which are not printed into conductive paste are manufactured in an electrode main gate line; and the graphics of each array point is in a closed type. The manufacturing method comprises the step of arranging latex film array points on the screen printing plate electrode main gate line for blocking the conductive paste. The positive and back surface electrodes of the screen printing crystalline silicon solar cell and the manufacturing method thereof can effectively save the conductive paste on the positive and back surfaces of the crystalline silicon solar cell, and effectively eliminate the stress caused by different expansion coefficients of silver silicon alloy and silicon, thereby reducing the bending rate of a cell film and the welding debris rate of a component; the invention can enhance the adhesion firmness of the main gate line conductive paste on the silicon surface after being sintered and effectively solve the falling-off problem of a silver main gate line; and the invention reduces the surface contact area of the conductive paste and the silicon, and increases the open-circuit voltage and the short-circuit current.

The invention discloses a method for improving photoelectric conversion efficiency of a crystal silicon solar battery. The method is characterized in that: based on the conventional crystal silicon solar battery process, high-doped parallel linear arrays are formed on the surface of an emitter by adopting processes such as screen printing or local laser annealing and the like; and the high-doped parallel linear arrays are crossed with fine grids of a metal electrode in a vertical or certain angle mode. The method improves the ohmic contact of the metal grid electrode and silicon, and meanwhile reduces the number of the required fine grids so as to reduce the shading area and improve the photoelectric conversion efficiency of the crystal silicon solar battery. The method has low equipment investment, does not need to change other conventional process equipment, and is suitable for large-scale industrialized production.

Methods for selectively diffusing dopants into a substrate wafer are provided. A liquid precursor is doped with dopants. The liquid precursor is selected from a group comprising monomers, polymers, and oligomers of silicon and hydrogen. The doped liquid precursor is deposited on a surface of the substrate wafer to create a doped film. The doped film is heated on the substrate wafer for diffusing the dopants from the doped film into the substrate wafer at different diffusion rates to create a heavily diffused region and a lightly diffused region in the substrate wafer. The method disclosed herein further comprises selective curing of the doped film on the surface of the substrate wafer. The selectively cured doped film acts as a diffusion source for selectively diffusing the dopants into the substrate wafer.

The invention relates to a solar battery diffusion method which is characterized by comprising a step I of first oxidation, a step II of diffusion and a step III of second oxidation. The step II of diffusion comprises primary diffusion, the secondary diffusion and tertiary diffusion. In the solar battery diffusion method provided by the invention, a P-type silicon wafer is used as a diffusion source substrate; through three sub-steps of diffusion in the diffusion stage, the inlet flow of nitrogen and oxygen turns from large to small, and the inletting time turns from long to short; in the step III, the concentration of a phosphorus source is driven into the substrate from high to low, thus the surface concentration is gradually reduced, and the surface recombination and defect concentration is reduced; gradient doping is formed, the P-N junction area is widened, and the open-circuit voltage is increased; and meanwhile, through the relatively deep junction, the series resistance can be reduced, and the conversion efficiency of a solar battery is improved. The solar battery diffusion method does not need an additional process, is relatively low in cost and can be used for improving the conversion efficiency of the crystalline silicon solar battery.

The invention discloses a wet method etching process for crystal silicon wafers, which mainly comprises a back side polishing process. After etching and edge removing, the polishing process performed to the back sides of the crystal silicon wafers through a polishing solution is added, the temperature of the polishing solution in polishing is 5-30 DEG C, the polishing time is 10 seconds to 10 minutes, and the polishing solution contains, by mass, 0.5%-10% of HF, 35%-55% of HNO, 45%-55% of H2SO4 and 5%-30% of acetic acid. By adding the back side polishing process, the back sides of the silicon wafers can be smooth, back reflection of the silicon wafers is strengthened, and absorption of long-wave band spectrums in sunlight is enhanced, thereby improving light energy conversion and short-circuit current (Isc) of a battery and finally improving the conversion efficiency of the battery. In addition, the back of the smooth battery further facilitates combination of follow-up aluminum-silicon alloy and a silicon body, improves ohmic contact, strengthens the light reflection effect of an interface, improves variable output circuit (Voc), and finally improves the conversion efficiency of the battery.

The invention provides a polycrystalline silicon chip texturing liquid and a texturing method. The polycrystalline silicon chip texturing liquid in the prior art only contains oxidant and hydrofluoric acid, so that the reaction speed is slow, the area with multiple flaws can be excessively corroded to form the corrosion pit or burrs, the surface of the textured silicon chip is unsmooth, the textured surface is non-uniform, and the silicon chip is easy to break in the subsequent silk printing process. The polycrystalline silicon chip texturing liquid comprises oxidant, hydrofluoric acid and surface active agent. The polycrystalline silicon chip texturing method comprises the steps of firstly providing a texturing device with a texturing trough, placing the polycrystalline silicon chip texturing liquid in the texturing trough, then providing the textured silicon chip, coating the surface of the silicon chip with metal catalyst, and transferring the silicon chip into the texturing trough to be textured in a corrosion manner for 10s to 40s. By adopting the texturing liquid and the texturing method, the texturing speed of the polycrystalline silicon chip is increased, the surface of the polycrystalline silicon chip after being textured is smooth, the textured surface is uniform, the surface has no obvious black silk and crystal interface, so that the breaking rate of the subsequent process can be effectively reduced, the surface compounding is reduced, and the battery efficiency can be improved.

The present invention relates to a diffusion technique of a crystal-silicon efficient high-sheet-resistance battery piece. The diffusion technique comprises the steps of furnace entering, low-temperature oxidation, low temperature gas reaction deposition, low temperature dopant redistribution, high temperature gas reaction deposition, cooling dopant redistribution, low temperature gas reaction deposition, low temperature dopant redistribution and discharge. With adoption of the diffusion technique provided by the present invention, photoelectric conversion efficiency of the battery pieces can be raised, the production time is shortened, and the production efficiency is raised.

The invention relates to a back contact solar cell with various tunnel junction structures and a preparation method thereof. The solar cell comprises an N-type crystalline silicon substrate; the frontsurface of the N-type crystalline silicon substrate comprises a lightly-doped n+ surface field and a passivation antireflection film, and the back surface of the N-type crystalline silicon substratecomprises a P-type emitter region, an N-type back surface field region and a groove structure; the P-type emitter region is located in the groove structure, and the N-type back surface field region islocated above the groove structure; the N-type back surface field region sequentially comprises a tunneling SiOX layer, an n+poly layer, an oxide layer, an n+poly layer, a tunneling SiOX layer and ap+poly layer from inside to outside; the SiOX layer and the n+poly layer form a c-Si/SiOX/n+poly tunnel junction; the oxide layer and the n+poly layer form an n+poly/Oxide/n+poly tunnel junction, andthe tunneling SiOX layer and the p+poly layer form an n+poly/SiOX/p+poly tunnel junction; the P-type emitter region sequentially comprises a tunneling SiOx layer and a p+poly layer from inside to outside, and the SiOx layer and the p+poly layer form a c-Si/SiOX/p+poly tunnel junction; the P-type emitter region is provided with a P-type metal electrode, and the N-type back surface field region is provided with an N-type metal electrode.

The invention relates to an N-type surface tunneling oxidation passivation contact manufacturing method for a silicon-based solar cell, and the method comprises the following steps: (1), washing the surface of a monocrystalline wafer through a solution after a former operation, and removing a surface oxidation layer; (2), carrying out the oxidation of the surface of the monocrystalline wafer, and forming a superthin tunneling oxidation layer; (3), depositing a silicon thin layer above the superthin tunneling oxidation layer through a chemical vapor deposition method, and completing the phosphor doping of the silicon thin layer; (4), carrying out the oxidizing annealing of the silicon wafer, and further improving the micro-structure and performance of the silicon layer; (5), employing a plasma enhanced chemical vapor deposition method to deposit a silicon nitride passivation antireflection layer above the phosphor-doped silicon thin layer; (6), printing a metal electrode on the surface of the silicon nitride passivation antireflection layer, and completing the manufacturing process. The method can greatly reduce the surface recombination of battery pieces, achieves the excellent passivation effect, and increases the open-circuit voltage. A product has good thermal stability, and there is no need to develop the dedicated low-temperature technology, thereby reducing the cost.

The invention relates to a preparation method for a black-silicon poly-silicon PERC cell structure with a selective emitter. The preparation method is characterized by comprising the following steps of (1) forming a nanometer texturing surface on a front surface of a silicon wafer, wherein a back surface is a polishing surface; (2) performing front-surface diffusion of the silicon wafer to form anN-type layer, and removing front-surface phosphorosilicate glass and a back-surface pn junction; (3) depositing a silicon nitride anti-reflection film layer on the front surface of the silicon wafer,and depositing a passivation dielectric layer on the back surface; (4) dotting or routing the back surface of the silicon wafer, and printing a silver electrode and aluminum paste; (5) performing low-temperature sintering to form a local aluminum back field; (6) spraying a mixed solution of phosphoric acid and alcohol on the front surface of the silicon wafer, and forming a main grid line regionand a secondary grid line region after heavy doping by laser; and (7) immersing the front surface of the silicon wafer in an electroplating solution, electroplating the front surface of the silicon wafer under an illumination condition, and annealing after electroplating. By the preparation method, the defects that a high-quality fine grid line is difficult to form by silk-screen printing and thegrid line and a selective emitter cannot be enabled to be accurately aligned are overcome, and shielding and leakage current caused by an electrode are minimum.

A light-emitting device includes a substrate, a first doped semiconductor layer situated above the substrate, a second doped semiconductor layer situated above the first doped layer, and a multi-quantum-well (MQW) active layer situated between the first and the second doped layers. The device also includes a first electrode coupled to the first doped layer and a first passivation layer situated between the first electrode and the first doped layer in areas other than an ohmic-contact area. The first passivation layer substantially insulates the first electrode from edges of the first doped layer, thereby reducing surface recombination. The device further includes a second electrode coupled to the second doped layer and a second passivation layer which substantially covers the sidewalls of the first and second doped layers, the MQW active layer, and the horizontal surface of the second doped layer.

The invention relates to a silicon nanowire radial heterojunction solar battery manufacture method and belongs to the photovoltaic technical field. By means of a hot filament chemical vapor deposition technology, intrinsic and n-type amorphous silicon membranes are sequentially subjected to conformal deposition on a monocrystalline silicon piece with nanowires to manufacture a silicon nanowire radial heterojunction solar battery with the structure of n-a-Si: H/i-a-Si: H/p-c-SiNW. By the aid of good atom hydrogen treatment and intrinsic amorphous silicon passivation capacities of the hot filament chemical vapor deposition technology, properties of the manufactured nanowire radial heterojunction solar battery are substantially improved; the nanowire radial heterojunction solar battery has a novel structure, good properties and wide application values in the photovoltaic field.

The invention relates to a crystalline silicon solar cell and a diffusion method therefor. The method comprises the following steps: 1, carrying out the heat preservation and oxidation of a silicon chip under the temperature from 800 DEG C to 820 DEG C under the condition of oxygen gas and nitrogen gas; 2, carrying out the heat preservation diffusion of the silicon chip under the temperature from 800 DEG C to 820 DEG C under the condition of diffused nitrogen, oxygen gas and nitrogen gas; 3, carrying out the heat preservation diffusion of the silicon chip under the temperature from 860 DEG C to 890 DEG C under the condition of nitrogen gas; 4, carrying out the heat preservation diffusion of the silicon chip under the temperature from 810 DEG C to 850 DEG C under the condition of oxygen gas and diffused nitrogen; 5, carrying out the heat preservation reaction of the silicon chip under the temperature from 810 DEG C to 850 DEG C under the condition of oxygen gas and nitrogen gas, wherein the diffused nitrogen is nitrogen containing phosphorus oxychloride. Moreover, the flow of the diffused nitrogen at step 4 is smaller than the flow of the diffused nitrogen at step 2. The method can increase the short-circuit current of the crystalline silicon solar cell.