24 results about "Silicon nanowires" patented technology

This invention discloses a continuous silicon nanowire anode material based on ALD seed layer-induced mesoporous confinement and its preparation method. The material comprises a mesoporous carbon framework with interconnected pore structures, and a one-dimensional silicon nanostructure located within the pores and extending continuously along the axial direction. The one-dimensional silicon nanostructure is connected to the inner wall of the mesoporous carbon through an interface modification layer, forming a continuous electron / ion transport pathway. The interface modification layer is formed by in-situ transformation of a metal oxide seed layer deposited on the inner wall of the pores under a silicon source gas and a reducing atmosphere, and its composition includes elemental metals, metal-silicon alloy phases, or metal silicides. Utilizing the spatial confinement effect of the mesoporous carbon, the radial expansion of the silicon nanostructure is restricted within the pores, reducing mechanical compression on the solid electrolyte; simultaneously, during the delithiation shrinkage process, the axial connectivity of the silicon nanostructure is maintained, alleviating solid-solid interface contact degradation, thereby improving the cycle stability and rate performance of the all-solid-state battery.

This invention relates to a nickel-based catalyst supported on silicon carbide nanowires, its preparation method, and its application in ammonia decomposition, belonging to the field of hydrogen production and catalytic materials technology. The supported nickel-based nanowire silicon carbide catalyst of this invention uses a silicon carbide nanowire support as a substrate, on which nickel active metal nanoparticles are loaded and doped with rare earth metal additives. The active metal and rare earth metal additives are loaded onto the support via a deposition-precipitation method. The core of this invention lies in constructing a metal-support synergistic low-temperature ammonia decomposition catalyst that facilitates the dispersion of metal nanoparticles and current conduction by loading active metals and rare earth metal additives onto silicon carbide nanowires with high specific surface area and one-dimensional conductivity. By applying an external electric field, the current promotes the reaction process, accelerates low-temperature ammonia decomposition, significantly enhances ammonia decomposition activity, and ultimately enables the catalyst to exhibit high activity and high stability in ammonia decomposition for hydrogen production at lower temperatures. This is an ammonia decomposition hydrogen production technology solution that combines the advantages of low temperature, high stability, economy, and industrial applicability.

The application discloses a kind of core-shell structure silicon carbon nanowire negative electrode materials and preparation method and application, including the following steps: S1, after mixing even with silica powder, reduced carbon powder and proper alcohol, preforming compression is carried out, and green compact is obtained;S2, green compact is placed in high-temperature vacuum equipment, after inert gas is purged and is extracted to high vacuum, temperature is raised to 900~1300 ℃, and after heat preservation, silicon nanowire is condensed in the condensation area of equipment;S3, the temperature of equipment is reduced to 200~400 ℃, after liquid polymer precursor is vaporized, it is brought into equipment by carrier gas, and polymer is deposited on the surface of silicon nanowire;S4, stop purging precursor, and the chamber of equipment is thoroughly cleaned with inert gas, and then temperature is raised to 700~900 ℃ and heat preservation, so that polymer is decomposed, carbonized into amorphous carbon, and after cooling, core-shell structure silicon carbon nanowire negative electrode material is obtained.The method is simple, suitable for mass production, and the specific capacity of the prepared negative electrode material is high, and the cycle life is long.

This invention relates to the field of diamond heat sinks, specifically a diamond heat sink and its preparation method, comprising: in-situ growth of a silicon carbide nanowire array on a diamond surface; sputtering a titanium carbide layer on the diamond surface using magnetron sputtering to obtain a titanium carbide / silicon carbide nanowire array composite structure; placing solder paste between the diamond and a metal sheet to form a brazed component, wherein the titanium carbide / silicon carbide nanowire array composite structure in the brazed component faces the side of the solder paste; and finally vacuum brazing. This invention has good process compatibility, is easy to realize industrial application, and effectively solves the problems of weak interface bonding, high thermal stress, and high interface thermal resistance when connecting diamond films and metals. It has important application value for heat dissipation of high-power electronic devices.

The present application relates to the field of microelectronic manufacturing and integration technology, and discloses a silicon nanowire size control structure based on metal oxide edge forming catalyst ball, a method and an in-situ CMOS device integration method, which ingeniously utilizes an n-type metal oxide region covered by silicon nitride and not reduced by hydrogen plasma and a p-type silicon nanowire catalytically grown by an edge forming catalyst ball, after the growth of the silicon nanowire is completed, only one photoetching and etching process is needed to remove the silicon nitride layer above the region, so that an n-type metal oxide channel and a p-type silicon nanowire channel can be simultaneously obtained on the same multi-step guiding structure, the two channels are connected in a head-to-tail mode, and an in-situ CMOS structure is formed, after electrode layers, gate dielectric layers and signal input electrodes are sequentially deposited, the p / n devices in the CMOS inverter structure are closely connected, the logic device integration density is effectively improved, and the CMOS inverter structure is more suitable for large-scale, high response speed and low static power consumption logic operation.

This invention relates to the field of high-carbon alcohol organic compounds, and discloses a photocathode, its preparation method and application, an electrolytic cell, and a method for preparing high-carbon alcohol organic compounds. The photocathode uses a silicon nanowire array electrode sheet as a substrate. On the surface of the substrate, a connecting layer, an aldehyde-modified layer, and a covalent triazine framework metal complex material modification layer are sequentially coated from the inside out. The weight ratio of the substrate, connecting layer, aldehyde-modified layer, and covalent triazine framework metal complex material modification layer is 1:(0.01-0.03):(0.02-0.06):(0.06-0.18). The photocathode provided by this invention has the ability to adsorb carbon dioxide, improves the selectivity of high-carbon alcohol organic compounds, and enhances the carbon dioxide reduction capacity. The preparation method simplifies the operating conditions and process flow, facilitating industrial production. Using the photocathode provided by this invention to prepare high-carbon alcohol organic compounds exhibits excellent carbon dioxide adsorption performance, high selectivity, and high product yield.

The application relates to the chemical production field, in particular to a preparation method of silicon carbide nanowires, which comprises the following steps: roasting micro-silicon powder to obtain primary raw materials; adding a binder to the primary raw materials, and then grinding and mixing to obtain precursor powder; assembling a cathode unit: pressing the precursor powder into precursor tablets; wrapping the precursor tablets with a foamed nickel net to form a cathode element, winding and fixing one end of a cathode wire to form a cathode unit; placing the cathode element of the cathode unit in an electrolytic cell, and connecting the other end of the cathode wire to a power supply located outside the electrolytic cell; assembling an anode unit: placing an anode in the electrolytic cell, connecting one end of an anode wire to the anode as an anode unit; leading the other end of the anode wire out of the electrolytic cell and connecting the other end to a power supply; preparing a composite molten salt as an electrolyte, and building an electrolytic cell to electrolytically produce silicon carbide nanowires. The application has lower cost.

This application provides a three-terminal tandem solar cell based on a silicon nanowire structure, relating to the field of solar cell technology. In the perovskite top cell of this application, a first electrode layer is provided facing the incident light, while in the crystalline silicon bottom cell, a second and third electrode layer are provided facing away from the incident light. Furthermore, multiple nanowire structures are spaced apart on the side of the N-type silicon absorber layer facing the incident light. The nanowire structure can enhance the coupling and propagation of long-wavelength photons to the N-type silicon absorber layer through waveguide effects and light field modulation, and it exhibits subwavelength optical characteristics, achieving anti-reflection effects over a wide spectral range and improving the absorption efficiency of the crystalline silicon bottom cell for long-wavelength photons. In addition, by setting a three-electrode structure, the overall energy output performance of the cell is improved.

This invention discloses a preparation apparatus and method for silicon nanowire materials, belonging to the field of nanomaterial preparation technology. It includes a powder supply system, a high-temperature thermal shock reaction system, and a collection system arranged sequentially from top to bottom. The powder supply system is positioned directly above the high-temperature thermal shock reaction system to freely release silicon raw material powder downwards. The high-temperature thermal shock reaction system includes a high-temperature resistant heating element and an electrode clamp. The two ends of the high-temperature resistant heating element are fixed to the electrode clamp, and a high-temperature zone is formed inside the heating element through electrothermal heating, inducing a hot upward airflow. The collection system is positioned directly below the high-temperature thermal shock reaction system to collect the silicon nanowire material that falls freely after the reaction. This invention completely eliminates the original substrate loading, drying, and physical separation steps, achieving a one-step direct preparation of powder in and finished product out, greatly simplifying the process flow.

The application provides a kind of biomass carbon load silicon nanowire composite material and its preparation method and purposes, the preparation method is by chemical activation method and physical activation method is combined, on the surface and inside of biomass material layer by layer etching, form multilayer biomass porous carbon material of different pore size, effectively improve the problem of incomplete etching or excessive etching of biomass porous carbon prepared by using single activator;The specific surface area of the prepared multilayer porous carbon is large, the void fraction is high, and the metal catalyst particles of different scales can be planted in the interior to play a grading role for large particle catalyst;Silicon nanowires are directionally grown in the carrier by catalytic growth, and the space network structure of this multilayer porous carbon can effectively withstand the volume expansion of silicon nanowires and inhibit the repeated growth of SEI film.

A three-dimensional netted structure composite material comprises: a porous carbon microsphere containing netted structure through holes, silicon nanowires distributed in the through holes of the porous carbon microsphere, and a carbon shell. The silicon nanowires are formed by catalyzing, by means of Au or Ag, a silicon-containing gas and depositing same in the through holes; or the silicon nanowires are formed by depositing a silane gas in the through holes to form silicon oxide nanoparticles, then electrolyzing the silicon oxide nanoparticles in the through holes under a molten salt system. The silicon nanowires form three-dimensional netted structures in through holes of the porous carbon microsphere. Applying the three-dimensional netted structure composite material as a negative electrode active material in a lithium battery can endow the lithium battery with a relatively low volume expansion rate, a relatively high mass specific capacity, and good conductive performance and cycling stability.

Disclosed is a memristor device (1) comprising two electrodes (3), each forming or including a Schottky diode (5) having a Schottky barrier, wherein the Schottky diodes are polarized in a back-to-back arrangement, and at least one silicon nanowire (4) connecting the two electrodes, wherein the silicon nanowire is provided with a superficial oxide layer (6). A corresponding fabrication process including an oxidation process for the Si nanowire(s) is also described.

This invention discloses a low-melting-point molten salt energy storage material and its preparation method, belonging to the technical field of physical heat transfer energy storage materials. This method involves introducing modified silicon carbide nanowires and modified sheet-like zinc-aluminum flakes as functional fillers generated through a mercapto-olefin click reaction to composite modify a ternary nitrate molten salt. Compared to the unmodified basic molten salt system, the prepared low-melting-point molten salt energy storage material achieves comprehensive improvements in thermal performance, corrosion resistance, cycle stability, and physical structural stability. Its melting point is approximately 81-93℃, which is lower than that of SolarSalt. Compared to existing mixed molten salts, its melting point is lower to varying degrees, significantly reducing the overall system cost, improving system safety and stability, achieving a wider operating temperature range, and increasing power generation efficiency.

The application discloses a silicon nanowire powderization method, which comprises the following steps: preparing silicon nanowires into regular-shaped blocks with consistent thickness and bulk density; drying the regular-shaped blocks in a drying box; allowing the mutually intersecting silicon nanowires to be broken by external mechanical force, and becoming blocks with compact appearance; and processing the compacted block-shaped silicon nanowires into powder by external mechanical force. The silicon nanowires are sheared and broken by external pressure; the bulk density of the silicon nanowires is controlled by adjusting the filter pressing pressure, so that the length of the broken silicon nanowires is regulated, and the subsequent carbon coating process is facilitated. The shearing and pulverization do not need any additives, so that the pollution of the additives to the silicon nanowires is avoided, and the good performance of the silicon nanowires, such as high capacity and high initial efficiency, is ensured. The required equipment is common and low in price, the production process is simple and efficient, no additional auxiliary materials are needed, and therefore the processing cost is low.

The application relates to a preparation method of a silicon-carbon negative electrode material and application thereof. The preparation method comprises the following steps: placing a silicon nanowire cluster dispersion liquid, a silane coupling agent and an acid solution in a first solvent to carry out first mixing, standing, filtering and drying to obtain surface-modified silicon nanowires; placing the surface-modified silicon nanowires and a first carbon source in a second solvent to carry out second mixing, filtering and drying, and then carrying out first sintering to obtain a first sintering product; grinding the first sintering product to a particle size of 1-20 mu m, carrying out ball milling with a second carbon source, and then carrying out second sintering to obtain a second sintering product; and grinding the second sintering product to obtain a silicon-carbon negative electrode material with a particle size of 0.5-5 mu m. The application solves the problems of uneven coating in the silicon nanowire coating process and separation of the carbon layer and the silicon wire during grinding, and a silicon-carbon negative electrode material with high cycle performance and high specific capacity is prepared.

Gate-all-around integrated circuit structures having a heterogeneous or mixed cFET architecture are described. For example, an integrated circuit structure includes a first vertical stack of horizontal nanowires over a second vertical stack of horizontal nanowires, the first vertical stack of horizontal nanowires including (110) silicon nanowires, and the second vertical stack of horizontal nanowires including (100) silicon nanowires, or the first vertical stack of horizontal nanowires including (100) silicon nanowires, and the second vertical stack of horizontal nanowires including (110) silicon nanowires. First epitaxial source or drain structures are at ends of the first vertical stack of horizontal nanowires. Second epitaxial source or drain structures are at ends of the second vertical stack of horizontal nanowires, the second epitaxial source or drain structures vertically beneath and having a different composition than the first epitaxial source or drain structures.

To provide a composite of nanocarbons and a silicon nanostructure, the silicon nanostructure including a structure combining a porous structure and silicon nanowires and a structure in which the silicon nanowires are bonded on a porous layer, the composite capable of inhibiting expansion and preventing electrical loss, as well as being a powder and having a high capacity.SOLUTION: A composite consists of a silicon nanostructure 1 and nanocarbons. The silicon nanostructure 1 includes a silicon porous layer 2 having a plurality of first pores 4 and one or more porous silicon nanowires 3 having a plurality of second pores 6 continuously coupled to the silicon porous layer 2.SELECTED DRAWING: Figure 12

The application belongs to the technical field of thermal insulation material detection, and relates to a thermal conductivity prediction method of anisotropic silicon oxide nanowire aerogel, comprising the following steps: 1, feature parameter extraction based on micro-morphology: taking a scanning electron microscope image of the silicon oxide nanowire aerogel as a modeling benchmark; 2, construction of a random entangled spline curve skeleton: parameterized skeleton generation is carried out by using a three-dimensional modeling software; 3, entity scanning and anisotropic cell establishment; 4, multi-physical field simulation based on an entity model; the application introduces porous medium heat transfer and microscale correction functions, significantly improves the prediction accuracy and application range, can accurately reflect the complex heat transfer mechanism inside the nanowire aerogel, and provides a reliable basis for optimizing material design.

This invention relates to the field of new energy batteries, specifically to a negative electrode composite material, its preparation method, and a battery. The negative electrode composite material of this invention comprises a porous graphite framework, silicon nanowires and metal nanoparticles deposited in the pores of the porous graphite framework, a first coating layer covering the surface of the porous graphite framework, and a second coating layer covering the surface of the first coating layer; wherein the metal nanoparticles include gold nanoparticles; the first coating layer is an amorphous carbon coating layer; and the second coating layer is a fast ion conductor coating layer. The negative electrode composite material of this invention maintains high energy density while also exhibiting excellent cycle life and rate performance, thereby achieving a balance between structural stability and interfacial dynamics.

This invention discloses a vertically close-packed silicon nanowire CFET structure and its fabrication method. The structure includes a heterodielectric layer comprising a first dielectric layer and a second dielectric layer arranged vertically, with nanowires disposed on their outer sides. The nanowires are p-type and n-type nanowires, and are vertical nanowires or include vertical nanowires. Conductive electrodes are disposed on the upper, side, and bottom parts of the heterodielectric layer. A gate dielectric and a gate electrode are disposed on the outer wall of the heterodielectric layer. This invention proposes a CFET structure based on vertically close-packed nanowires, which requires only simple thin-film and etching processes to fabricate the vertically close-packed nanowires. Furthermore, p-type and n-type nanowires can be generated in one simple step, resulting in low fabrication costs. Utilizing EBE collimation deposition technology, metal electrodes can be fabricated without relying on high-precision photolithography. Electrode deposition after the channel improves contact resistance, thereby enhancing device performance.

The present application relates to a kind of pretreatment method for silicon nanowire physical dispersion and its application, the pretreatment method includes: silicon nanowire is infiltrated in the organic solution containing surfactant and coupling agent and is reacted;Reaction product is infiltrated in the mixed system containing carbon nanotube, polyethylene glycol, diisocyanate, catalyst and chain extender and is reacted.The present application also relates to a kind of modified silicon nanowire, which is prepared by the pretreatment method.Organic / inorganic composite coating layer is introduced on the surface of silicon nanowire, and the organic phase provides flexibility and expansion space for silicon nanowire, ensures the integrity degree and electrochemical performance of silicon nanowire in subsequent processing and grinding process, while the organic phase has hydrophobic ability, which can inhibit the reaction of high-activity surface of silicon nanowire and water;Inorganic phase can improve the conductivity of silicon nanowire, and at the same time, improve the mechanical strength of silicon nanowire, so that silicon nanowire maintains longer aspect ratio in grinding, maintains excellent electrochemical performance.

Gate-all-around integrated circuit structures having a heterogeneous or mixed cFET architecture are described. For example, an integrated circuit structure includes a first vertical stack of horizontal nanowires over a second vertical stack of horizontal nanowires, the first vertical stack of horizontal nanowires including (110) silicon nanowires, and the second vertical stack of horizontal nanowires including (100) silicon nanowires, or the first vertical stack of horizontal nanowires including (100) silicon nanowires, and the second vertical stack of horizontal nanowires including (110) silicon nanowires. First epitaxial source or drain structures are at ends of the first vertical stack of horizontal nanowires. Second epitaxial source or drain structures are at ends of the second vertical stack of horizontal nanowires, the second epitaxial source or drain structures vertically beneath and having a different composition than the first epitaxial source or drain structures.

The application provides a biosensor based on a screen-printed electrode and a preparation method and application thereof. The preparation method comprises the following steps: a, depositing a silicon thin film transition layer on the surface of a working electrode of a screen-printed electrode by using a PECVD device; b, spin-coating a tin dioxide solution on the surface of the silicon thin film transition layer to form a tin dioxide layer; c, first performing hydrogen reduction on the surface of the tin dioxide layer, and then performing silicon nanowire growth to obtain a silicon nanowire layer; d, first performing ultraviolet ozone treatment on the silicon nanowire layer, then placing the silicon nanowire layer in an alcohol solution containing 3-aminopropyl triethoxysilane to perform condensation reaction, cleaning, then performing heating to enhance the coupling strength, and finally placing the silicon nanowire layer in a phosphate buffer solution containing a nucleic acid aptamer to fix the nucleic acid aptamer, so as to obtain the biosensor. The application prepares silicon nanowires on a screen-printed electrode, then fixes a nucleic acid aptamer, and constructs an electrochemical sensor for detecting Alzheimer's disease, and the electrochemical sensor has excellent conductivity, biocompatibility and detection sensitivity.

This invention relates to the field of wide bandgap semiconductor nanostructure fabrication technology, specifically an electrochemical etching method for silicon carbide nanowires. The method comprises: S1, selecting a 4H-SiC wafer, cleaning and drying it to obtain a pretreated 4H-SiC wafer; S2, using the pretreated 4H-SiC wafer as the anode and a platinum sheet as the cathode, immersing them in a mixed etching solution of HF / H2O2 / (CH2OH)2 with a fixed spacing; S3, applying an oscillating current with a period of 60s to the electrochemical etching system, adjusting the current amplitude according to the etching stage, and completing the etching under isothermal conditions; wherein, the current amplitude during the nanowire backbone formation stage is 0.4-0.5 mA / cm², and the current amplitude during the protrusion structure induction stage increases to 0.6-0.7 mA / cm². 2 During the protruding structure forming stage, the current amplitude increases to 0.9-1.0 mA / cm. 2 During the surface finishing stage, the current amplitude is reduced to 0.8-0.9 mA / cm². S4: The etched 4H-SiC wafer is removed, ultrasonically cleaned, and dried to obtain bamboo-like silicon carbide nanowires. This solves the problems of large lattice damage, poor morphology controllability, and insufficient anisotropy in existing silicon carbide nanowire etching processes.