A compute node comprising: a
chassis (102; 202) with a base (108; 208), a pair of walls (110; 210) each connected to a perimeter side (108A, 108B; 208A, 208B) of the base (108; 208), and a first upper cover section (112A; 212A) connected to the pair of walls (110; 210) to cover part of the
chassis (102; 202); a
locking mechanism (104, 104A1, 204, 204A1) coupled to a rear inner end face (138; 238) of the first upper cover section (112A; 212A); and a shelf (106; 206) which is slidable from a front of the
chassis (102; 202) and attached to the
locking mechanism (104, 104A1, 204, 204A1), and wherein each shelf (106; 206) comprises: a
front cover (142A); a base (144A) coupled to the
front cover (142A); a pair of brackets (146A) connected to the floor (144A); a pair of risers (148A) comprising a first riser (148A1) containing a first plug socket (178A1) and a second riser (148A2) containing a second plug socket (178A2), each riser (148A1, 148A2) of the pair of risers (148A) being connected to a corresponding bracket of the pair of brackets (146A); and A pair of
graphics processing unit (GPU) card assemblies (150; 250) comprising a first GPU card
assembly (150A1) with a first connector and a second GPU card
assembly (150A2) with a second connector, wherein the first GPU card
assembly (150A1) and the first riser (148A1) are arranged along one lateral side of the pair of brackets (146A) and the second GPU card assembly (150A2) and the second riser (148A2) are arranged along another lateral side of the pair of brackets (146A), wherein the first connector is opposite the second connector socket (178A2) and the second connector is opposite the first connector socket (178A1), each GPU card assembly (150A1, 150A2) of the pair of GPU card assemblies (150; 250) being connected to a respective riser. (148A1) of the pair of risers (148A) is connected.