54 results about "Eutectic bonding" patented technology

The invention provides a three-wafer bonding MEMS device and a preparation method thereof, the three-wafer bonding MEMS device comprises a first wafer, a second wafer, a third wafer, an insulating layer and a metal electrode, the first wafer comprises a plurality of first grooves, the bottom of each first groove is communicated with at least one silicon groove, and each silicon groove is filled with an insulating material; protruding silicon-silicon bonding platforms are arranged between the first grooves and inside the first grooves. The second wafer is connected with the first wafer through a silicon-silicon bonding platform, and a plurality of strip holes are formed in the second wafer; the third wafer comprises a plurality of second grooves; a limiting bulge can be arranged in the second groove; a raised eutectic bonding platform is arranged between the interior of the second groove and the second groove, and the third wafer is bonded with the second wafer; the insulating layer covers the first wafer; the plurality of metal electrodes are disposed on the insulating layer. According to the invention, the problem that the electrical parameters of the silicon-silicon bonding process cannot be tested and represented in the production and manufacturing of the MEMS device is solved.

The invention relates to an MEMS-CMOS device vertical interconnection integrated packaging preparation method, which comprises the following steps of: processing a TSV (Through Silicon Via) on a first silicon wafer (3), and filling crystalline silicon (2a); respectively processing a CMOS circuit layer and an RDL layer on the first silicon wafer, and processing a germanium bonding point (8) on the other surface of the first silicon wafer; a second SOI silicon wafer (10) and a third SOI silicon wafer (11) are fused and bonded to form a cavity (9), an aluminum / titanium / aluminum bonding point (12) is prepared on the third silicon wafer, an MEMS movable microstructure (13) is prepared on the third silicon wafer, the metal aluminum / titanium / aluminum bonding point and the MEMS movable microstructure are electrically connected, and the aluminum-germanium bonding point of the first silicon wafer and the aluminum-germanium bonding point of the third silicon wafer are subjected to eutectic bonding. According to the invention, the size of an integrated packaging chip of the MEMS device and the CMOS processing circuit is greatly reduced, and meanwhile, the RDL structure can realize wafer-level bonding packaging without considering the types, layout and size of the MEMS device and the CMOS circuit.

The invention provides a bonding structure, an MEMS device and a bonding method, and the bonding structure comprises a first wafer, the surface of the first wafer is provided with a projection, and the surface of the projection is provided with a plurality of first bonding metal layers which are arranged at intervals; a plurality of second bonding metal layers which are arranged at intervals are arranged at positions, corresponding to the bulges, on the surface of the second wafer; the second wafer and the first wafer form a bonding structure through eutectic bonding between the first bonding metal layer and the second bonding metal layer; wherein the orthographic projection of the first bonding metal layer on the bulge and the orthographic projection of the second bonding metal layer on the bulge are at least partially not overlapped. According to the embodiment of the invention, the orthographic projection of the first bonding metal layer on the projection and the orthographic projection of the second bonding metal layer on the projection at least partially do not coincide, the non-coincident position forms a complementary structure during bonding to store overflow, the overflow risk is reduced, the coincident position forms a bonding structure through eutectic melting, and the bonding strength is ensured.

The invention belongs to the technical field of intelligent power modules, and discloses an intelligent power module and a manufacturing method thereof.The intelligent power module comprises a substrate, a chip function layer, a function module assembly and a plurality of intelligent power module pins, and the function module assembly comprises a metal substrate plate, a plurality of function components and a plurality of function module pins; and the functional module assembly is mounted on the chip functional layer through the mounting surface of the metal substrate plate. According to the intelligent power module, through the hierarchical integrated design of the function module assembly and the chip function layer, compared with an existing scheme in which all function chips are discretely mounted on a substrate and depend on a complex structure of eutectic welding and DA equipment, the function module assembly is directly mounted on the chip function layer through a mounting surface in a pre-integrated form, so that the structure of the chip function layer is simplified; extra copper radiating fins and eutectic welding equipment are not needed, so that the input cost of special equipment is reduced.

This invention provides a eutectic bonding fixture and bonding method, relating to the technical field of chip processing. The eutectic bonding fixture includes a base, an assembly plate, and a cover plate. The cover plate has a through-hole for machining. The assembly plate and the cover plate are arranged from bottom to top. There are multiple assembly plates arranged sequentially along a direction perpendicular to the base. Each assembly plate is equipped with a housing positioning stage, and at least two assembly plates have housing positioning stages of different types. The assembly plate and / or the cover plate are movably connected to the base so that the downward projection of the machining hole can fall on the housing positioning stage to be worked, and the unworked housing positioning stage is located within the downward projection path of the cover plate.

The invention relates to a metal eutectic bonding MEMS pressure sensor and a preparation method thereof, and belongs to the technical field of micro electro mechanical systems. The invention provides a metal eutectic bonding MEMS pressure sensor and a preparation method thereof. The sensor comprises a base, a lower bonding film, an upper bonding film, a substrate, an insulating film, a resistor strip and a thermistor film. The substrate, the insulating film, the resistor strip and the thermistor film form a core body; the silicon substrate manufactured through the MEMS technology is used as a core body, and the problem that the MEMS technology cannot be used for a metal elastomer in a traditional sputtering film type pressure sensor is solved. Aiming at the problems of an existing MEMS pressure sensor during assembly and system integration, low-stress connection between a core body and a metal base is realized by adopting a metal eutectic bonding technology, additional stress caused by difference of thermal expansion coefficients is effectively relieved, and by utilizing the characteristics of high strength and high stability of a metal eutectic bonding structure, the MEMS pressure sensor can be assembled and integrated with a system. The technical problem that the chip is easily damaged due to stress concentration in a gluing / welding mode is solved.

This invention provides an automated eutectic bonding method and apparatus, relating to the field of microelectronic packaging technology. The method includes: heating a carrier plate placed on a eutectic platform and the eutectic solder thereon to melt the eutectic solder into molten solder; using a suction nozzle to pick up a chip; controlling the suction nozzle to carry the chip vertically, pressing it down onto the molten solder and applying a first pressure, then vertically lifting the chip to detach it from the surface of the molten solder; repeating the pressing and lifting action at least twice; after the final pressing, maintaining a second pressure and controlling the eutectic platform to cool, allowing the molten solder to solidify and complete the bonding. This invention, through multiple reciprocating pressing movements perpendicular to the bonding plane, promotes the wetting of the back side of the chip by the molten solder, achieving low-void, high-quality eutectic bonding.

The invention provides a transducer which can be reliably bonded in a bonding region and has high reliability. The transducer includes: a second semiconductor substrate on which a first insulating layer having a first metal layer provided on a surface thereof is disposed; a first semiconductor substrate which is disposed so as to overlap the second semiconductor substrate and on which a second insulating layer having a second metal layer provided on the surface thereof is disposed; a functional element provided between the first semiconductor substrate and the second semiconductor substrate; and a eutectic reaction layer that bonds the first semiconductor substrate and the second semiconductor substrate in a bonding region located around the functional element, the eutectic reaction layer being a bonding layer formed by eutectic bonding of the first metal layer and the second metal layer. At least one of the first insulating layer and the second insulating layer is provided with a recessed portion having a bottom portion wider than the width of the bonding region, and the bonding region is disposed at the bottom portion.

An electronic device comprises a target substrate, a micro semiconductor structure array, a conductor array, and a connection layer. The micro semiconductor structure array is disposed on the target substrate. The conductor array corresponds to the micro semiconductor structure array, and electrically connects the micro semiconductor structure array to a pattern circuit of the target substrate. The conductors of the conductor array are independent from one another. Each conductor is an integrated member formed by eutectic bonding a conductive pad of the target substrate and a conductive electrode of the corresponding one of the micro semiconductor structures of the micro semiconductor structure array. The connection layer connects the micro semiconductor structures to the target substrate. The connection layer excludes a conductive material. The connection layer contacts and surrounds the conductors, so that the connection layer and the conductors together form a one-layer structure.

To improve the reliability of mounting through bonding and eutectic bonding.SOLUTION: A bonding device includes: a transport mechanism for transporting a substrate; a bonding tool for bonding an electronic component to the substrate; and an anti-oxidation path extending along the transport mechanism and having a wall surrounding the transport mechanism. Therein the anti-oxidation path includes: an inlet for introducing the substrate; an opening that allows the bonding tool and the substrate to approach to or move away from each other; a gas inlet for introducing an anti-oxidation gas inside the wall; and an electrode having a passage hole through which the anti-oxidation gas passes, inside the wall, the electrode converting the anti-oxidation gas into plasma when the anti-oxidation gas passes through the passage hole.SELECTED DRAWING: Figure 1

A preclean process may be omitted from a eutectic bonding sequence. To remove oxide from one or more surfaces of a device wafer of a micro-electromechanical-system (MEMS) structure, a duration of an acid-based etch process in the eutectic bonding sequence may be increased relative to the duration of the acid-based etch process when the preclean process is performed. The increased duration of the acid-based etch process enables the acid-based etch process to remove the oxide from the one or more surfaces of the device wafer without the use of a preceding preclean process. This reduces the complexity and cycle time of the eutectic bonding sequence, reduces the risk of stiction between suspended mechanical components of the MEMS structure, and / or reduces the likelihood that the MEMS structure may be rendered defective or inoperable during manufacturing, which increases process yield.

This invention discloses a CPO eutectic bonding method and system for material transfer, eutectic bonding, and other processes, comprising the following steps: controlling a material movement adjustment mechanism to move to the pick-up station, picking up a chip via a pick-up head, and transferring the chip to the bonding station; preheating the chip to a first set temperature using a heating module; moving the chip above the substrate solder layer and aligning the chip with the substrate solder layer, then controlling the heating end face of the pick-up head to heat up to a second set temperature, melting the eutectic solder between the chip and the substrate; after the heating end face of the pick-up head reaches the eutectic temperature and stabilizes for a first set time, applying a set bonding pressure to evenly spread the molten solder at the interface between the chip and the substrate, and continuously maintaining the temperature and pressure for a second set time to completely melt the solder. This invention can solve the problem of low mass production efficiency and meet the needs of large-scale CPO packaging.

The application designs a resonant pressure sensor based on C-SOI and a manufacturing method. The C-SOI with high device layer thickness uniformity is manufactured by gold-silicon eutectic bonding and mechanical chemical polishing processes, and the pressure sensitive membrane and resonator aligned with the pre-embedded groove are manufactured by using the bonding wafer through photoetching and deep etching processes, and the silicon wafer and the C-SOI are bonded together by using the gold-silicon eutectic bonding process to realize the vacuum packaging of the resonator. The silicon resonant pressure sensor designed by the application can realize high-precision measurement of gas pressure, and the differential output of the double resonator can greatly improve the pressure sensitivity of the sensor, reduce the temperature drift of the sensor and reduce the static pressure error of the sensor in the measurement process. The cavity thickness of the C-SOI is accurately controlled, the influence of side drilling on the performance of the resonator is eliminated, and the resonator failure caused by the release of hydrogen fluoride is eliminated.

The invention discloses a semiconductor chip adopting a diamond heat sink and a preparation method of the semiconductor chip, and the semiconductor chip comprises a power chip which is a high-power semiconductor chip with high energy density and high heating; the heat conduction substrate is a common heat sink substrate; the diamond deposition layer is a patterned diamond film deposited on the heat conduction substrate; the transition layer is arranged on the side, away from the heat conduction substrate, of the diamond deposition layer and used for enhancing the binding force and preventing interface reaction; and the graphical metallization layer is arranged on one side, far away from the diamond deposition layer, of the transition layer and is used for realizing welding or eutectic bonding with the power chip. A high-efficiency heat conduction path is adopted, a thick metal bonding area directly located below the chip provides a low-thermal-resistance vertical heat conduction channel, and a graphical stress buffer structure ensures transverse heat conduction and avoids huge thermal stress caused by full coverage of metal at the same time.

The invention belongs to the technical field of gas detection and optical measurement, and discloses an intermediate infrared spectrometer and a detection method thereof. The mid-infrared spectrometer comprises a constant-temperature cavity and a measuring system connected with the constant-temperature cavity, wherein the constant-temperature cavity comprises a shell, a spiral flow channel formed in the shell, an annular base embedded and mounted in the spiral flow channel, and an optical fiber mounted in the annular base. The optical fiber is connected with the annular base through eutectic bonding, a through hole array is arranged on the inner wall of the annular base, a temperature-sensitive shape memory polymer is filled between the annular base and the spiral flow channel, and the optical fiber comprises a hollow base body, a metal film arranged on the inner surface of the hollow base body and a protective layer arranged on the inner surface of the metal film. The porous adsorption coating layer is arranged on the outer surface of the hollow substrate. The infrared spectrometer has the advantages of high sensitivity, high stability, strong environmental adaptability and compact structure, and can realize high-precision and reliable detection of trace gas isotopes in a complex field environment.

The application discloses an anti-vibration CPO optical coupling fixing structure and a preparation method thereof. The structure comprises a silicon base material, a three-stage buffer slope positioning groove is formed in the silicon base material, and the three-stage buffer slope positioning groove comprises a guiding area, a stress release area and a locking area in sequence. A metallization layer is arranged on the inner wall of the locking area, and an optical fiber is metallurgically combined with the metallization layer through AuSn eutectic solder. MEMS cantilever stress compensators composed of U-shaped cutting gaps and silicon island cantilevers are arranged on both sides of a fiber entry point of the positioning groove on the silicon base material. The preparation method comprises silicon base positioning groove etching, metallization treatment, optical fiber eutectic bonding and MEMS cantilever processing. Through the synergistic effect of the three-stage buffer positioning groove, eutectic solder rigid fixing and the MEMS cantilever stress compensation, the coupling loss fluctuation is less than or equal to 0.2 dB under 50G high impact, typical equipment vibration frequency bands are effectively isolated, and the alignment offset problem of the optical fiber and the photonic chip coupling interface in an extreme environment is solved.

The invention provides a wafer MEMS air pump based on a PZT piezoelectric film, and relates to the technical field of MEMS and fluid control, the wafer MEMS air pump comprises an upper plate, a middle plate and a lower plate, the top of the middle plate and the bottom of the upper plate are mutually bonded and connected based on an Au-Sn eutectic bonding part, and the middle plate and the lower plate are connected in a covalent bonding mode adopting PDMS pretreatment. The invention is suitable for various small and miniature portable equipment and other application scenes, adopts an MEMS (Micro-Electro-Mechanical System) integrated process, does not need to be assembled, and is good in process consistency and low in batch production cost; the working frequency of the core PZT piezoelectric film resonator is high (usually in an ultrasonic frequency band), ultrasonic waves generated by vibration cannot be heard, and compared with a traditional mechanical miniature air pump in a noise-pollution-free preparation mode, the miniature air pump is simple in structure, good in impact resistance and not prone to damage.

The invention provides a flexible graphene transformer vibration sensor packaging design method based on a micro-cap structure, and belongs to the technical field of sensors. The method comprises the following steps: preparing an H-type graphene resonator layer on a flexible polyimide substrate; a porous PDMS structure layer containing graphene is constructed on the resonator layer through a salt template method; forming a graphene-containing microstructure layer on the surface of the porous layer by adopting an abrasive paper template method; preparing a micro-cap groove with a silicon dioxide / chromium / gold layer on the silicon-based insulator wafer; and the porous / microstructure layer assembly integrated with the H-shaped resonator and the micro-cap structure layer form a vacuum sealing cavity through gold-silicon eutectic bonding. The flexible graphene vibration sensor designed by the invention can accurately identify wide vibration characteristics in the operation of the transformer, effectively distinguish normal and abnormal working conditions, and can stably work in a complex electromagnetic environment and an oil contamination condition, thereby realizing long-term, accurate and reliable transformer vibration state monitoring.

The application provides a CMOS-MEMS integrated pressure sensor and a preparation process thereof. The pressure sensor comprises a bonded MEMS wafer and a CMOS wafer; a bonding sealing area and a PAD vertical interconnection structure in the bonding sealing area are arranged between the MEMS wafer and the CMOS wafer; the bonding sealing structure is formed by eutectic bonding of a metallization layer and a metal solder ball formed in corresponding bonding areas of the two wafers, and the bonding sealing structure surrounds a sensitive element to form a sealed cavity; the PAD vertical interconnection structure comprises conductive bumps respectively formed on the two wafers, the two conductive bumps are aligned with each other and bonded, and electrical interconnection between the MEMS wafer and the CMOS wafer is realized. The electrical interconnection of the pressure sensor realizes monolithic integration, not only improves the problems of increased signal transmission loss, reduced detection precision caused by additional parasitic resistance, capacitance and inductance introduced by wire bonding, and external noise interference, but also improves the service life and reliability, and reduces the size of the chip.

The application discloses a silicon-based piezoresistive differential pressure pressure sensor packaging structure, a method and a limiting assembly device, relates to the technical field of pressure sensor packaging, and comprises a metal base, an adapter and a silicon-based piezoresistive pressure sensitive chip. The metal base is internally provided with a penetrating internal air channel; the adapter is made of glass, is fixed to the upper surface of the metal base through a first adhesive layer, and is internally provided with a through hole in communication with the internal air channel of the metal base; the first adhesive layer is a polymer adhesive layer with stress buffering capacity; the silicon-based piezoresistive pressure sensitive chip is fixed to the upper surface of the adapter through a eutectic bonding layer and corresponds to the position of the through hole, so that the measured pressure transmitted by the internal air channel can act on the chip. The application can simultaneously consider the mechanical stability of chip connection, ultrahigh air tightness, excellent thermal stress adaptability and long-term measurement precision stability.

An electronic device comprises a target substrate, a micro semiconductor structure array, a conductor array, and a connection layer. The micro semiconductor structure array is disposed on the target substrate. The conductor array corresponds to the micro semiconductor structure array, and electrically connects the micro semiconductor structure array to a pattern circuit of the target substrate. The conductors of the conductor array are independent from one another. Each conductor is an integrated member formed by eutectic bonding a conductive pad of the target substrate and a conductive electrode of the corresponding one of the micro semiconductor structures of the micro semiconductor structure array. The connection layer connects the micro semiconductor structures to the target substrate. The connection layer excludes a conductive material. The connection layer contacts and surrounds the conductors, so that the connection layer and the conductors together form a one-layer structure.

The application discloses a packaging structure and process for a continuous blood glucose monitoring chip, which integrates a biosensor chip, a signal processing module, a wireless transmission unit and a power management module in a single micro package through a 3D heterogeneous integration technology; the process comprises the following steps: performing TSV processing on a silicon wafer to form a through hole with a pore diameter of 5-10 mu m and a depth-width ratio of 10:1, and filling the through hole with copper electroplating to form a conductive needle; processing the biosensor chip and the signal processing module to form a vertical interconnection structure; precisely interconnecting the components through eutectic bonding and C2W bonding; adopting a low-temperature plastic packaging process, using a biocompatible resin with a filler amount greater than 85% to form a protective layer, controlling the warpage amount to be less than 2 mm, and only exposing the sensing end to ensure signal acquisition; and finally integrating a power management module and attaching a heat sink. The structure realizes the reduction of the volume to millimeter level, and improves the long-term stability and reliability through a biocompatible layer and a barrier layer.

This invention discloses a vertical LED chip and its fabrication method, relating to the field of semiconductor technology. The method includes forming a light-emitting structure layer and a first bonding layer on a growth substrate; the light-emitting structure layer has an N-type conductive via, and the first bonding layer forms a bonding insertion hole within the N-type conductive via; forming an auxiliary bonding layer and a second bonding layer on a conductive support substrate; the auxiliary bonding layer consists of auxiliary bonding pillars, and the second bonding layer covers the outer surface of the auxiliary bonding pillars to form a bonding plug; roughening the two bonding layers and eutectic bonding them; inserting the bonding plugs into the corresponding bonding insertion holes; peeling off the growth substrate and forming a P-electrode in the exposed light-emitting structure layer; using the conductive support substrate as the N-electrode; and cutting to obtain the vertical LED chip. This invention, through the cooperation of the bonding insertion holes and bonding plugs, and the roughening treatment of the bonding layer surface, can effectively reduce the generation of bonding voids, which is beneficial to improving the reliability of the vertical LED chip.

The embodiment of the invention discloses a bulk acoustic wave filter wafer level package preparation method and electronic equipment, and the method comprises the steps: constructing a cap wafer through employing a deep silicon etching technology, carrying out the two times of photoetching and corresponding deep silicon etching, forming a cavity, a through hole, and a chip wall ring, enabling the through hole of the cap wafer to be aligned and superposed with a chip electrode of a product wafer, and enabling the chip electrode of the product wafer to be aligned and superposed with the cavity; enabling the outer side of the chip wall ring of the cap wafer to be aligned with the outer side of the chip metal ring of the product wafer, bonding the construction surface of the cap wafer with the product wafer by adopting a gold-silicon eutectic bond, carrying out thinning treatment on the non-construction surface of the cap wafer, exposing the through hole and the chip wall ring, and carrying out graphical treatment on the non-construction surface metal of the cap wafer, and the electrode pattern and the annular metal pattern are reserved, so that the stability of the packaging structure can be effectively improved, the metal coverage area of the surface of the cap wafer can be effectively increased, the heat conduction efficiency is improved, and the bulk acoustic wave filter wafer-level packaging with a stable structure and good heat conduction performance is obtained.

The invention discloses a heat dissipation enhanced board-level packaging structure and method. The method comprises the following steps: providing at least one chip provided with an electric connection structure; the chip is fixed in the mode that the active face, provided with the electric connection structure, of the chip faces a carrier plate, plastic packaging is carried out, and a plastic packaging body is formed; grinding the plastic package body until the back surface, opposite to the active surface, of the chip is exposed; removing the carrier plate, and selectively manufacturing a fan-out rewiring structure on the surface of the plastic package body on the same side as the active surface of the chip; providing a heat dissipation support substrate, and respectively preparing eutectic solder layers on the bonding surface of the heat dissipation support substrate and the back surface of the chip exposed by the plastic package body; carrying out eutectic bonding on the plastic package body and the heat dissipation support substrate through the eutectic solder layer to form an eutectic bonding interface layer; and cutting to obtain an independent packaging structure. According to the invention, while a low-thermal-resistance heat dissipation path is provided for the high-power-consumption chip, low cost and excellent mechanical reliability can be maintained, and packaging warping can be effectively inhibited.

The utility model discloses an anti-Kirkendall effect metal layer structure for Micro LED bonding, which comprises a CMOS side first metal layer and an epitaxial side second metal layer, and the CMOS side first metal layer and the epitaxial side second metal layer are connected through eutectic bonding to form an integral structure. The CMOS side first metal layer comprises a silicon-based CMOS, a substrate protection layer, a first adhesion protection lamination layer, a first phase change alloy layer and a surface enhancement layer; the epitaxial side second metal layer comprises an epitaxial wafer, a conductive layer, a barrier protection layer, a second adhesion protection lamination layer and a second phase change alloy layer; through the pre-phase-change treatment, the voidage of the bonding interface is greatly higher than that of the traditional single-layer Au-Sn bonding, the thermal resistance is also greatly reduced, and the heat dissipation of the device is effectively improved; the multi-layer structure design is combined with the laser cleaning effect, so that the bonding yield of Micro LEDs below 20 microns is greatly improved, and the mass production requirement is met; and the thickness of each layer and the deposition process can be flexibly adjusted to adapt to Micro LED chips with different sizes and bonding equipment, so that the method has wide engineering application value.

The invention provides eutectic equipment and a eutectic process.The eutectic equipment comprises a cross beam, a first chip mounting mechanism, a second chip mounting mechanism, a first material preparation mechanism, a second material preparation mechanism and a heating table, the first chip mounting mechanism and the second chip mounting mechanism are movably arranged on the cross beam, and the first chip mounting mechanism comprises a supporting plate and a first sliding table; the first sliding table is movably arranged on the cross beam in the first direction, the supporting plate is movably arranged on the first sliding table in the second direction, a material taking module is arranged on the supporting plate and comprises a fixed seat plate arranged on the supporting plate, and a movable seat plate is adjustably arranged on the fixed seat plate in the vertical direction; a rotary adjusting seat is rotationally mounted on the movable seat plate, a first suction nozzle is arranged on the rotary adjusting seat, and the rotating central axis of the rotary adjusting seat coincides with the central axis of the first suction nozzle. The first suction nozzle drives the chip and the heat sink to move relatively in the chip mounting process, so that the chip and the heat sink are fully attached, and the product yield is guaranteed.

Aspects of the subject disclosure may include, for example, bonding III-Nitride epitaxial layer(s) to a carrier wafer, wherein the III-Nitride epitaxial layer(s) are grown on a non-native substrate, after the bonding, removing at least a portion of the non-native substrate from the III-Nitride epitaxial layer(s), processing the III-Nitride epitaxial layer(s) to derive an array of III-Nitride islands, establishing a metal layer over the array of III-Nitride islands, resulting in an array of metal-coated III-Nitride islands, arranging the carrier wafer relative to a host wafer to position the array of metal-coated III-Nitride islands on a surface of the host wafer, causing the array of metal-coated III-Nitride islands and the surface of the host wafer to eutectically bond, and removing the carrier wafer to yield an integrated arrangement of III-Nitride islands on the host wafer. Additional embodiments are disclosed.

The invention discloses a packaging structure for a continuous blood glucose monitoring chip and a process thereof, and a biosensor chip, a signal processing module, a wireless transmission unit and a power management module are integrated in a single miniature packaging body through a 3D heterogeneous integration technology; comprising the following steps: carrying out TSV (Through Silicon Via) processing on a silicon wafer to form a through hole with the aperture of 5-10 microns and the depth-to-width ratio of 10: 1, and carrying out copper electroplating filling to form a conductive needle; processing the biosensor chip and the signal processing module to form a vertical interconnection structure; the components are accurately interconnected through eutectic bonding and C2W bonding; a low-temperature plastic packaging process is adopted, a protective layer is formed by using biocompatible resin with the filler amount larger than 85%, the warping amount is controlled within 2 mm, and only the sensing end is exposed to ensure signal acquisition; and finally, integrating a power management module and mounting a radiating fin. According to the structure, millimeter-level volume reduction is achieved, and meanwhile long-term stability and reliability are improved through the biocompatible layer and the blocking layer.

A transducer includes a second semiconductor substrate on which a first insulation layer having a first metal layer on its surface is disposed, a first semiconductor substrate that overlaps the second semiconductor substrate and on which a second insulation layer having a second metal layer on its surface is disposed, a functional element located between the first semiconductor substrate and the second semiconductor substrate, and a eutectic reaction layer bonding the first semiconductor substrate and the second semiconductor substrate to each other in a bonding region located around the functional element. The eutectic reaction layer is a bonding layer formed by eutectic bonding between the first metal layer and the second metal layer. At least one of the first insulation layer and the second insulation layer has a recess having a bottom wider than the bonding region in plan view. The bonding region is located at the bottom.