A low bandwidth phase lock loop (PLL) arranged in a dual-loop configuration is disclosed. The first loop is a standard loop configuration using a
crystal oscillator as a reference
clock. The loop parameters for this first PLL can be optimized to work over a wide range of output frequencies, and with a minimum amount of
jitter. The first loop outputs a reference
signal, which is a VCO output. The second loop comprises a bang-bang
detector configured to drive a digital
loop filter, which then drives a phase interpolator. The phase interpolator manipulates the output phase. Since phase and frequency are related, where frequency is the derivative of phase, small frequency offsets can be made using a
phase control signal, generated within the second loop based on the relation between the reference
signal and the
clock input signal. The second loop sets the
jitter transfer bandwidth of the
system.