The present invention provides a phase comparison 
signal processing circuit which processes an output rectangular wave 
signal of a digital phase 
comparator of a PLL, expands a pullable-in frequency width of the PLL and shortens a synchronization time. The phase comparison 
signal processing circuit includes a first signal path which is parallel-connected between a 
voltage shifter for converting a rectangular wave signal to a 
bipolar signal and an output terminal and comprises a rectifying circuit, an integration holding circuit, a differentiation circuit, a gate circuit, a 
voltage hold circuit and a common addition circuit, a second signal path comprising a rectifying circuit, an integration holding circuit, a differentiation circuit, a gate circuit, a 
voltage hold circuit and the addition circuit, and a 
control signal generator for individually controlling the integration holding circuits and the gate circuits of the first and second signal paths. The rectification of the 
bipolar signal, integration and holding of rectified voltages, differentiation of integrated hold values, holding of differentiated outputs and addition of hold voltages are carried out at the first and second signal paths thereby to output a processed signal.