144 results about "Harmonic rejection" patented technology

The utility model relates to a radio frequency power amplification circuit with a harmonic suppression function and a radio frequency chip. The radio frequency power amplification circuit comprises an input matching unit, a first-stage power amplification unit, a first-stage bias unit, a first-stage power supply unit, an inter-stage matching unit, a second-stage power amplification unit, a second-stage bias unit, a second-stage power supply unit and an output matching unit. According to the utility model, the LC type trap circuits are designed and used in the power supply unit and the inter-stage matching unit, so that secondary, tertiary and high-order harmonic suppression is realized in the radio frequency power amplification circuit; meanwhile, based on LC circuit structures in the power supply unit and the inter-stage matching unit, the inter-stage matching bandwidth is widened, and the linearity of the multi-stage power amplification unit is improved.

The embodiment of the invention provides an excitation signal generation method and system and a digital eddy current sensor, and the method comprises the steps: outputting a square wave signal through a pulse width modulation assembly of a microcontroller unit, and enabling the frequency and resolution of the square wave signal to be adaptive to eddy current probes with different inductance values; inputting the square wave signal into a low-pass filter for filtering, and setting the cut-off frequency of the low-pass filter, the suppression times of higher harmonics and the attenuation slope so as to output a sine wave signal with a target total harmonic distortion range; the amplitude of the sine wave signal is collected in real time, and the pulse width modulation duty ratio and the passband gain of a low-pass filter are dynamically adjusted in combination with a digital control algorithm, so that the sine wave signal is subjected to self-adaptive adjustment and correction and is output; and taking the sine wave signal as an excitation source of an eddy current probe, and driving the eddy current probe to carry out nondestructive testing. According to the invention, the excitation signal which gives consideration to high-frequency signal generation, deep harmonic suppression and digital adaptive adjustment can be generated.

The invention relates to the technical field of radio frequency integrated circuits, in particular to a harmonic suppression power amplifier combining a matching network and a feed network, which comprises a transistor, an input matching module, an output matching module, a stabilizing module and a bias module, the input matching module comprises a first parallel resonance unit, the first parallel resonance unit is used for second harmonic suppression, the output matching module comprises a series resonance unit and a second parallel resonance unit, the series resonance unit is used for resonating at a second harmonic frequency and performing low-impedance grounding on the second harmonic, and the second parallel resonance unit is used for resonating at a second harmonic frequency and performing low-impedance grounding on the second harmonic. The second parallel resonance unit is used for resonating at a third harmonic frequency and forms a high-impedance open circuit for the third harmonic, the output matching module is coupled to a drain electrode of the transistor, and the bias module comprises a grid bias sub-module and a drain bias sub-module. The grid bias sub-module is coupled to a connection node of the input matching module and the grid of the transistor, the drain bias sub-module is coupled to the output matching module, and the bias voltage of the transistor is jointly determined by the grid bias sub-module and the drain bias sub-module. The power amplifier has the effect of improving the efficiency level of the power amplifier while realizing harmonic suppression optimization.

The invention discloses a high-speed power supply conversion control method, which relates to the technical field of power supply conversion control, and comprises the following steps of: synchronously acquiring transient voltage waveforms and transient current waveforms at two ends of a power device in each pulse width modulation period through an analog-to-digital conversion module; and constructing a high-frequency waveform data frame containing a plurality of modulation periods based on a fixed time sliding window mechanism. According to the invention, through frequency domain monitoring and frequency spectrum characteristic quantitative analysis, a resonance response index is output, and a closed-loop mechanism from high-frequency waveform sensing to risk early warning is realized; the PWM dominant frequency and harmonic distribution are dynamically adjusted in combination with a digital controller, a frequency modulation avoidance and harmonic suppression cooperative control strategy is constructed, the adaptive capacity, stability and electromagnetic compatibility of the system when dealing with parasitic resonance interference are remarkably improved, and the method has outstanding engineering practicability and technical innovation.

The invention discloses a broadband power amplifier with an output reconfigurable network, and relates to the technical field of microelectronics, the broadband power amplifier with the output reconfigurable network adopts a three-stage amplification circuit with a gate width ratio of 1: 2: 8, and signal pre-amplification and gain improvement are realized through the first two stages of amplifiers; the last-stage eight-tracheid parallel structure outputs saturated power under high-voltage power supply and realizes power additional efficiency; the output reconfigurable network is controlled by a first switch and a second switch, the first switch is turned off and the second switch is turned on in a high-power mode, so that a compensation microstrip line is grounded to form a fundamental wave matching branch knot, the loss of a harmonic suppression network is avoided, and high-efficiency output is guaranteed; in a low-power mode, the first switch is switched on, the second switch is switched off, the first LC resonance unit and the second LC resonance unit jointly form a band-stop filtering network, secondary and third harmonic impedance is adjusted to be in a near-short-circuit state, so that generation of higher harmonics is restrained, phase distortion is offset through the compensation microstrip line, and the integrity of fundamental wave signals is maintained.

The invention relates to a harmonic suppression and dynamic voltage compensation method based on a composite control series filter, and belongs to the field of power electronic technology and electric energy quality control. Harmonic current passing through a primary winding of a transformer and a sudden rising or falling signal of power supply voltage are extracted, and after the two signals are controlled and combined into a reference signal, a voltage source inverter (VSI) connected with a secondary side of the transformer in parallel shows a controllable voltage characteristic. The control parameters of the harmonic current can enable the transformer to present relatively large controllable impedance to harmonic waves, so that harmonic wave isolation is realized. In addition, the VSI compensates for the system voltage deviation by detecting the voltage drop. And finally, establishing a simulation model to verify that the series active power filter based on the control strategy can isolate harmonic waves and effectively compensate voltage deviation. Harmonic suppression and dynamic voltage compensation functions can be realized at the same time, and the power quality of a middle-high voltage system is improved.

The invention discloses a Si / SiC topological parallel inverter harmonic suppression method based on multi-harmonic observation and feed-forward compensation, and relates to the technical field of power electronics, and the method comprises the steps: monitoring each harmonic signal outputted by a Si IGBT inverter in a Si / SiC topological parallel inverter in real time, and determining the amplitude and phase of each harmonic signal; the Si / SiC topological parallel inverter is of a structure in which a Si IGBT (Insulated Gate Bipolar Translator) inverter and a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) inverter are connected in parallel Generating an adjusted current compensation signal based on a gain scheduling mechanism according to the amplitude and the phase; the adjusted current compensation signal is a current compensation signal which is equal in amplitude and opposite to a harmonic signal of the SiC MOSFET inverter; according to the invention, the harmonic suppression capability and the electric energy quality can be improved, and the method is suitable for a high-power electric power system and an application occasion with strict requirements on the electric energy quality.

The invention belongs to but not limited to the technical field of wireless energy transmission and electromagnetic energy collection, and particularly relates to a simple and compact ultra-wideband rectifying circuit and a design method thereof. Comprising a top-layer microstrip structure, a middle dielectric substrate and a bottom-layer metal floor, the top-layer microstrip structure and the bottom-layer metal floor are respectively positioned on the upper surface and the lower surface of the middle dielectric substrate; the top microstrip structure comprises a radio frequency input port, a broadband impedance matching network, a direct current blocking and passing capacitor, a diode topological structure, a harmonic suppression and harmonic recovery network and a direct current output port; the two diodes in the diode topology are directly connected with the direct current filter capacitor, so that the load impedance is effectively compressed, the harmonic suppression and harmonic recovery functions are realized, and the working frequency range of the rectification circuit is widened; according to the ultra-wideband rectification circuit, ultra-wideband impedance matching is realized through a section of short conical gradient transmission line, the design process of the rectification circuit is effectively simplified, and meanwhile, the ultra-wideband rectification circuit with a compact structure is realized.

The invention discloses a filtering class F power amplifier based on a multimode resonator. The problems of large size and low efficiency caused by common design of a filter and an amplifier are mainly solved. The system comprises an input matching network, a grid electrode direct current feed network, a drain electrode direct current feed network, a transistor, a harmonic suppression network and a filtering matching network, and the input matching network utilizes a pi-shaped circuit to convert standard impedance of an input port into conjugation of optimal source impedance of the transistor; the grid and drain direct-current feed network isolates radio-frequency signals from entering a direct-current power supply and enables the transistor to work at a proper quiescent working point; the harmonic suppression network shapes the drain voltage and current of the transistor; the filtering matching network can control harmonic impedance and participate in matching, so that the drain electrode of the amplifier can reach the optimal load impedance. According to the invention, the loss generated by device connection is obviously reduced, the advantage of low complexity is shown, and the method is suitable for being applied to communication systems such as base stations and radars.

The invention discloses a radio frequency switch, a radio frequency front-end module and electronic equipment, the radio frequency switch comprises N transistors and at least one harmonic suppression module which are sequentially connected in series, and N is an integer greater than 1. The harmonic suppression module is connected between the two connection electrodes corresponding to the two transistors, and the harmonic suppression module is used for suppressing harmonic signals in the radio frequency signals passing through the radio frequency switch. Wherein the transistors are field effect transistors, and two connection electrodes corresponding to the two transistors are two bulk electrodes or two grid electrodes. According to the invention, the harmonic suppression module is not directly connected to the main radio frequency path (that is, the harmonic suppression module is not directly connected to the source electrode or the drain electrode of the field effect transistor), but is connected between the two body electrodes or the two grid electrodes, and the connection mode can prevent other harmonic signals generated by the harmonic suppression module from influencing the main radio frequency path. Therefore, the radio-frequency signal can be normally transmitted on the main radio-frequency path.

A linear power amplifier output harmonic suppression system inputs a driving signal with amplitude A1, phase and frequency f1 into a linear power amplifier, samples the signal output by the linear power amplifier, calculates the amplitude A1n of nth harmonic in the signal, generates a frequency multiplication signal with amplitude n, phase n and frequency n = nf1 according to the nth harmonic, and inputs the frequency multiplication signal into the linear power amplifier, signals output by the linear power amplifier are sampled, the amplitude A2n of the signals is calculated, and according to the suppression principle that the amplitude of the signals output by the linear power amplifier of the n-order harmonic suppression signals is the same as that of the n-order harmonic of the driving signals, and the phase is opposite to that of the n-order harmonic of the driving signals; the amplitude of the nth harmonic suppression signal is made to be Aharn = An + (A1n-A2n), and the phase of the nth harmonic suppression signal is made to input the driving signal and the nth harmonic suppression signal into the linear power amplifier to offset or attenuate nth harmonics.

Architectures are presented for transmitters and receivers that use a harmonic rejection mixer that uses a 6-phase clock signal, while also using a differential in-phase / quadrature input signal (for the transmitter) or output signal (for the receiver). This results in crosstalk between the in-phase and quadrature components, where a digital correction circuit forms a linear combination of the baseband I / Q signals to generate the I / Q for the mixer in order to obtain the desired baseband signal. By using a differential I / Q signal, only two DACs / ADCs are needed, saving circuitry area and power consumption, while providing strong 2nd, 3rd, and 4th clock harmonic rejection. The clock signal can be composed of two sets of 3-phase signals, each signal having a 33% duty cycle.

The application provides a harmonic suppression circuit of an inductive coupling energy transmission system, which places an auxiliary receiving circuit with a resonance frequency of 3 times, 5 times, 7 times or 2n+1 (n=1, 2, 3…) times of a fundamental frequency on a secondary side, configures a corresponding voltage stabilizing circuit on a direct current voltage output side of the auxiliary receiving circuit, and realizes a self-power supply function of a power utilization device such as a control circuit on the secondary side, and a quality factor Q of the auxiliary receiving circuit is i The harmonic suppression method is simple, does not affect power transmission of a main circuit, and can improve the efficiency of the inductive coupling energy transmission system.

The application relates to a high-voltage power-taking capacitor protection and harmonic suppression system and a circuit thereof, and belongs to the field of power distribution network intelligent control switch power taking. The circuit is arranged between an isolation transformer and a feeder terminal unit (FTU), and comprises an input protection circuit for suppressing input surge overvoltage and fast pulse group, a harmonic filter circuit for filtering out harmonics, a signal acquisition and conditioning circuit for converting an alternating current signal into a direct current voltage signal, and a control protection circuit for comparing the direct current voltage signal with a preset reference voltage. The system further comprises a high-voltage capacitor voltage divider, an isolation transformer and the feeder terminal unit (FTU). The application effectively solves the problem that harmonic interference, surge impact and overvoltage risk coexist in the high-voltage power-taking system, greatly improves the safety and reliability of the operation of the rear-end FTU equipment under the premise of ensuring the accuracy of voltage signal measurement and power supply continuity.

The invention discloses a reactive compensation and harmonic suppression method and device for an underground coal mine mobile substation. The method comprises the following steps: acquiring a working condition signal of load side electric equipment and a voltage signal and a current signal of a wire inlet end of the reactive compensation and harmonic suppression device; based on the voltage signal and the current signal, determining a reactive power gap value of the low-voltage side of the mobile substation and a temperature rise contribution weight of harmonic waves of each preset frequency to a cable of the low-voltage side of the mobile substation; based on the working condition signal, the reactive power gap value and the temperature rise contribution weight, a cooperative control instruction is generated and comprises a switching control instruction for a reactive compensation module in the reactive compensation and harmonic suppression device and a filtering control instruction for a harmonic suppression module in the reactive compensation and harmonic suppression device; and reactive compensation and harmonic suppression are carried out on the low-voltage side of the mobile substation. According to the invention, the accuracy and fineness of reactive compensation and harmonic suppression of the underground coal mine mobile substation are improved, so that the high-quality stable power supply requirement of an underground power grid is met.

This invention discloses a millimeter-wave broadband high harmonic suppression tripler, comprising an input matching network, a time-domain shaping tripler unit, and a differential common-source output stage. The proposed time-domain shaping tripler unit employs transistor pairs with different gate widths and bias voltages to superimpose two sets of voltage signals of different amplitudes in the time domain, thereby enhancing the inherent harmonic suppression of the tripler unit. Furthermore, by connecting a common-mode impedance control in series at the center tap of the primary inductor coil of the output transformer of the tripler unit, the output power of the third harmonic is further improved. The input matching network achieves single-ended to differential conversion, with its primary and secondary coil center taps grounded and open-circuited respectively in a counterintuitive manner, improving differential-mode balance and common-mode stability. Simultaneously, by using a series-coupled inductor, the quality factor of the transistor input impedance is reduced, improving the bandwidth performance of the tripler.

The application discloses a high-efficiency omnidirectional rectenna based on a class-F harmonic suppression structure and belongs to the rectenna field, comprising: a plurality of rectenna units which are arranged at equal intervals and rotate around the same center and are used for receiving radio frequency energy; the rectenna unit comprises a receiving antenna and a rectifier circuit; the receiving antenna comprises an antenna radiation structure, a metal floor and a feed microstrip line; a U-shaped groove is arranged on a region of the antenna radiation structure which is close to the metal floor, and a rectangular groove is arranged in the U-shaped groove; the U-shaped groove and the rectangular groove are used for suppressing the radiation of the second harmonic and the third harmonic; the rectifier circuit is arranged on the upper surface of a PCB and is used for rectifying the output signal of the antenna radiation structure by the microstrip line and electronic components; and the plurality of rectenna units are connected through a direct current synthesis network, so that the size of the rectenna can be reduced and the efficiency of the rectenna can be improved.

The application discloses a micro-grid power quality global optimization method, comprising the following steps: collecting real-time data, dividing the real-time data into several segments according to the frequency, and calculating the harmonic compensation capacity of each frequency segment according to the real-time data; according to the calculated harmonic compensation capacity, priority allocation is performed on the compensation order of the contaminated nodes in the micro-grid; the virtual impedance of the inverter and the injected damping resistance are adjusted, and the harmonic current and resonance phenomenon in the micro-grid are suppressed in the frequency segment; according to the adjusted virtual impedance and damping resistance, the node admittance matrix is updated, the compensation capacity of the inverter is monitored in real time, the real-time monitoring data is compared with the threshold value, if the threshold value is exceeded, the inverter is corrected, otherwise, no change is made. Through the frequency segment control, the pertinence and effect of harmonic suppression are improved, the frequency segment suppression of the micro-grid harmonic and high-frequency resonance is realized, the residual capacity of the inverter is dynamically matched with the harmonic compensation demand, and the safe and stable operation of the system is ensured.

The application discloses a kind of ultra-wideband high harmonic suppression power amplifier, including low-frequency power amplification branch, high-frequency power amplification branch, harmonic suppression matching network, the harmonic suppression matching network includes low-frequency harmonic suppression matching network, high-frequency harmonic suppression matching network and common output end;The low-frequency power amplification branch, high-frequency power amplification branch respectively to the frequency different low-frequency band signal, high-frequency band signal in work wideband is carried out power amplification, the low-frequency harmonic suppression matching network, high-frequency harmonic suppression matching network respectively to the impedance matching of fundamental wave in low-frequency band signal, high-frequency band signal after power amplification, while inhibiting second and third harmonic signals.The application solves the problem of low power efficiency and poor high-order harmonic suppression in the prior art.

The invention discloses a frequency quadrupler circuit, and belongs to the technical field of integrated circuits. The circuit comprises a first frequency multiplication stage and a second frequency multiplication stage which are cascaded. The core improvement is that the control ends of the third transistor and the fourth transistor in the second frequency multiplication stage are directly and electrically connected to the output nodes of the first transistor and the second transistor in the first frequency multiplication stage respectively. According to the connection mode, secondary harmonic signals which are naturally generated at two output nodes of the first-stage push-pull structure and are matched in amplitude and opposite in phase are directly used as differential input of the second stage, and therefore a necessary inter-stage transformer in the prior art is thoroughly omitted. The interstage transformer effectively solves the problems that in a traditional scheme, an interstage transformer is difficult to achieve at low frequency, the size is large, and the phase performance of differential signals is prone to being deteriorated, and has the advantages of being simplified in structure, reduced in size and better in output power and harmonic suppression performance.

Disclosed in the present invention is a high‑linearity, high‑power GaAs HBT power amplifier having a power detection function, characterized in that: the GaAs HBT power amplifier comprises a radio frequency path, a bias module and a power detection circuit. The radio frequency path is used to perform power amplification on a radio frequency signal, a negative feedback network is used to improve the stability and expand the bandwidth, and second harmonic suppression improves the overall linearity. The bias circuit is used to provide, to a three-stage amplification circuit, a bias voltage that dynamically changes along with an input power, so as to solve the problems of linearity degradation and current instability caused by a self-heating effect in a GaAs HBT transistor under high-power input, thereby mitigating amplitude-amplitude distortion and amplitude-phase distortion of the power amplifier. The power detection circuit is used to output a direct current voltage that is positively correlated with an output power, so as to achieve accurate control of the output power of the power amplifier. By fully integrating negative feedback, dynamic biasing and harmonic suppression techniques, the present invention effectively improves the overall linearity of the amplifier.

The invention provides a method for suppressing harmonic waves of an echo path. The method comprises the following steps: S1, acquiring an audio signal and processing the audio signal; s2, performing frequency domain conversion to extract amplitude, including reading near-end and far-end voices, and framing and windowing the voices; fourier transform is carried out on each frame, and voice amplitude information is extracted; s3, fundamental waves and harmonic waves are extracted and calibrated, specifically, peak detection is conducted on the near-end amplitude and the far-end amplitude, and an amplitude frequency band meeting the height is returned; determining a fundamental wave frequency band from the far-end frequency bands; determining a harmonic frequency band from the near-end frequency bands; converting the harmonic amplitude into a decibel value; storing the fundamental wave, the corresponding harmonic wave and the corresponding decibel value in a calibration file; s4, harmonic suppression processing; s5, reconstructing the audio signal, including Fourier inversion, and converting a frequency domain into a time domain; and storing each frame of data. According to the method, fundamental wave and harmonic wave frequency bands are determined by analyzing far-end and near-end voice amplitude information, so that calibration is carried out, and finally harmonic waves in an echo path are suppressed to achieve an echo cancellation effect.

This invention provides a miniaturized, on-chip, internally matched power amplifier device with high harmonic suppression, belonging to the field of harmonic suppression amplifier technology. By introducing a cascaded design of multi-stage power amplifiers, combined with internal matching technology and the innovative application of high-dielectric ceramics and molybdenum-copper carriers, this invention successfully solves problems related to gain enhancement, harmonic suppression, and thermal management. This solution achieves miniaturization while simultaneously improving power density and gain, enhancing harmonic suppression performance to -45dBc, and optimizing efficiency. Furthermore, the combination of a molybdenum-copper carrier and a conformal heat dissipation module effectively reduces thermal resistance, extends device lifespan, and meets stringent high-temperature and high-frequency environmental requirements, improving system reliability and efficiency while reducing device size and weight.

The application discloses a current multiplexing phase-shifting mixer with high harmonic suppression ratio IN The I and Q two groups of differential signals generated by the quadrature generating unit are input into the I-path high harmonic suppression ratio phase-shifting mixing unit and the Q-path high harmonic suppression ratio phase-shifting mixing unit respectively, mixed with the differential local oscillator signal in the local oscillator signal and the control signal of the time sequence control unit, and phase-shifting is realized to generate the I and Q two paths of differential intermediate frequency signals; the positive terminal in the I-path differential intermediate frequency signal and the positive terminal in the Q-path differential intermediate frequency signal are input into the same load to generate an intermediate frequency positive output signal; the negative terminal in the I-path differential intermediate frequency signal and the negative terminal in the Q-path differential intermediate frequency signal are input into the same load to generate an intermediate frequency negative output signal; and the intermediate frequency positive output signal and the intermediate frequency negative output signal jointly constitute an intermediate frequency differential output signal. The application has the advantages of simple and compact structure, improved phase-shifting precision of the system, realized mixing, and reduced power consumption of the system.

The present invention discloses a harmonic suppression method based on virtual impedance collaborative control, which relates to the field of power grid harmonic control technology and is used to solve the technical problems of strong time-varying harmonics, high energy consumption, and parameter fixation in high-penetration photovoltaic scenarios. The method comprises: obtaining the original electrical signal, impedance parameters, and filtering parameters on the grid side; performing real-time phase correction based on the original electrical signal to obtain multi-band harmonic frequencies; constructing a virtual impedance based on the multi-band harmonic frequencies, and generating an impedance characteristic matrix based on the impedance parameters and filtering parameters; using the impedance characteristic matrix to perform parameter optimization of the virtual impedance based on deep reinforcement learning to obtain the optimal virtual impedance parameters; and changing the equivalent output impedance of the inverter through the virtual impedance under the optimal virtual impedance parameters to achieve harmonic suppression.

The invention provides a miniaturized slide-type internal matching power amplification device with high harmonic suppression, relates to the technical field of harmonic suppression amplifiers, and provides a miniaturized slide-type internal matching power amplification device with high harmonic suppression by introducing a cascade design of a multi-stage power amplifier and combining an internal matching technology and innovative application of high-dielectric ceramic and molybdenum copper slide. The problems of gain improvement, harmonic suppression, thermal management and the like are successfully solved. According to the scheme, the miniaturized design is realized, the power density and the gain are also improved, the harmonic suppression performance is improved to-45dBc, and the efficiency is also optimized. Meanwhile, the molybdenum copper slide glass is combined with the conformal heat dissipation module, so that the thermal resistance can be effectively reduced, the service life of the device is prolonged, the strict high-temperature and high-frequency environment requirements are met, the reliability and the working efficiency of the system are improved, and the size and the weight of equipment are reduced.

The invention discloses a 690V low-voltage equipment load harmonic suppression system suitable for an LNG station, and relates to the technical field of electric energy quality governance, and the system comprises a comprehensive management center which is in communication connection with the following modules: a power grid state sensing modeling module which is used for monitoring power grid impedance, background harmonic waves and load working conditions, a dynamic grid model is constructed to output a grid state covering impedance, harmonic order, and load power. According to the invention, multiple sensors and monitoring devices are integrated, multi-source data of 690V bus harmonic frequency spectrum, impedance parameters and equipment operation states are collected in real time, errors are eliminated by utilizing multi-source data fusion, a dynamic power grid model is constructed, power grid impedance, background harmonic waves and load working conditions are accurately monitored, potential problems can be found in advance, and the power grid reliability is improved. And a basis is provided for harmonic suppression, and stable operation of the 690V low-voltage equipment of the LNG field station in a complex power grid environment is guaranteed.

The invention discloses a continuous load modulation balanced power amplifier based on a harmonic suppression coupler, equipment and a method. The amplifier comprises a power divider, a power divider and a harmonic suppression coupler, the first branch comprises a first input matching network, a first transistor and a first output matching network in sequence; the balance branch comprises a phase compensation line, a front matching network, an input end 3dB directional orthogonal coupler, a second branch, a third branch and an output end 3dB directional orthogonal coupler, and the second branch comprises a second input matching network, a second transistor and a second output matching network which are connected in sequence; the third branch comprises a third input matching network, a third transistor and a third output matching network which are connected in sequence; and post-matching the network. According to the continuous load modulation balanced power amplifier, the design of continuous mode impedance of the continuous load modulation balanced power amplifier and the improvement of the overall drain efficiency are realized by adopting the harmonic suppression coupler, so that the full working frequency band can work efficiently, and the design of a corresponding matching network is simplified.

The invention relates to an open-loop modulation transmitter with a harmonic suppression switched capacitor power amplifier. The transmitter comprises a sixteen-phase delay locked loop, a binary frequency shift keying modulator and the harmonic suppression switched capacitor power amplifier. The sixteen-phase delay locked loop provides sixteen paths of clock signals with equal phase difference to the binary frequency shift keying modulator, and the sixteen paths of clock signals are used as input signals of the binary frequency shift keying modulator; the binary frequency shift keying modulator is connected with the harmonic suppression switched capacitor power amplifier and provides a modulation signal for the harmonic suppression switched capacitor power amplifier; and the harmonic suppression switched capacitor power amplifier is used for amplifying the modulation signal and suppressing a harmonic component so as to output the modulation signal after harmonic suppression. According to the invention, high data rate transmission can be supported, the higher harmonic suppression capability is provided, the design requirement of a matching network can be relaxed while the frequency spectrum purity is ensured, the chip area is reduced, and the system cost is reduced.