528 results about "Harmonic rejection" patented technology

A radio frequency (RF) demodulation circuit comprising a harmonic rejection mixing stage capable of receiving and mixing an incoming radio frequency (RF) signal having a frequency RF and a reference local oscillator (LO) signal having a frequency LO and generating an output signal in which out-of-band harmonic signals are suppressed. The harmonic rejection mixing stage comprises 1) a multiphase local oscillator (LO) generator for receiving the reference LO signal and generating M phase-shifted local oscillator signals having frequencies LO and 2) M mixers, each of the M mixers receiving the incoming radio frequency signal and one of the M phase-shifted local oscillator signals. Each of the M mixers generates a subcomponent signal. The subcomponent signals are then scaled and combined to produce the output signal.

Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

The invention relates to a single-phase universal electric energy quality controller for power supply for electrified railways, and belongs to the technical field of flexible AC power transmission and distribution; the invention comprises a single-phase multi-coil transformer composed of a primary coil and n secondary coils, so that the secondary coils of the transformer can be connected in parallel with n voltage sources of current transformers; n capacitors are connected with n voltage source current transformers, so as to form a single-phase chain-type H-bridge current transformer with n chains; the AC terminal of the H-bridge current transformer is directly connected with the traction grid through a reactor. The invention has the functions of active power control, reactive power compensation and harmonic compensation, so as to resolve three-phase voltage unbalance, voltage fluctuation, low power factor and harmonic pollution and so on that exist in ER traction transformer stations, effectively lower the capacity of traction transformers, increase ER transport capacity and transportation capability. Moreover, the invention is characterized in small occupied area, little loss and low cost, in order to gain perfect harmonic suppression characteristics and dynamic response features, and provide convenience in industrial production and improve device reliability.

A circuit for frequency translating a radio frequency signal comprises a plurality of mixer stages, each stage associated with a particular range of frequencies of a radio frequency signal. The circuit further comprises a switching circuit that communicates the radio frequency signal to a selected one of the plurality of mixer stages in response to a control signal. The selected mixer stage comprises a phase generation circuit that generates a plurality of phase signals, and at least one mixer that combines the radio frequency signal with one of the plurality of phase signals to generate at least a portion of an intermediate frequency signal.

An AC to DC converter with harmonic suppression is provided. The harmonic suppression is provided by forcing an instantaneous current conflict between series connected rectifier bridges 54, 80, such that a voltage waveform at 6 times the AC supply frequency of the AC supply is automatically generated. This waveform is then injected via a injection circuit to give harmonic cancellation.

An electronic assembly includes a substrate (66), a balun transformer (42) formed on the substrate (66) and including a first winding (50) and a second winding (52), each having respective first and second ends, and a reaction circuit component (48) formed on the substrate (66) and electrically coupled to the second winding (52) between the first and second ends thereof. The balun transformer (42) and the reaction circuit component (48) jointly form a harmonically suppressed balun transformer having a fundamental frequency, and the reaction circuit component (48) is tuned such that the harmonically suppressed balun transformer resonates at a selected harmonic of the fundamental frequency.

The present invention discloses a harmonic rejection load pull tuner. The tuner of the invention has a large-band tuner having an input and an output, and a transmission line having a longitudinal axis. The transmission line has an input connected to the output of a DUT and an output connected to the input of the large-band tuner. In parallel with the transmission line is at least one stub, the at least one stub having a length adapted to reflect out an nth order harmonic of a base frequency, where n is an integer greater than 1. The tuner of the present invention can be used to perform input or output characterisation (or both) of a DUT, by selectively reflecting out at least one harmonic frequency of the base frequency. Consequently, the characterisation of the DUT is improved, since the effects of the harmonics are considerably reduced. The present invention also concerns a method for performing input or output characterisation.

An active type harmonic suppression apparatus, connected in parallel to a power feeder, supplies a compensation current for injecting into the power feeder such that a utility current of a power source is approached to a sinusoidal wave. The control circuit retrieves a load current, a utility current, an output current of the power converter, a power source voltage and a voltage of the dc power capacitor for calculating and sending a reference signal of compensation voltage to a pulse-width-modulation circuit which generates switching signals for the power converter. Furthermore, the harmonic suppression apparatus can provide a fixed or variable reactive power.

A harmonic rejection mixer includes a first scaling circuit for scaling an RF signal to generate a plurality of scaled RF signals, a first switching stage for sampling the scaled RF signals using a first plurality of switching signals, and a second mixing stage for mixing the sampled RF signals with a second plurality of switching signals to generate a plurality of frequency translated signals having different phases. A combiner adds the frequency translated signals together to generate a first plurality of baseband versions of the RF signal. A first amplifier stage processes the first plurality of baseband versions to generate a second plurality of baseband versions. The mixer further includes a second scaling circuit for scaling the second plurality of baseband versions and a second amplifier stage to generate an in-phase baseband signal and a quadrature baseband signal from the scaled second plurality of baseband versions.

A current control unit takes a deviation between a current command value and a current flowing through an inverter of a power conversion device, and controls the inverter based on the deviation. A harmonic sensing part receives input of an output current of an AC filter, and outputs a predetermined order harmonic of the input current in a direct current value form. A disturbance observer estimates the disturbance of the harmonic based on the output current and a coefficient defined as an inverse function of a transfer function from harmonic suppression current command value to filter output current detection value. A harmonic suppression control unit takes the deviation between the estimated harmonic disturbance and a disturbance command value that suppresses the disturbance, and calculates a harmonic suppression current command value. The harmonic suppression current command value is superimposed on the current command value of the current control unit.

Even harmonics are suppressed by a harmonics-reducing bias generator that drives bias voltages to cascode control transistors in series with driver transistors in a power amplifier. A first bias voltage is generated by mirroring pull-up currents in the power amplifier. A p-channel source transistor and a p-channel cascode current-mirror transistor also mirror the power amplifier pull-up current to a midpoint node. An n-channel sink transistor and an n-channel cascode current-mirror transistor mirror the pull-down current in the power amplifier to the midpoint node. An op amp compares the midpoint node to VDD/2, and drives the gate of a p-channel feedback transistor. Current from the p-channel feedback transistor flows through an n-channel cascode current-mirror transistor that generates a second bias voltage. The second bias voltage is adjusted until the midpoint node reaches VDD/2, causing the pull-up and pull-down currents in the power amplifier to better match, reducing even harmonics.

The present invention relates to a mixer circuit and method of frequency transformation, wherein an input signal is switched in accordance with a first local oscillator signal and in accordance with at least one second local oscillator signal having a smaller duty cycle than said first local oscillator signal, or having a respective predetermined phase shift with respect to said first local oscillator signal. Output signals obtained by the switching in accordance with the first and at least one second local oscillator signals are summed and the polarity of one of said first local oscillator signal and said at least one second local oscillator signal is switched in response to a control input, to thereby switch between a harmonic-rejection mode and a sub-harmonic mixing mode.

A single chip GSM/EDGE transceiver comprises a fully differential receive chain, a subharmonic mixer in the receive chain, the subharmonic mixer configured to receive a radio frequency (RF) input signal and a local oscillator (LO) signal that is phase-shifted by a nominal 45 degrees, and a synthesizer having a voltage controlled oscillator and having at least one frequency divider to generate desired transmit and receive LO signals. The transceiver also comprises a transmitter having a closed power control loop, and a harmonic rejection modulator, the use thereof made possible by a frequency plan designed to allow the synthesizer to develop the transmit and receive LO signals without a frequency multiplier.

The invention discloses a millimeter-wave frequency multiplier and cascaded frequency multipliers, belonging to the technical field of radio frequency/millimeter wave integrated circuits. The frequency multiplier provided by the invention comprises a pseudo-differential amplifier, an LC parallel resonator cavity and an LC series resonator cavity, wherein the LC parallel resonator cavity is connected between the output end of the pseudo-differential amplifier and a power supply VDD (Voltage Drain Drain), the LC series resonator cavity is connected between the output end of the pseudo-differential amplifier and a ground wire, both input ends of the pseudo-differential amplifier are respectively connected with the positive end and the positive end of an input baseband signal (f0); and the LCparallel resonator cavity has the resonation frequency of 2f0, and the LC series resonator cavity has the resonation frequency of 4f0. The cascaded frequency multipliers provided by the invention comprise a plurality of the frequency multipliers which are sequentially connected through a single-to-double passive transformer. The millimeter-wave frequency multiplier and the cascaded frequency multipliers, provided by the invention, have the advantages of low power consumption, pure frequency spectrum of a frequency-multiplication output signal, good harmonic suppression performance, strong output signal, high frequency and easiness for single-chip integration on a silica-based process.

The invention discloses a method for improving efficiency of a wide-band radio frequency power amplifier, namely adding a harmonic source suppression network in output of the wide-band radio frequency power amplifier for improving efficiency. The invention also discloses a circuit structure for improving the efficiency of the wide-band radio frequency power amplifier. The circuit structure disclosed by the invention comprises a wide-band radio frequency power amplifier stage, a wide-band output matching network and a harmonic suppression network, wherein the wide-band output matching network is used for effectively outputting an output signal; the harmonic suppression network is used for carrying out harmonic suppression on a signal input into the wide-band output matching network, and the harmonic suppression network is formed by at least two second harmonic suppression networks which are connected between output of the wide-band radio frequency power amplifier stage and the ground in parallel. The method and the structure for improving the efficiency of the wide-band radio frequency power amplifier have the advantages that a second harmonic suppression circuit is adopted for being independent from an output matching network, a resonant frequency point can be flexibly controlled, second harmonic is effectively suppressed, efficiency and output capability of the power amplifier are improved, and wide-band matching is formed, so that the radio frequency power amplifier can operate in a wide range, and performances of the radio frequency power amplifier are improved.

A harmonic rejection load pull tuner uses a resonant pre-matching module in order to enhance the reflection factor (tuning range) at the fundamental frequency without affecting the tuning range at the harmonic frequencies. The insertion loss of the harmonic tuner itself, if such a pre-matching module is not used, reduces the tuning range, generated by a wideband tuner at the fundamental frequency, connected after the harmonic tuner. In order to re-establish and increase the tuning range of the fundamental tuner a resonant pre-matching module is used, which increases the tuning range at the fundamental frequency and has no effect on the harmonic impedances. A wideband pre-matching module is not useful, since while it increases the tuning range at the fundamental frequency, it limits the tuning range at the harmonic frequencies.

The embodiment of the invention provides a PWM (Pulse-Width Modulation) rectifier controlling method and a PWM rectifier. The PWM rectifier controlling method is a passivity control method based on repeated control and compensation, and comprises the following steps: a control law of the PWM rectifier based on the interconnection and damping configuration of port controlled dissipation Hamilton models is obtained with a Lagrange-Charpy integral method; and a composite controller including repeated control and passive control is used as a controller of the PWM rectifier, and the passive control is compensated by the repeated control according to the control law so as to suppress periodic interference. According to the embodiment of the invention, PWM rectification of a unit power factor can be realized, and at the same time the harmonic interference of a power grid is better suppressed under the condition of not detecting load harmonic current so as to improve power quality. Compared with the conventional PWM rectifier, the PWM rectifier disclosed by the invention has the functions of harmonic suppression and reactive compensation under the condition of not increasing hardware cost.