11 results about "Transceiver architecture" patented technology

Scalable multi-band wavelength division multiplexing (WDM) transceiver architectures suitable for high-bandwidth optical Compute interconnects (OCI) between computing resources. The WDM wavelength range is divided into two or more color / wavelength bands. Each band of WDM optical signals may be coupled through separate semiconductor optical amplifiers (SOAs) that are tuned to the different bands. The bands may be conveyed through an optical MUX / DeMUX for transmission through an optical fiber. The optical MUX / DeMUX may comprise a band MUX / DeMUX or a polarization MUX / DeMUX.

Optical transceiver architecture utilizing micro-ring modulators and micro-ring resonators configured to route resonant wavelengths of light injected into each micro-ring resonator's input port and through port to that micro-ring resonator's drop port and add port, respectively. The micro-ring resonators drop two distinct streams of data modulated onto the same optical wavelength, or two wavelengths separated by an integer number of free spectral ranges coupled into the micro-ring resonators in two different directions.

Scalable multi-band wavelength division multiplexing (WDM) transceiver architectures suitable for high-bandwidth optical Compute interconnects (OCI) between computing resources. The WDM wavelength range is divided into two or more color / wavelength bands. Each band of WDM optical signals may be coupled through separate semiconductor optical amplifiers (SOAs) that are tuned to the different bands. The bands may be conveyed through an optical MUX / DeMUX for transmission through an optical fiber. The optical MUX / DeMUX may comprise a band MUX / DeMUX or a polarization MUX / DeMUX.

Methods, systems, and devices for wireless communication are described. The transmitting device may filter the data tones (e.g., in an edge sub-band of the allocated frequency band) to enable time domain windowing or shaping. Data tones of edge sub-bands of a configuration frequency band may be filtered to shape the waveform such that it does not extend beyond symbol boundaries (e.g., does not cause transmit leakage). In some examples, a transmitter may provide an indication of a sub-band frequency domain shaping filter for a receiver to support receiver-side demodulation. In some examples, a transmitter may indicate a demodulation reference signal (DMRS) comb structure (e.g., of an edge subband) to a receiver, and the receiver may determine or estimate a subband frequency domain shaped filter based on the comb structure or the indication of the filter.

The application discloses a kind of based on equal amplitude threshold and time interval isomorphic mapping's no synchronization signal processing system, belong to signal processing and communication technical field.The application adopts unified linear equal amplitude threshold rule, defines equal threshold asynchronous ADC and equal threshold asynchronous DAC as the core device at both ends of transceiver, with the time interval ratio of adjacent threshold crossing event as core information carrier;Each configuration independent local reference clock unit at both ends of transceiver, without performing any clock synchronization operation.The application defines effective signal and noise boundary by the effective time interval threshold that can be dynamically adjusted, has physical layer original optimal processing capability for exponential signal;While realizing four big technical advantages of transceiver architecture homologous, no clock synchronization, natural anti-linear interference, automatic adaptation multi-rate signal, greatly reduce system hardware design complexity and operating power consumption, facilitate large-scale chip integration, applicable to various low-power signal processing and wireless communication application scenarios.

A wireless device operates in a first mode by configuring a cross-switch to establish a first signal path from a Frequency Range 3 (FR3) antenna element to a transceiver through a shared interconnect. The wireless device operates in a second mode by configuring the cross-switch to establish a second signal path from a Frequency Range 2 (FR2) module to the transceiver through the shared interconnect. The FR2 module outputs FR2 intermediate frequency (IF) signals. The wireless device transmits and receives signals through the shared interconnect in a non-concurrent manner between the first mode and the second mode.

A scalable multiband wavelength division multiplexing (WDM) transceiver architecture suitable for high bandwidth optical computing interconnect (OCI) between computing resources. The WDM wavelength range is divided into two or more color / wavelength bands. Each band of the WDM optical signal may be coupled by separate semiconductor optical amplifiers (SOAs) that are tuned to different bands. The wavebands may be transmitted over an optical MUX / DeMUX for transmission over an optical fiber. The optical MUX / DeMUX may include a band MUX / DeMUX or a polarization MUX / DeMUX.

A digital pre-processing chip comprises an analog interface for transmitting and receiving analog signals to and from a plurality of analog Radio Frequency (RF) chips, and a digital interface for transmitting and receiving digital signals to and from a baseband chip. The digital pre-processing chip further comprises a plurality of Analog-to-Digital Converters (ADCs) for converting a plurality of analog signals received via the analog interface to a plurality of RX digital signals, and a plurality of Digital-to-Analog Converters (DACs) for converting a plurality of TX digital signals to a plurality of analog signals to be transmitted to the plurality of analog RF chips via the analog interface. The digital pre-processing chip further comprises pre-processing circuitry configured to pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface.

The utility model discloses a kind of radio frequency transceiving architecture and navigation equipment, it is related to radio frequency communication technical field, including array antenna module, radio frequency front-end Sip chip, transceiver chip and anti-interference baseband;Array antenna module is used to receive satellite navigation signal;Radio frequency front-end Sip chip integration finite amplifier, low-noise amplifier and acoustic surface filter, for processing satellite navigation signal to obtain pre-processing radio frequency signal;Transceiver chip integration has down-conversion module and up-conversion module;Down-conversion module converts pre-processing radio frequency signal into intermediate frequency signal;Anti-interference baseband is output to up-conversion module after intermediate frequency signal is handled by anti-interference algorithm;Up-conversion module converts intermediate frequency signal into radio frequency navigation signal and is output to navigation receiver.This scheme can solve the technical problems of numerous component models, high equipment cost, not conducive to miniaturization and light weight, high power consumption of existing navigation anti-interference equipment transceiving architecture.

The application relates to the technical field of measurement and provides a test system and method based on optical link simulation. The test system comprises a test signal generator, a laser driver chip, a laser array, an optical device coupling structure, a photodetector array and a transimpedance amplifier array. The system and method restore the real application scene of the optical link as much as possible based on the optical link simulation, do not require a complex signal input link or a complex signal processing device, support precise tests of bit error rate, sensitivity, system performance and the like, support test requirements of a pluggable optical transceiver architecture and a linear pluggable optical module, and greatly shorten a test period and improve test efficiency.

Embodiments of the present technology provide transceivers intelligently designed to reduce voltage kickback and I / O pad capacitance. A transceiver of the present technology can reduce voltage kickback by dynamically tracking I / O pad voltage at gate terminals of reference voltage signal-receiving MOS devices of a voltage mode cascoded driver implemented in the transceiver. By tracking I / O pad voltage, embodiments can reduce / avoid rapidly changing voltage differentials across the reference voltage signal-receiving MOS devices—thereby reducing voltage kickback. By reducing voltage kickback, embodiments can maintain reliability and improve performance for the transceiver. Tracking I / O pad voltage at the gate terminals of the reference voltage signal-receiving MOS devices can also reduce I / O pad capacitance of the transceiver—thereby improving performance for the transceiver.