85 results about "Transceiver chip" patented technology

This disclosure provides an optical interconnect module, an optical interconnect device, and a computing system. The optical interconnect module includes a photonic integrated circuit chip and a transceiver chip. The photonic integrated circuit chip includes a first optical switching section and a second optical switching section. The first optical switching section includes a plurality of first optical switching input ports, a plurality of first optical switching output ports, a plurality of second optical switching output ports, and a plurality of third optical switching output ports. An optical signal input from each first optical switching input port is selectively output from a corresponding one of the plurality of first optical switching output ports, a corresponding one of the plurality of second optical switching output ports, or a corresponding one of the plurality of third optical switching output ports. The second optical switching section includes a plurality of second optical switching input ports and a plurality of fourth optical switching output ports, each of the plurality of second optical switching input ports being connected to a corresponding one of the plurality of first optical switching output ports.

An optical fiber array assembly, a signal receiving structure and an optical module. The optical fiber array assembly comprises an optical fiber array module (1) and a lens module (2) adapted to the optical fiber array module (1), wherein the optical fiber array module (1) comprises a base (11) and at least two optical fibers (14) arranged in an array on one side of the base (11), an end part of each optical fiber (14) is formed as a bevel (141), the lens module (2) is arranged on the other side of the base (11) and corresponds to the end parts of the optical fibers (14), optical signals transmitted by the optical fibers (14) are reflected into the base (11) via the bevels (141), the optical signals pass through the base (11) and then are emitted into the lens module (2), and the lens module (2) is used for converging the optical signals on a transceiver chip (4). On the one hand, a light spot of a smaller size can be obtained, such that not only high coupling efficiency is achieved, but also a position window of the optical fiber array module in which all of channels achieve high coupling efficiency is broader, thereby effectively reducing the process difficulty; on the other hand, the probability of a collision between the optical fiber array module and the transceiver chip is greatly reduced, thereby effectively improving the product yield.

This invention discloses a bidirectional continuous-variable quantum key distribution method and system based on frequency division duplexing in a single-transceiver ring network. The method is based on a monolithically integrated silicon photonics transceiver chip. By pre-setting optical carrier frequency offsets for the forward and reverse links, it isolates the quantum signal from Rayleigh backscattering noise in the fiber in the frequency domain. The transmitting end generates a broadband waveform containing quantum signals and pilot signals, which is transmitted bidirectionally through a single optical fiber. The receiving end uses a laser source from the same chip as the local oscillator for coherent heterodyne detection. A digital signal processing module performs orthogonalization correction, phase recovery, and matched filtering to suppress noise and extract the quantum signal to generate a secure key. This invention solves the problems of inflexible networking, low fiber utilization, and severe scattering noise interference in bidirectional transmission over a single fiber caused by the separation of the transmitting and receiving ends in integrated continuous-variable quantum key distribution systems. It provides a low-cost and highly flexible solution for metropolitan quantum ring networks.

The utility model discloses a direct insertion type radar sensor, which comprises a dielectric substrate, a transceiver chip, a bridge, a set square antenna, a feed port and a plurality of golden finger pins, a plugboard is arranged on one side of the dielectric substrate, the transceiver chip is arranged on the dielectric substrate, the bridge is arranged on the dielectric substrate and is electrically connected with the transceiver chip, and the feed port is arranged on the plugboard. The triangular plate antenna is installed in the dielectric substrate, a feed point is arranged on the triangular plate antenna, the feed port is arranged on the dielectric substrate and electrically connected with the transceiving chip and the feed point, and the plurality of golden finger pins are arranged on the upper surface and the lower surface of the plugboard and electrically connected with the transceiving chip. The triangular antenna is adopted as a signal transmitting and receiving antenna, and due to the structural characteristics of the triangular antenna, the direct-insertion type radar sensor is integrally of a long and thin structure and can easily extend out of a small hole formed in an applied illuminating lamp panel, so that the use performance is not influenced, and meanwhile, light rays of lamp beads on the lamp panel can be prevented from being shielded.

The application discloses a reconfigurable phased array chip and antenna interconnection structure and belongs to the technical field of phased array antenna interconnection.The application comprises a plurality of phased array transceiver chips, a plurality of antenna units, a reconfigurable radio frequency switch matrix, a control unit and a storage unit.The reconfigurable radio frequency switch matrix is connected between the chips and the antenna units, comprises a plurality of independently controllable radio frequency switch nodes, realizes programmable connection of any transceiver channel to any antenna unit, the control unit dynamically configures the switch matrix according to instructions, and the storage unit stores a configuration table.The application realizes flexible pairing of channels and antennas, improves hardware resource utilization, when individual channels or antennas are faulty, can automatically reconfigure to bypass the faulty units, and the system reliability is improved, can dynamically select optimal antenna subarrays according to beam pointing, and optimizes beam performance.The application is suitable for large-scale phased array systems and can significantly enhance the flexibility and fault tolerance of the system.

The invention discloses a communication circuit and a communication system. The communication circuit comprises a controller, a serial transceiver chip, a signal conversion circuit, a unidirectional conductive circuit, a delay circuit and a bias circuit. The signal conversion circuit outputs an inversion signal of the serial sending pin. And the delay circuit is used for delaying the signal and the inversion signal of the serial sending pin. The rising time of the signal for receiving the enable pin is earlier than the rising time of the signal for transmitting the enable pin, the rising time of the signal for transmitting the enable pin is earlier than the falling time of the signal for transmitting the data input pin, and the falling time of the signal for transmitting the enable pin is later than the rising time of the signal for transmitting the data input pin. The falling time of the signal receiving the enable pin is later than the falling time of the signal transmitting the enable pin. The biasing circuit pulls up the first differential signal pin and pulls down the second differential signal pin. Through the above mode, serial communication can be realized based on the two pins of the controller so as to save I / O resources.

A system includes a base station with one or more antennas; and a processor to beamform or to control a directionality of the antennas in communication with a predetermined target. A mobile device communicates with the base station and has an RF part including RF Transceiver chip, baseband part comprising of DSP and CPU for controlling the data / control messages. ADC / DAC chips are used for interfacing both RF and baseband parts. The other basic cell phone components include touchscreen display, battery, RAM, ROM, RF antenna, MIC, Speaker, camera, and others.

This application discloses a hardware and software co-verification system, method, device, and medium for radio frequency (RF) chip algorithms, relating to the field of RF chip algorithm verification technology. The system includes: a host computer software module for calculating the RF chip algorithm to be verified and generating or processing baseband IQ signals; an RF transceiver chip for generating or processing RF signals; and an FPGA hardware module for communication connections with both the host computer software module and the RF transceiver chip. The FPGA hardware module internally includes a first storage unit and a second storage unit, and is configured with a first communication interface and a second communication interface. The first communication interface is used to establish a serial communication link with the host computer software module via a universal asynchronous transceiver interface, and the second communication interface is used to establish a high-speed data communication link with the RF transceiver chip via a high-speed data interface. The serial communication link is configured to use time-division multiplexing to alternately transmit I and Q data of the RF signal on a single data line.

The invention relates to the field of imaging detection, in particular to a terahertz transmitting-receiving front end based on PCB integration, which comprises an industrial personal computer used for receiving returned data, performing phase compensation optimization on the data in combination with a motion track and realizing terahertz imaging of a to-be-detected sample; the multi-channel terahertz receiving and transmitting array module comprises a terahertz receiving and transmitting array unit used for receiving / transmitting terahertz signals; the array control unit board communicates with the terahertz transceiving array unit; the interconnection and interface board supplies power to the terahertz transceiving array unit and the array control unit board and ensures that the array unit is compatible with external equipment; and the robot structure is used for receiving the control instruction sent by the industrial personal computer and the return information of the mechanical arm and controlling the mechanical arm to operate. The integrated imaging array front end of the terahertz transceiver chip is packaged by the PCB, so that the integrated imaging array front end has obvious volume and cost advantages, and the volume scale and the cost of the system can be effectively reduced.

The invention discloses an optical device riveting jig based on an optical fiber transceiver chip and a control method of the optical device riveting jig based on the optical fiber transceiver chip, and the optical device riveting jig comprises a workbench, a protective cover, a control box, a mounting plate, a feeding mechanism, a riveting mold, a material storage box, a riveting mechanism and a material taking mechanism, the safety protection device is used for safety protection in the riveting operation process. By adopting the multi-station design that the rotary table drives the multiple riveting dies to flow and cooperating with cooperative operation of the feeding mechanism, the riveting mechanism and the material taking mechanism, continuous and automatic machining of the optical device is achieved, the manual intervention link is reduced, the production efficiency is remarkably improved, cooperative control over all functional components is achieved through the control box, and the production efficiency is improved. Flexible setting of machining parameters is supported, machining requirements of optical devices of different specifications can be met, universality is high, the automation degree of the operation process is high, and operation is convenient and fast.

The utility model discloses a kind of optical module test equipment, it is related to optical communication technical field.Optical module test equipment in:first electric test interface is electrically connected with signal transceiver chip;Control chip is electrically connected with optical test device and optical test interface by light testing device;Control chip and signal transceiver chip are electrically connected;Control chip sends first test control signal to signal transceiver chip, and sends second test control signal to optical test device;Optical test device will be converted into second optical signal by first optical signal received through optical test interface, and second optical signal is sent to second to-be-tested optical module by optical test interface;Signal transceiver chip sends test electric signal to first to-be-tested optical module group by first electric test interface;And target electric signal sent by second to-be-tested optical module group is received by first electric test interface.The optical module test equipment provided by the utility model occupies smaller space and area, and failure is easy to troubleshoot, and cost is lower.

The application discloses a processing method and system of a radio frequency signal of a radio frequency transceiver chip, and relates to the technical field of radio frequency communication and microelectronic signal processing, and comprises the following steps: S1, performing a slow sweep frequency operation and applying a thermal disturbance in a waveguide, guiding energy distribution to form a bright-dark fluctuation trajectory through frequency change, and extracting a standing wave shadow line from a continuous bright-dark rhythm to locate an energy gathering area; S2, attaching a tearable micro-absorption layer on a waveguide cavity wall corresponding to the standing wave shadow line, and using the selective adsorption effect of the micro-absorption layer surface on high-frequency energy to form a stable adsorption mark at an energy retention position to establish a drainage anchoring point. The application constructs an energy regulation path of recognition, marking, traction, forwarding and release, disperses the standing wave focal point through periodic micro-disturbance, realizes uniform release of high-frequency energy and dispersion of heat, and significantly improves the stability and service life of the chip.

The invention discloses a distributed multi-parameter sensing system and method combined with an optical transceiving integrated chip, and relates to the field of distributed optical fiber sensing, and the system comprises a temperature control optical transceiving assembly, an arbitrary waveform function generator, an upper computer, a multi-channel data acquisition instrument, an erbium-doped optical fiber amplifier, a circulator and a sensing optical fiber. The temperature control light transmitting-receiving assembly comprises a semiconductor temperature controller and a light transmitting-receiving integrated chip; the optical transceiver integrated chip comprises a tungsten copper substrate, a thin film circuit, an output single-mode fiber, a semiconductor amplifier chip, a semiconductor laser chip, an avalanche photoelectric detector chip, a photon lead waveguide structure and an input single-mode fiber. Through optical transceiver chip integration, a cooperative control structure and a related signal processing algorithm, distributed sensing with compact structure, multi-parameter synchronous decoupling and high precision coexistence is realized.

The invention discloses an MEMS switch high-voltage driving control circuit based on RS485 communication, and belongs to the technical field of micro electro mechanical system driving control. The circuit comprises a power supply unit which is used for converting externally input VCC1 and VCC2 voltages into multipath working voltages; the communication unit adopts an RS485 transceiver chip U13 and is used for receiving an external instruction through an RS485 bus; the control core unit adopts a microcontroller U6 and is used for analyzing the instruction and generating an SPI (Serial Peripheral Interface) driving signal; the high-voltage driving module adopts at least one high-voltage driving chip capable of being cascaded and is used for converting the SPI signals into multiple paths of high-voltage driving signals; and the MEMS switch interface module is used for connecting an external MEMS switch array. Through the integrated design, remote control, large-scale channel expansion and reliable protection of the high-voltage driving circuit are achieved, the problems that in the prior art, a system is complex, the reliability is poor and centralized control is difficult are solved, and the high-voltage driving circuit is particularly suitable for driving a large-scale MEMS switch array.

The utility model belongs to the technical field of embedded computing, and relates to an embedded computing module based on SS928V100, which comprises the SS928V100, an I2C communication device, a synchronous Buck converter, a switching regulator chip, a DC-DC step-down converter, a PCIe switch, an Ethernet transceiver, a USBHUB chip and a step-down switching regulator, the I2C communication device, the synchronous Buck converter, the switching regulator chip, the DC-DC step-down converter, the PCIe switch, the Ethernet transceiver, the USBHUB chip and the step-down switching regulator are all connected with the SS928V100, and the I2C communication device is used for configuring and controlling other I2C devices. The synchronous Buck converter is used for dynamically adjusting output voltage according to the power supply management requirement of the SS928V100, and the switching regulator chip is used for providing stable power supply voltage for the SS928V100. The system is high in integration level, flexible in configuration, efficient in power management and strong in network communication capability, provides a brand new solution for the design of an embedded system, and meets the diversified requirements in a complex application scene.

The application provides a control circuit of a communication transceiver chip and a vehicle driving device. The control circuit comprises a signal generation module generating a control signal based on the running state of an electronic control unit in a vehicle and a power supply control module controlling a power supply loop of the communication transceiver chip. The signal generation module is arranged between the state output end of the electronic control unit and the control end of the power supply control module. The input end of the power supply control module is connected to a power supply. The output end of the power supply control module is connected to the power supply end of the communication transceiver chip. The power supply loop is cut off when the electronic control unit is abnormal. The control circuit provided by the application is provided with the signal generation module and the power supply control module in the electronic control unit and the communication transceiver chip. The signal generation module generates the control signal based on the running state of the electronic control unit. When the electronic control unit is faulty, the power supply of the communication transceiver chip is disconnected through the power supply control module.

The invention relates to the technical field of on-chip self-calibration of chips, in particular to an on-chip self-calibration method and system for a high-disturbance-rejection CAN transceiver chip. The noise level of the environment where the chip is located is monitored in real time; determining an adjustment value of the driving parameter based on the noise level; and the driving parameters are adaptively adjusted according to the adjustment values so as to optimize the signal integrity and the anti-interference capability. The system comprises a noise monitoring module, a parameter calculation module and a parameter adjustment module which are integrated in a chip. The innovation point of the invention lies in that on-chip real-time self-calibration is realized, no external equipment is required to participate, and the signal quality is dynamically optimized in a complex electromagnetic environment in a mode of combining periodicity and event triggering. According to the method, the anti-interference capability and the signal integrity of the CAN bus can be remarkably improved, the communication error rate is effectively reduced, meanwhile, the method has the advantages of low power consumption, fast response, high integration level and the like, and the method is particularly suitable for occasions such as automotive electronics with strict requirements on reliability.

The invention discloses an intelligent electric vehicle charger based on a CAN bus and an automatic switching charging method.The intelligent electric vehicle charger comprises a charger body, the charger body comprises an MCU, a power input end and a charging interface end, the power input end and the charging interface end are connected to the MCU, the charging interface end is provided with a charging power terminal and a CP / PP terminal, a CAN transceiver chip is additionally arranged for the CP / PP terminal, and the CAN transceiver chip is connected with the MCU. The CAN bus communication module is configured to be used for performing CAN bus-based communication with a vehicle; the CAN transceiver chip is connected with the MCU; the charger body is equipped with an automatic switching mechanism, and when it is detected that the connected vehicle supports advanced communication, the CP / PP terminal serves as a channel for CAN signal transmission to establish a CAN bus communication connection with the vehicle supporting advanced communication, otherwise, a conventional CP / PP control mode is maintained. Therefore, CAN bus communication is realized by utilizing the CP / PP terminal, additional physical connection is not needed, the system complexity is reduced, automatic switching is realized, and the intelligent level is improved.

The application provides an antenna module, a preparation method of the antenna module and a terminal. The antenna module comprises a first plate body, an antenna unit, a second plate body and a transceiver chip. The antenna unit is arranged on the first plate body and used for transmitting and receiving radio frequency signals. The second plate body is arranged on a side surface of the first plate body opposite to the antenna unit. The transceiver chip is arranged in the second plate body and used for amplifying, phase-shifting and attenuating the radio frequency signals. The antenna unit is connected with the transceiver chip. The antenna module effectively ensures the flatness of the bottom of the antenna module, and makes the layout and wiring design and processing of a mother board corresponding to the antenna module simpler.

The invention relates to the technical field of CAN transceiver bus impedance adaptive matching scheme design, in particular to a CAN transceiver bus impedance adaptive matching method and system. The method is integrated in a CAN transceiver chip, bus impedance change and short-circuit and open-circuit fault types are detected online in real time, driver output impedance or receiver input configuration is adjusted in a self-adaptive mode according to the bus impedance change and the short-circuit and open-circuit fault types so as to optimize signal integrity, and meanwhile fault information is rapidly positioned and reported. The system comprises a detection module, an adjustment module and a fault processing module for realizing the functions. According to the method, the defects that a traditional CAN transceiver cannot dynamically adapt to bus impedance change and depends on an external diagnostic tool are overcome, adaptive optimization of communication quality and intelligent management of system faults are achieved, and reliability, robustness and maintainability of bus communication are remarkably improved.

A receive extender in an integrated circuit may include: N phase-adjustment circuits that adjust phases of N receive signals from N receive antennas; and an N:1 demultiplexer that coherently combines the N receive signals into an output signal, which is provided to the transceiver chip. Moreover, a transmit extender in the integrated circuit may include: a 1:M multiplexer that coherently separates a transmit signal from the transceiver chip into M transmit signals, where N and M are non-zero integers that may be different; and M phase-adjustment circuits that adjust phases of the M transmit signals, which are provided to M transmit antennas. Note that the integrated circuit may be coupled to a second integrated circuit that phase shifts the output signal and the transmit signal based at least in part on the oscillator signal. Moreover, control signals between the integrated circuit and the second integrated circuit may be synchronized.

The present disclosure provides an optical transceiver chip for an interferometric fiber-optic gyroscope and an interferometric fiber-optic gyroscope. The optical transceiver chip comprises: an on-chip micro-ring resonator comprising a nonlinear medium and configured to be able to couple to a pump light source and receive a pump light signal from the pump light source, and based on a third-order nonlinear effect of the nonlinear medium, generate a non-coherent wide-spectrum optical frequency comb signal from the pump light signal; a fiber coupling device configured to be coupled to the on-chip micro-ring resonator and receive the non-coherent wide-spectrum optical frequency comb signal, the fiber coupling device is further configured to be able to couple to a sensing fiber of the interferometric fiber-optic gyroscope, and provide the non-coherent wide-spectrum optical frequency comb signal to the sensing fiber of the interferometric fiber-optic gyroscope and receive a return light signal from the sensing fiber; and a photoelectric detection device configured to be coupled to the fiber coupling device, receive the return light signal and detect an interference light signal based on interference between the return light signals.

To provide a system architecture for a wireless optical communication terminal that can be integrated on one or more photonic integrated chips.SOLUTION: The free-space optical communication system includes an optical phased array (OPA) photonic integrated chip (114), a transceiver photonic integrated chip (112), and one or more processors (104). The OPA chip includes a plurality of array elements (120) and a plurality of phase shifters (121). The transceiver chip includes one or more transmitter components 116 and one or more receiver components 118. The one or more processors are configured to transmit 402 a first signal via the OPA chip and the transceiver chip, and receive 410 a second signal via the OPA chip and the transceiver chip.SELECTED DRAWING: Figure 1

The invention relates to the field of microwave communication, in particular to a miniaturized multichannel millimeter wave transceiver, which comprises a signal processing extension set, an inquiry transceiver assembly, a response transceiver assembly, a response omnidirectional antenna and an inquiry directional array antenna, the frequency conversion module is used for realizing frequency conversion, acquisition and baseband processing of an L-band signal, and providing a control signal and a reference clock for the inquiry transceiving assembly and the response transceiving assembly; the inquiry receiving and transmitting assembly is connected with the signal processing extension set and the inquiry directional array antenna and is used for receiving and transmitting inquiry signals; and the response transceiving assembly is connected with the signal processing extension set and the response omnidirectional antenna, comprises a Ka-band integrated transceiving chip and is used for realizing Ka-band transceiving of response signals. The system has the advantages of small size, low power consumption and light weight, and is suitable for monitoring and response management of various navigation management ground equipment, general aviation aircrafts and various unmanned aerial vehicles.

This application relates to the field of ultrasonic detection technology, and in particular to an ultrasonic probe with an integrated ultrasonic transceiver chip, comprising: an ultrasonic transceiver chip module, an interface module, a balun clock module, a TX module, and an RX module; the ultrasonic transceiver chip module includes: a variable gain amplifier, a low-frequency gain amplifier, a low-pass filter, and an analog-to-digital converter; the balun clock module provides the ultrasonic transceiver chip module with a working clock; the interface module provides the ultrasonic transceiver chip module with a working DC voltage, clock input, control signal input, and data output; the TX module and RX module are used to transmit and receive ultrasonic signals, respectively; this application eliminates the signal transmission defects of separate designs by integrating the ultrasonic transceiver chip and the transducer into a single architecture; and achieves multi-channel signal acquisition by synchronously triggering and controlling the number of channels and transducer array elements; the combined design of internal short-range interconnection and integrated preprocessing balances signal transmission integrity and subsequent processing efficiency.

Optical interconnect modules may include logic and / or memory blocks and optical transceiver subsystems. The optical transceiver subsystem may include an array of micro LEDs and an array of photodetectors. The optical transceiver subsystem of each module may be optically coupled to optical transceiver subsystems of other modules. Each module may include a processor and / or memory chip and an optical transceiver subsystem chip mounted on a common substrate, and the processor and / or memory chip and the optical transceiver chip may be coupled through a die-to-die interface.

The embodiment of the invention provides a signal leakage correction system and method and a radio frequency transceiver chip, the system comprises at least one signal processing unit, a first MUX and a leakage compensation unit, and the leakage compensation unit comprises a compensation subunit and a calculation subunit; the signal processing unit processes the emission leakage signal of the downlink channel to obtain a cancellation signal representing the leakage influence, and sends the cancellation signal to the first MUX and the compensation subunit; the first MUX sends the cancellation signal to a calculation subunit; and the compensation subunit performs leakage compensation on the first receiving signal of the uplink channel based on the cancellation signal and the compensation coefficient to obtain a second receiving signal. A signal processing unit is used for processing a transmitting leakage signal of a transmitting end, and modeling is carried out to achieve a cancellation signal of an effect of cancelling an uplink receiving signal; a cancellation signal is sent to the calculation sub-module through the first MUX, so that accurate adjustment of parameters and accurate calculation of compensation coefficients are realized; and accurate correction of signal leakage is realized through the compensation subunit.

The application discloses an optical device riveting jig based on a fiber transceiver chip and a control method thereof, which comprises a workbench, a protective cover, a control box, a mounting plate, a feeding mechanism, a riveting die, a storage box, a riveting mechanism and a material taking mechanism, the protective cover is connected to the top of the workbench through an angle code and a bolt, and is used for safety protection during the riveting operation process. Through the multi-station design of the rotating disc driving multiple riveting dies, the cooperative operation of the feeding mechanism, the riveting mechanism and the material taking mechanism, the continuous automatic processing of the optical device is realized, the manual intervention link is reduced, the production efficiency is significantly improved, the cooperative control of various functional components is realized through the control box, the flexible setting of the processing parameters is supported, the processing requirements of different specifications of optical devices can be adapted, the universality is high, the automation degree of the operation process is high, and the operation is convenient.

The invention relates to an intelligent terminal for lock-avoiding temperature detection of a charging port of a new energy vehicle in the technical field of new energy vehicles, the intelligent terminal comprises a main control circuit board and a temperature detection assembly, the temperature detection assembly comprises a temperature debugging pin, a 4G module connector and a temperature debugging interface, and the surface of the main control circuit board is electrically connected with a CAN transceiver chip and a main control chip; the temperature sensor is arranged near the charging port, the main control chip performs real-time acquisition and analysis, once the temperature is detected to be close to or reach a dangerous threshold value, the lock avoiding instruction is immediately sent to the vehicle control unit through the CAN bus, charging is actively forbidden or power reduction is requested, and the safety of the vehicle is ensured. Safety accidents such as fusion welding and fire caused by heating of the contact resistor are prevented from the source, and the hot locking risk is effectively avoided; and an electrical isolation design is adopted, so that ground loop interference, surge impact and common-mode noise are effectively suppressed, and the effects of uninterrupted communication and undistorted data under strong electromagnetic interference working conditions such as motor start and stop and high-voltage switching are ensured.

This application discloses a multimodal signal recording device, relating to the field of signal processing technology. The disclosed multimodal signal recording device includes: a data receiving module, an FPGA, an ARM processor, and a storage module. The data receiving module includes: a CML transceiver chip for receiving video signals and a signal conditioning module for receiving analog-to-digital signals. The FPGA is connected to both the CML transceiver chip and the storage module; the ARM processor is connected to both the signal conditioning module and the storage module. This application adopts an architecture combining an FPGA and an ARM processor. The CML transceiver chip, the FPGA, and the storage module form a video recording channel, while the signal conditioning module, the ARM processor, and the storage module form an analog-to-digital recording channel. This achieves multimodal data recording, effectively improving multimodal data processing capabilities and adapting to different application scenarios.